Hybrid intelligent approach for modeling and optimization of semiconductor devices and nanostructures

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Hybrid intelligent approach for modeling and optimization of semiconductor

devices and nanostructures

Yiming Li

Department of Communication Engineering, National Chiao Tung University, 1001 Ta-Hsueh Road, Hsinchu 300, Taiwan

a r t i c l e

i n f o

Article history:

Available online 30 July 2008 PACS: 02.60.Pn 85.30.De 85.60.Bt 42.82.Et 42.70.Qs Keywords:

Hybrid intelligent approach Parameter optimization Evolutionary algorithms Numerical methods Neural network Parallelization Semiconductor nanodevice Semiconductor nanostructures Model parameter extraction Structure design optimization Photonic taper waveguide and photonic crystal

a b s t r a c t

In this work, we present a hybrid intelligent approach for parameter extraction and design optimization of semiconductor nanoscale devices and nanostructures. Based on evolutionary algorithms, numerical methods, neural network scheme and parallel computing technique, the optimization methodology is developed and successfully implemented. In the hybrid approach, an evolutionary algorithm, such as genetic algorithm or particle swarm optimization, firstly searches the entire problem space to get a set of roughly estimated solutions. The numerical method, such as Levenberg–Marquardt method, then per-forms a local optima search and sets the local optima as the suggested values for the genetic algorithm to perform further optimizations. Meanwhile, the neural network is applied to investigate the influence of parameters on the optimized functions which thus guides the evolutionary direction of genetic algo-rithm. For solving real world problems, all functional blocks are performed under a PC-based Linux clus-ter system with message-passing inclus-terface libraries. This hybrid intelligent approach has experimentally been implemented and validated for different applications in semiconductor nanodevices and nanostruc-tures. For semiconductor nanodevice parameter extraction, this approach shows its capability to auto-matically extract a set of global parameters among sixteen 90 nm complementary metal oxide semiconductor (CMOS) devices. Compared with the measured current–voltage (I–V) curves of fabricated CMOS samples, the optimized I–V results are within 3% of accuracy. The computational examinations including sensitivity, convergence property, and parallelization are discussed. For parameter extraction of organic light emitting diode (OLED), the approach also achieves good accuracy for red, green, blue OLEDs. For the third and fourth applications, optimal structure design of silicon photonic taper wave-guide and photonic crystal are further advanced by integrating a simulation-based technique in the developed system. All of these experiments demonstrate interesting results and validate the optimization methodology. The concept of hybrid intelligent approach may benefit modeling and optimization in diverse science and engineering problems.

1. Introduction

Model and optimal parameters have been at the heart of computer-aided design tools (CAD) for semiconductor technology over the past decades. In the modern microelectronics industry, parameters of the semiconductor nanodevices and nanostructures are tuned by engineers for matching some speciﬁcations. To satisfy the design targets, engineers must base on the simulation result of CAD tools to adjust the design parameters, and again feed the adjusted parameters to retrieve improved results. Currently, this mechanical procedure is mostly performed by engineers empirically. Numerical and evolutional methods have been studied in the characteristic optimization of semiconductor devices[1–6], but numerical methods in general require an

accu-rate initial guess to perform a local optimization. Solution with a pure evolutional method suffers a long time evolution process. It may take days even weeks to ﬁnd suitable parameters for the designed devices.

In the semiconductor technology, the equivalent circuit models [7] continuously play an active role in bridging the nanodevice fabrication and integrated circuit (IC) design. As the mainstream complementary metal-oxide-semiconductor (CMOS) technology is scaled into the nanoscale regime, hundreds of parameters have to be optimized and extracted for the corresponding model equations. For optical devices and semiconductor nanostructures, such as organic light emitting diode (OLED), silicon photonic taper waveguide and photonic crystal, there are also many parameters related to the device structure should be adjusted for better perfor-mance. Conventional manual adjustment will be a bottleneck for design of advanced semiconductor materials and nanodevices.

E-mail address:ymli@faculty.nctu.edu.tw

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Computational Materials Science

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Moreover, either the numerical or evolutionary optimization tech-niques have limitation for such complicated engineering problems. Therefore, an accurate and robust hybrid intelligent approach may beneﬁt the advanced optimization problems.

In this work, we practically implement a flexible hybrid intelli-gent approach for optimization problems in semiconductor nan-odevice and nanostructures. Based on evolutionary algorithms, advanced numerical methods, adaptive neural network scheme and parallel computing techniques, a hybrid optimization method-ology is proposed and successfully implemented in the unified optimization framework (UOF) [5,8–12]. In the proposed hybrid approach, a multiobjective distributed evolutionary algorithm, such as genetic algorithm (GA) or particle swarm optimization (PSO) is firstly executed for a rough estimation on the solution, the numerical method, such as Levenberg–Marquardt (LM) method will enable a local optimization, where the adaptive neural net-work (NN) investigates the quality of solutions and suggests searching directions for the GA. Our preliminary investigation shows that this optimization methodology empirically solves di-verse optimization and parameter extraction problems arising from semiconductor nanodevices and nanostructures in a compu-tationally cost-effective manner. For semiconductor nanodevice parameter extraction (is also known the parameter optimization), this approach shows its capability to automatically extract a set of global parameters among sixteen 90 nm CMOS devices. Com-pared with the measured I–V curves of fabricated samples, the optimized results are within 3% of accuracy. The computational examinations including sensitivity, convergence property, and par-allelization are discussed. Efficiency comparison among the pure evolutionary algorithms, pure numerical methods, and the hybrid intelligent approach are also verified in this example. For parame-ter extraction of OLED devices[13–16], the approach also achieves good accuracy for red, green, blue OLEDs. For the third and fourth applications, optimal structure design of silicon photonic taper waveguide[17–21]and photonic crystal[22]are further advanced by integrating a simulation-based technique in the developed sys-tem. All of these experiments demonstrate interesting results and validate the optimization technique. The concept of hybrid intelli-gent approach may benefit modeling and optimization in diverse science and engineering problems.

This paper is organized as follow. In Section2, we describe the concept of the proposed hybrid intelligent approach. In Section3, we show the computer experimental results for the parameter extraction and structure optimization of four different problems in semiconductor nanodevices and nanostructures. Finally, we draw conclusions and suggest future work.

2. The optimization methodology

In this section, we state the details of the proposed hybrid intel-ligent approach.Fig. 1a shows an illustration of the proposed opti-mization system. The system is composed of preprocess, extraction engine and postprocess. In the preprocess, available empirical rules are employed to initiate the parameters to be optimized which are depending on the different problems of semiconductor nanode-vices and nanostructures. If necessary, the data reduction will be performed in the preprocess. For example, the parameter extrac-tion of the equivalent circuit models for the CMOS technology of-ten involves four or six sets of I–V curves (under different bias conditions); and each set of I–V curves consists of five I–V lines, each of which has at least thirty I–V points. When performing the global extraction with multiple transistors, such as 16, 32, or more devices, the number of I–V points increases significantly. Therefore, a statistical data reduction can significantly reduce the computational complexity during the optimization process. After

the preprocess, the extraction engine that integrating such as GA, NN, numerical approach and parallelization technique, then per-forms the optimization and parameter extraction process for an interesting semiconductor nanodevices and nanostructures. The electrical and physical quantities veriﬁcation is ﬁnally performed in the postprocess.

The extraction engine is the core of optimization and parameter extraction. It contains the numerical optimization method, genetic algorithm, neural network, and the parallelization technique. We have successfully implemented this hybrid approach in the UOF. In the following sub-sections, the concepts of GA, NN, LM, and the proposed hybrid intelligent methodology are stated brieﬂy. 2.1. The evolutionary and numerical approaches

The evolutionary approaches including GA and NN are em-ployed in the proposed system. It is known that a GA is a globally searching optimization method which is based on the mechanism of natural selection and natural genetics. It works with a code of parameter strings called chromosome instead of the solutions themselves. Each chromosome represents a solution set, and the ﬁtness functions are adopted to measure the survival scores of all chromosomes in the population. Then the GA will accord its selec-tion scheme to select several chromosomes for reproducselec-tion, dis-card unwanted chromosomes, and select the crossover scheme to produce the new generation. Then the GA will apply ﬁtness

func-GA for model

parameters

extraction

NN for curves and

physical quantities

inspection

LM method for

local

optimization

Current

parameters

Optimized

parameters

Curves

features

Suggestion

of extraction

strategy

Parallelization

Fig. 1. (a) An illustration of the proposed hybrid optimization system and (b) an execution ﬂowchart of the proposed hybrid intelligent computational methodology.

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tion for the new population again and loop this cycle until certain stop criteria is achieved[3–6].

It is known that NN is an adaptive learning network which has a remarkable ability to derive meaning from complicated or impre-cise data. It has been widely used in various ranges, especially in pattern reorganizations and the image processing. In this work, we adopt Hamming net to guide GAs to search the better solutions. The Hamming net is a supervised feedback NN which contains two sub-networks, the matching score net and the maximum net. When the training patterns stores into matching score net, it mea-sures the differences between input patterns and training patterns. After grabbing the output of each node in the matching score net, the maximum net is functioned to determine which training pat-tern is the most similar to the input patpat-tern. Once there is a unique restrained output above the threshold, the Hamming net termi-nated, and considers the training pattern represented by the node which provided the outstanding output is most similar to the input pattern, thus the input pattern can be clustered into this training pattern.

We notice that NN is applied to investigate the influence of parameters to the optimized functions, and guides GAs to focus on some major parameters to obtain better solutions instead of performing blind search. In contrast with the GA and NN above, numerical optimization method, such as LM method is a quasi-Newton method to accelerate the Gauss–quasi-Newton method. The Gauss–Newton method is the basic algorithm for solving the non-linear optimization problem. Due to the nonnon-linear property of the problem, a gradient for each variable could be obtained. It starts from an initial guess, and follows the direction of the normal of the gradient to find the optimal solution. Therefore, the initial guess must be chosen carefully, or the solution may fall into a local optima. Unlike the Gauss–Newton method has the fixed steps to-ward the solution, LM optimization method detect that some re-gions with monotonic variation property which can be accelerated by increasing the step size. On the other hand, when the optimization process encounters a sensitive region, the step should be shortened to avoid skipping the optimum.

2.2. The hybrid intelligent appproach

An execution flowchart of the hybrid intelligent technique for the parameter extraction task is shown inFig. 1b. The GA, as shown in this figure, firstly searches the entire problem space to get a set of roughly estimated solutions. After a roughly computed solution is obtained, the LM method performs a local optima search and sets the local optima as the suggested values for the GA to perform fur-ther optimizations. Meanwhile, the NN is applied to investigate the influence of parameters on the optimized functions, and guides the GA to focus on those significant parameters to obtain the better solutions instead of performing blind search.

Taking the parameter extraction of 90 nm CMOS devices as an example, the NN compares the difference of the physical character-istics of the measured data and the simulated I–V curves. Accord-ing to the examined results of the original and the computed first derivatives of I–V curves, the NN will suggests that the GA should focus on the evolution of those corresponding parameters. Conventional GA-based methods are plagued by problems such as rapid decreases in the population diversity and disproportionate exploitation and exploration of the solution space with multiple dimensions. The results are frequent premature convergence and inefficient search. Compared with the pure GA-based optimization techniques, the LM method finds a solution rapidly with an accu-rate initial guesses. We have to note that the LM method, a modi-fied Gauss–Newton method, is still a local method and is easily trapped into local optima. With a proper integration of the LM method in the optimization process, the GA saves much

unneces-sary efforts to search optima. Furthermore, the most significant parameters that influence physical quantities of CMOS devices have also be detected and monitored. If physical quantities are intolerant, other electrical characteristics will also lose their accu-racy. Therefore, the parameters which affect those major quantities should be extracted firstly and the priority of optimization se-quence of the model parameters should be considered. Besides, each physical quantity affects some specified I–V curves character-istics such that we can be conscious of the intolerance of physical quantities through investigating the characteristics of I–V curves. The information described above is built in the NN. Under the guid-ance of the NN, the GA emphasizes the most important parameters and corrects physical quantities one by one. Taking GA as the evo-lutionary algorithm, a pseudo code for the hybrid system, shown in Fig. 1b, is listed below.

Begin Hybrid Optimization Algorithm Begin GA Optimization

Initialize GA

While EstimatedError(BestSolution) > ToleranceError GA Performs Optimization GA Obtain BestSolution LM Optimization(BestSolution) NN ModelInspection(BestSolution) End While End GA Optimization

End Hybrid Optimization Algorithm

For practical implementation, we notice that the hybrid intelli-gent approach could be carried out conveniently in the environ-ment of UOF, which was recently developed by us and is available on line [12]. Diverse solvers including the aforemen-tioned GA, NN and LM methods are already developed in the plat-form of UOF; and we only need to integrate them to construct the hybrid approach. Before discussion on the potential application in optimization problems of semiconductor nanodevices and nano-structures, a benchmark problem is ﬁrstly examined with the hy-brid intelligent approach for the accuracy and efﬁciency examination. Consider the following minimization problem

Min f ðx1;x2Þ ¼ 21:5 þ x1sinð4

p

x1Þ þ x2sinð20

p

x2Þ ð1Þ

where 3.5 6 x1612.1 and 4.1 6 x265.8. The objective function to

be minimized oscillates periodically within the constraint region. Fig. 2 shows the values of f(x1, x2) respect to different x1and x2.

The minimal value of f function is 3.8532 which occurs at (x1,

x2) = (11.8759, 5.7745).

Table 1shows the optimized solutions by four different optimi-zation methods. According to the achieved results, we find that the numerical method cannot find the global minimum. Without a good initial guess, it is impossible to solve this problem using LM method. The hybrid intelligent approach provides a most computa-tionally effective way to obtain the optimal solution. Nevertheless, the GA or GA + NN approach can also find a good solution with much more longer time for evolutionary iterations. The hybrid intelligent approach empirically demonstrates excellent computa-tional efficiency in solving this minimization problem. More details related to computational cost, such as gradient calculation and population size effect could be addressed somewhere else. 3. Results and discussion

Applications of the hybrid intelligent approach in semiconduc-tor nanodevies and nanostructures are presented in this section. In the ﬁrst, an examination of the optimization methodology on the parameter extraction for sixteen 90 nm CMOS devices is

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performed. The extracted results confirm that the methodology is superior to other approaches. In the second application, an equiv-alent circuit model is for the first time proposed for the OLED and then the corresponding parameters are optimized. The first two applications are the so-called equation-based optimization prob-lems. By integrating numerical simulation kernels with the hybrid intelligent approach, a simulation-based optimization technique is also implemented for the structure optimizations of the silicon photonic taper waveguide and the photonic crystal. The involved simulators in these two problems are including MPB [23] and CAMFR[24]for solving the Maxwell equations.

3.1. Parameter extraction for sixteen 90 nm CMOS devices

Mathematically, model parameter extraction is a multidimen-sional nonlinear optimization problem, where the number of parameters could be larger than 100. The main goal of device mod-el parameter extraction is to minimize the error between the ex-tracted result and the measurement, where the exex-tracted result is obtained through the equation below:

IexDS¼ IDðp * v * d * Þ; ð2Þ

where the IexDSis the I–V functions (e.g., I–V points) to be optimized;

the IDis a selected compact model, which contains more than 40

subequations in the BSIM model[5–6], for example. Vectors p*, v*

Fig. 2. Plot of the function to be optimized f(x1, x2) respect to x1and x2.

Table 1

The optimized solutions using different methods in solving the minimization problem1 # of iterations Levenberg–Marquardt method GA GA + NN The hybrid approach 1 11.54 11.54 11.54 11.54 10 9.48 10.99 10.61 9.850 20 8.72 9.946 9.483 8.103 40 8.72 8.054 7.481 6.944 60 8.72 5.984 5.324 3.853 100 8.72 4.015 3.923 – VDS (V) 0.2 0.8 1.4 2.0 2.6 3.2 IDS (X 0.1 mA) 0.5 1.0 1.5 2.0 2.5 3.0 0 30 60 90 120 150 180 V_GS = 2.0 V V_GS = 2.5 V Weight function V_GS = 3.0 V

Fig. 3. Plot of the developed weight function for the calculation of ﬁtness.

Fig. 4. The dimension distribution (width versus length) of investigated 16 devices. The dimension of the smallest device is L = 90 nm and W = 0.6lm.

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0.0 0.3 0.6 0.9 1.2 0.00 0.09 0.18 0.27 0.36 0.45 0.0 0.3 0.6 0.91 .2 0.00 0.03 0.06 0.09 0.12 0.15 0.0 0.3 0.6 0.9 1.2 0.00 0.02 0.04 0.06 0.08 0.0 0.3 0.6 0.9 1.2 0.00 0.01 0.02 0.03 0.04 0.05 0.06 0.0 0.3 0.6 0.9 1.2 0.00 0.16 0.32 0.48 0.64 0.80 0.0 0.3 0.6 0.9 1.2 0.00 0.06 0.12 0.18 0.24 0.30 V_DS (V) 0.0 0.3 0.6 0.9 1.2 IDS (m A) 0.00 0.03 0.06 0.09 0.12 0.15 0.0 0.3 0.6 0.9 1.2 0.00 0.03 0.06 0.09 0.12 L/W = 0.09/0.6 L/W = 0.35/0.6 L/W = 0.8/0.6 L/W = 1.2/0.6 L/W = 0.09/1.2 L/W = 0.35/1.2 L/W = 0.8/1.2 L/W = 1.2/1.2 0.0 0.3 0.6 0.9 1.2 0.0 1.0 2.0 3.0 4.0 5.0 0.0 0.3 0.6 0.9 1.2 0.0 1.0 2.0 3.0 4.0 5.0 0.0 0.3 0.6 0.9 1.2 0.0 1.0 2.0 3.0 4.0 5.0 0.0 0.3 0.6 0.9 1.2 0.0 0.8 1.6 2.4 3.2 4.0 0.0 0.3 0.6 0.9 1.2 0.0 0.4 0.8 1.2 1.6 2.0 0.0 0.3 0.6 0.9 1.2 0.0 0.3 0.6 0.9 1.2 1.5 V_DS (V) 0.0 0.3 0.6 0.9 1.2 IDS (m A) 0.0 0.3 0.6 0.9 1.2 0.0 0.3 0.6 0.9 1.2 0.0 0.2 0.4 0.6 0.8 L/W = 0.09/10 L/W = 0.16/10 L/W = 0.18/10 L/W = 0.24/10 L/W = 0.35/10 L/W = 0.5/10 L/W = 0.8/10 _{L/W = 1.2/10}

Fig. 5. The extracted (lines) and measured (dots) IDS–VDScurves of the 90 nm nMOSFETs. The errors of all devices are within 3%.

0.0 0.4 0.8 1.2 0.000 0.016 0.032 0.048 0.064 0.080 0.0 0.4 0.8 1.2 0.000 0.007 0.014 0.021 0.028 0.035 0.0 0.3 0.6 0.9 1.2 0.000 0.003 0.006 0.009 0.012 0.015 0.0 0.3 0.6 0.9 1.2 0.000 0.002 0.004 0.006 0.008 0.010 0.0 0.3 0.6 0.9 1.2 0.000 0.028 0.056 0.084 0.112 0.140 0.0 0.3 0.6 0.9 1.2 0.000 0.014 0.028 0.042 0.056 0.070 0.0 0.3 0.6 0.9 1.2 IDS (m A) 0.000 0.007 0.014 0.021 0.028 0.035 0.0 0.3 0.6 0.9 1.2 0.000 0.005 0.010 0.015 0.020 0.025 V_GS (V) L/W = 0.09/0.6 _{L/W = 0.35/0.6} L/W = 0.8/0.6 L/W = 1.2/0.6 L/W = 0.09/1.2 L/W = 0.35/1.2 L/W = 0.8/1.2 L/W = 1.2/1.2 0.0 0.3 0.6 0.9 1.2 0.00 0.24 0.48 0.72 0.96 1.20 0.0 0.3 0.6 0.9 1.2 0.00 0.24 0.48 0.72 0.96 1.20 0.0 0.3 0.6 0.9 1.2 0.00 0.20 0.40 0.60 0.80 1.00 0.0 0.3 0.6 0.9 1.2 0.00 0.20 0.40 0.60 0.80 1.00 0.0 0.3 0.6 0.9 1.2 0.00 0.13 0.26 0.39 0.52 0.65 0.0 0.3 0.6 0.9 1.2 0.0 0.1 0.2 0.3 0.4 0.5 0.0 0.3 0.6 0.9 1.2 IDS (mA) 0.00 0.06 0.12 0.18 0.24 0.30 0.0 0.3 0.6 0.9 1.2 0.00 0.04 0.08 0.12 0.16 0.20 V_GS (V) L/W = 0.09/10 L/W = 0.16/10 L/W = 0.18/10 L/W = 0.24/10 L/W = 0.35/10 L/W = 0.5/10 L/W = 0.8/10 _{L/W = 1.2/10}

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and d*are the parameter sets to be extracted, the bias condition for simulation, and the device geometry, respectively. There are at least 50 I–V points forming an I–V curve, 5 I–V curves forming a set of I–V curves, and 4 sets of I–V curves to characterizing a single device behavior. When perform a model parameter extraction with 16 de-vices as target, there are 16,000 I–V points need to be minimized, and the number of parameters is more than 100. Therefore, this parameter extraction problem is a large scale optimization problem with massive computation.

To validate the computational efficiency and accuracy of the developed hybrid approach, sixteen 90 nm n-type metal-oxide-semiconductor field effect transistors (nMOSFETs) have been fabri-cated, measured, and extracted. According to the nature of I–V curves of devices, a physical-based weight function is developed for the calculation of fitness. Fig. 3 shows the proposed weight function.Fig. 4shows the dimension distribution (the device width W versus its length L) of the investigated sixteen nMOSFETs of 90 nm fabrication technology. The equivalent circuit model used in this examination is the BSIM4 model[6], Figs. 5 and 6show the extracted drain current–drain voltage (IDS–VDS) and IDS–VGS

curves of the 90 nm nMOSFET, and the error of all cases are less than 3%.Figs. 7 and 8are the ﬁrst derivatives of the original I–V curves with respect to VDSand VGSwhere all computed errors are

within 5%. We notice that the computed accuracy is good enough according to the device modeling point of view in semiconductor industry. Comparison between the measurement data (dots) and the simulation (lines) demonstrates good accuracy of the optimiza-tion method. The ﬁrst derivatives of all sets of curves of IDS–VDS

and IDS–VGS with respect to the different applied voltages are

calculated by gD¼ @IDS @VDS ð3Þ and gm¼ @IDS @VGS : ð4Þ

We notice that the partial derivative of drain currents with re-spect to VDS and VGS is physical meaningful which represents

important electrical quantities in semiconductor device physics [25]; gDis the channel conductance (also called the drain

conduc-tance) and gmis the transconductance. These results conﬁrm the

accuracy of the hybrid intelligent approach in the multiple nano-scale CMOS device parameter extraction.

Table 2shows the extraction time of various number of CMOS devices with respect to different extraction approaches. As shown inTable 2, if the devices number is less than eight, the hybrid intel-ligent approach has similar extraction time, compared with other methods. However, when the number of devices greater than 8 or 16, the hybrid intelligent approach demonstrates better extrac-tion efﬁciency, compared with other methods. In our hybrid sys-tem, the time acquired by the numerical LM method and neural network algorithm can be regarded as instant, compared with the time cost of GA. Therefore, only the GA is required a paralleliza-tion technique. Applicaparalleliza-tion of parallelizaparalleliza-tion to GA provides an efﬁcient way to reduce the computing time[9,10].Fig. 9b shows the archived speedup for different number of devices when per-form parallelization of GA. We found that when the devices num-ber is less than 8, then the parallelization on an 8 node cluster is enough. However, if the devices number is equal to 16, then the 16 node cluster is more suitable and can provide better speedup.

0.0 0.3 0.6 0.9 1.2 0.00 0.20 0.40 0.60 0.80 1.00 0.0 0.4 0.8 1.2 0.00 0.08 0.16 0.24 0.32 0.40 0.0 0.3 0.6 0.9 1.2 0.00 0.04 0.08 0.12 0.16 0.20 0.0 0.3 0.6 0.9 1.2 0.00 0.03 0.06 0.09 0.12 0.0 0.3 0.6 0.9 1.2 0.00 0.36 0.72 1.08 1.44 1.80 0.0 0.3 0.6 0.9 1.2 0.00 0.16 0.32 0.48 0.64 0.80 VDS (V) 0.0 0.3 0.6 0.9 1.2 g (mD A/V) 0.00 0.07 0.14 0.21 0.28 0.35 0.0 0.3 0.6 0.9 1.2 0.00 0.05 0.10 0.15 0.20 0.25 L = 0.09 μm L/W = 0.35/0.6 L/W = 0.8/0.6 L/W = 1.2/0.6 L/W = 0.09/1.2 L/W = 0.35/1.2 L/W = 0.8/1.2 _{L/W = 1.2/1.2} 0.0 0.3 0.6 0.9 1.2 0.0 3.6 7.2 10.8 14.4 18.0 0.0 0.3 0.6 0.9 1.2 0.0 2.8 5.6 8.4 11.2 14.0 0.0 0.3 0.6 0.9 1.2 0.0 2.8 5.6 8.4 11.2 14.0 0.0 0.3 0.6 0.9 1.2 0.0 2.4 4.8 7.2 9.6 12.0 0.0 0.3 0.6 0.9 1.2 0.0 1.2 2.4 3.6 4.8 6.0 0.0 0.3 0.6 0.9 1.2 0.0 0.8 1.6 2.4 3.2 4.0 VDS (V) 0.0 0.3 0.6 0.9 1.2 g (mD A/V) 0.0 0.5 1.0 1.5 2.0 2.5 0.0 0.3 0.6 0.9 1.2 0.0 0.4 0.8 1.2 1.6 2.0 L/W = 0.09/10 L/W = 0.16/10 L/W = 0.18/10 L/W = 0.24/10 L/W = 0.35/10 L/W = 0.5/10 L/W = 0.8/10 _{L/W = 1.2/10}

Fig. 7. The extracted (lines) and measured (dots) ﬁrst derivative curves with respect to VDSof the 90 nm nMOSFETs corresponding to IDS–VDScurves inFig. 5. The errors of all

devices are within 5%. The notation gDmeans the channel conductance of the device which is the partial derivative of drain current IDSwith respect to the drain voltage VDS

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3.2. Modeling and parameter extraction of OLED devices

In this subsection, we present a new equivalent circuit model for OLED and then apply the hybrid system for the parameter extrac-tion. The physical-based OLED model is considering the effect of high built-in voltage existing between the organic materials and the effect of nonideal ohmic occurring at the contact between metal and organic[13–16]. Compared with the measured I–V data of red, green, and blue (RGB) OLED samples, the new OLED model and the correspondingly optimized parameters show the good accuracy. Plot of the structure of OLED used in our model parameter extrac-tion, sample fabrication and measurement is shown inFig. 10a. The structure of OLED has multilayer of materials. To model the I– V characteristics of OLEDs, we should consider the effect of high built-in voltage existing among the layers of organic materials and the effect of the nonideal ohmic that occurs on the contact between metal and organic. The equivalent circuit of the OLED model is shown inFig. 10b, where the effect of high built-in voltage and the nonideal ohmic effect are modeled with the variable resistance

and the supplied battery. A nonlinear resistance is adopted to reﬂect the phenomenon of the Schottky barrier. With adding those two items into the ideal diode model, the OLED model can be directly incorporated into SPICE circuit simulator without any convergence problems, where a copy of SPICE net list is shown inFig. 10c. The parameters of the OLED model are listed inTable 3.Fig. 11shows the comparison results between the extracted results and the mea-sured RGB OLED data, respectively. The modeling and parameter extraction presents good accuracy when describes the OLED physi-cal characteristics in both the cut-in and the on-state regions.

Fig. 9a shows an sensitivity examination of the extracted parameters. According the physical point of view, the parameters could be divided into several categories. It is important to know the sensitivity of each parameter category on the optimized solu-tions. This investigation can assist the extraction process. To per-form the sensitivity analysis, the proposed system extracts single category of parameters meanwhile locks other sets of parameters. The expected result should show that varying certain parameters category would make notable progress while some others would not.Fig. 9a reveals that the parameters related to the threshold voltage would make the most improvement. With the similar methodology, the silicon photonic taper waveguide optimization and the photonic crystal design optimization are conducted. We notice that for these two examinations, we only empirically enable GA or PSO methods in the hybrid system due to the less parameter is needed for these two optimization problems.

3.3. Silicon photonic taper waveguide optimization

A taper structure to couple photonic devices with different scales of guiding region is an important role in an integrated optic

Table 2

Comparison of computational efﬁciency among different approaches

# of devices GA GA + LM GA + NN The hybrid approach

1 122.7 102.3 172.5 178

2 478.4 419.7 437.1 452.5

4 5843 5621.9 5019.3 5123.6

8 23808.4 20018.6 19873.1 17230.2

16 150479.5 120975.1 109844.3 98201.3

We notice that the population size is equal to 100 and the mutation rate is 0.05 in GA among different approaches.

0.0 0.3 0.6 0.9 1.2 0.000 0.024 0.048 0.072 0.096 0.120 0.0 0.3 0.6 0.9 1.2 0.000 0.010 0.020 0.030 0.040 0.050 0.0 0.3 0.6 0.9 1.2 0.000 0.004 0.008 0.012 0.016 0.020 0.0 0.3 0.6 0.9 1.2 0.000 0.003 0.006 0.009 0.012 0.015 0.0 0.3 0.6 0.9 1.2 0.000 0.050 0.100 0.150 0.200 0.250 0.0 0.3 0.6 0.9 1.2 0.000 0.020 0.040 0.060 0.080 0.100 0.0 0.3 0.6 0.9 1.2 gm (mA/V) 0.000 0.008 0.016 0.024 0.032 0.040 0.0 0.3 0.6 0.9 1.2 0.000 0.005 0.010 0.015 0.020 0.025 V_GS (V) L/W = 0.09/0.6 L/W = 0.35/0.6 L/W = 0.8/0.6 L/W_{= 1.2/0.6} L/W = 0.09/1.2 L/W = 0.35/1.2 L/W = 0.8/1.2 L/W = 1.2/1.2 0.0 0.3 0.6 0.9 1.2 0.00 0.50 1.00 1.50 2.00 2.50 0.0 0.3 0.6 0.9 1.2 0.00 0.36 0.72 1.08 1.44 1.80 0.0 0.3 0.6 0.9 1.2 0.00 0.32 0.64 0.96 1.28 1.60 0.0 0.3 0.6 0.9 1.2 0.00 0.24 0.48 0.72 0.96 1.20 0.0 0.3 0.6 0.9 1.2 0.00 0.20 0.40 0.60 0.80 1.00 0.0 0.3 0.6 0.9 1.2 0.00 0.12 0.24 0.36 0.48 0.60 0.0 0.3 0.6 0.9 1.2 gm (m A/V) 0.00 0.07 0.14 0.21 0.28 0.35 0.0 0.3 0.6 0.9 1.2 0.00 0.05 0.10 0.15 0.20 0.25 V_GS (V) L/W = 0.09/10 L/W = 0.16/10 L/W = 0.18/10 L/W = 0.24/10 L/W = 0.35/10 L/W = 0.5/10 L/W = 0.8/10 L/W = 1.2/10

Fig. 8. The extracted (lines) and measured (dots) (IDS–VGS)’ ﬁrst derivative curves with respect to VGSof the 90 nm nMOSFETs corresponding to IDS–VGScurves inFig. 6. The

errors of all devices are within 5%. The notation gmmeans the transconductance of device which is the partial derivative of drain current IDSwith respect to the drain voltage

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circuit[17–19]. Low-loss couplings which provide a large misalign-ment tolerance between single-mode fibers and photonic semicon-ductor devices are indispensable for photonic integrated circuits. Tapered waveguides can also be used for input/output coupling to single mode fibers and for semiconductor laser amplifier appli-cations. For a linear tapered waveguide, we usually need a long length to decrease the optical loss. In this subsection, high trans-mittance silicon (Si) photonic taper waveguide is for the first time obtained by using PSO[20]and GA methods in the hybrid system. With the evolutionary algorithms, optimization of the photonic ta-per waveguide structure is achieved. More than 99.5% transmit-tance is obtained with the electromagnetic simulation and evolutionary algorithms.

TheFig. 12shows the typical lateral taper waveguide structure for optimization. The width of the guiding layer is 3

l

m initially and is reduced to 0.5

l

m at the end of the taper. We ﬁrstly ﬁx the taper length to be 10

l

m and partition it into ten discrete width proﬁles for the structure optimization. By assuming the monochromatic ﬁelds that vary harmonically in time according to ejwt_{, a set of Maxwell’s equations is numerically solved in the}

loop of optimization

r

E ¼ jwB Number of generations 0 500 1000 1500 2000 Score 0.10 0.15 0.20 0.25 0.30 0.35 0.40 Process Geometry GIDL Threshold voltage Subthreshold Mobility Saturation MOS resistance

Isub and gate

Temperature Number of devices 0 10 12 14 16 18 Speedup 0 2 4 6 8 10 4 nodes 8 nodes 16 nodes 8 6 4 2

Fig. 9. (a) An sensitivity examination of the parameters to be extracted (b) and the achieved parallel performance.

Table 3

The parameter list of the OLED model

Name Description Name Description

IS Saturation Current N Emission coefﬁcient

ISW Sidewall saturation current RS0 Ohmic resistance

IK Forward knee current Vbi Built-in potential

IKR Reverse knee current VBH Barrier height

.SUBCKT OLED p n area1=1e-6 pj1=1e-6

D1 p1 n1 Diode area=area1 pj=pj1

Rss p p1 'rss * exp(V(p1, p) / vbh)'

Von n1 n 'von'

.ENDS OLED

+

-VD

Rs

V

Contact metal ITO Organic film

bi

Fig. 10. (a) An illustration of the device structure of OLED, (b) a schematic plot of the OLED model, (c) and the net list of the model.

V (volt) 0.0 1.5 3.0 4.5 6.0 V (volt) 0.0 1.5 3.0 4.5 6.0 V (volt) 0.0 1.5 3.0 4.5 6.0 V (volt) 0.0 1.5 3.0 4.5 6.0 V (volt) 0.0 1.5 3.0 4.5 6.0 V (volt) 0.0 1.5 3.0 4.5 6.0 0 35 70 105 140 Measurement Model 0 25 50 75 100 Measurement Model 0 25 50 75 100 J (A/m 2) -3.00 -2.00 -1.00 0.00 1.00 -5.00 -2.50 0.00 2.50 J (log A/m 2) -1.50 -0.75 0.00 0.75 Measurement Model J (A/m 2) J (A/m 2) J (A/m 2) J (A/m 2) Measurement Model Measurement Model Measurement Model

Fig. 11. Comparison between the measurement (lines) and model (dashed line) of the I–V curves for the (a) red, (b) green and (c) blue OLED devices. (d)–(f) are the I–V curves in log scale.

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r

H ¼ J þ jwD; ð5Þ

and

r

D ¼

q

and

r

B ¼ 0;

where E is the imposed electric field, B is the magnetic field, H is the effective magnetic field inside the dielectric, D is the effective elec-tric field inside the dielecelec-tric, J is the free current density, and

q

is the charge density. An eigenmode expansion simulation approach is adopted[21]. Its computational speed is faster than the traditional finite difference time domain method. In order to obtain the opti-mized structure with minimum propagation loss, the evolutionary algorithms GA (or PSO) will optimize the 10 parameters to obtain the best performance of the taper waveguide. Our target in this case is to maximum the transmittance. In the GA kernel we set 10 pop-ulation sizes for each generation. The fitness function is well chosen for maximized the transmission efficiency. The PSO kernel of all the optimizations in this study is constructed based on the iterative for-mulas that control the swarm behaviors:

Vt¼ wVt1þ k1

g

1ðPt1 Xt1Þ þ k2

g

2ðGt1 Xt1Þ ð6Þ

and

Xt¼ Xt1þ Vt

D

t; ð7Þ

where w is the inertia factor, k1is the competition factor, k2is the

cooperation factor, G is the global best and P is the local best. Also the X is the position at the time step and V is the velocity of the par-ticle. In each optimization step, the GA (or PSO) gives the initial con-dition for the computation kernel. The ﬁtness function will be calculated by the return transmission efﬁciency. Iteratively the GA (or PSO) gives the new parameter set until reach the goal. The trans-mittance is given by

transmittance ¼PowerOuput

PowerInput 100%: ð8Þ Si substrate SiO2 clad Si guide Conventional waveguide Lateral taper Interface section W3 W1 T1 T3 x y z

Fig. 12. A three-dimensional schematic diagram of the studied silicon taper waveguide.

Fig. 13. (a) Field distribution of the optimized results by GA, where the transmit-tance is about 94.5% (b) and ﬁeld distribution of the optimized results by PSO, where the transmittance is about 99.5%.

Times 0 20 40 60 80 100 Score 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 Iterations (×10) 0 20 40 60 80 100 Score 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7

Fig. 14. The convergence property of the (a) GA (b) and PSO methods. We notice that PSO takes 10 times iterations compared with the iterations of GA.

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The transmittance will be 100% for a perfect structure; however, the critical point is the dimension of the cross section at the inter-face. There is a tradeoff between the small area and the maximum transmittance. We implement the GA and PSO algorithms in the hybrid system to optimize the 10 parameters for maximizing the transmission efﬁciency. TheFig. 13a shows the optimized results by GA, the optimized parameters are 2.576, 5.815, 2.131, 1.923, 1.458, 4.273, 2.468, 0.871, 1.954, and 0.719. The calculated trans-mittance is about 94.5%. Also we show the PSO results in Fig. 13b. The optimized parameters are 4.850, 5.697, 5.298, 3.432, 3.065, 1.744, 1.482, 2.251, 2.485, and 0.797. The transmit-tance is about 99.5%. As shown inFig. 14, we show the convergence property of the GA and PSO methods. The proposed GA and PSO show very good efﬁciency to do the optimization problems. The CPU time versus the number of iteration is reported inFig. 15a, and the transmission increases when the number of iteration in-creases for the PSO optimization, as shown inFig. 15b.

3.4. Photonic crystal design optimization

A 90° splitter in square lattice of GaAs rod in the air is optimized [22].Fig. 16a shows the original proﬁle of the explored photonic crystal, where the total length is about 6.6

l

m and the width is about 3

l

m; and the corresponding ﬁeld distribution of the struc-ture is shown inFig. 16b. The period of the structure is 0.6

l

m and the rod radius is about 75 nm. The transmittance of the original proﬁle is equal to 44.7%. To increase the transmittance of the explored structure of photonic crystal, we optimize the proﬁle of the photonic crystal using the hybrid system. As shown in

Fig. 16c and d, the optimized proﬁle and the corresponding ﬁeld distribution are obtained. A better transmittance, about 95.2%, is achieved.

4. Conclusions

In this paper, based upon the evolutionary algorithms, the numerical methods, the neural network scheme, and the parallel computing technique, we have developed and practically imple-mented a hybrid intelligent approach for optimization problems of semiconductor nanodevices and nanostructures. This optimiza-tion methodology has been successfully implemented in our uni-ﬁed optimization framework. The developed open-source project is available in the public domain. For the studied sixteen 90 nm CMOS technology, this approach demonstrates its capability to ex-tract a set of optimal parameters from several sets of measured I–V curves of fabricated MOSFETs globally. We notice that there are no similar publications about the 90 nm CMOS device parameter extraction problem with completely experimental data. It is thus difﬁcult to make a comparison with other works; therefore, we have directly compared the optimized results with the

experimen-Iterations

1 10 100 1000

CPU Time (sec.)

101 102 103 104 105 Iterations 0.1 1 10 100 1000 Transmittance (%) 0 20 40 60 80 100 120

Fig. 15. (a) Plot of the CPU time versus iterations and (b) is the transmittance versus iterations.

Fig. 16. (a) The original profile, (b) the transmittance of original profile which is about 44.7%, (c) the optimized profile, and (d) the transmittance of optimized profile which is about 95.2%.

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tally measured data of our fabricated samples. Compared with the fabricated and measured data, the errors of optimized results are less than 5%. This accuracy is good enough for the device model point of view in semiconductor industry. Application of the hybrid system to RGB OLED devices has also been discussed. Besides, opti-mal structure designs of silicon photonic taper waveguide and photonic crystal have further been advanced using a simulation-based optimization methodology. This hybrid intelligent approach not only beneﬁts the modeling and optimization of semiconductor nanostructures and devices but also can be extended for other real world applications. The similar methodology can be used for 65 nm CMOS device parameter extraction. We are currently extended this work for sub-45 nm CMOS device parameter extraction including using the surface potential based models.

Acknowledgements

This work was supported in part by the National Science Coun-cil of Taiwan under Contract NSC-96-2221-E-009-210 and Contract NSC-96-2752-E-009-003-PAE, and by the Ministry of Economic Af-fairs of Taiwan under Contract PSOC 93-EC-17-A-07-S1-0011. The author would like to thank Full Professor Dr. Jung Y. Huang of the Department of Photonics and Institute of Electro-Optical Engi-neering at National Chiao Tung University, Hsinchu, Taiwan for providing the problems of the silicon taper waveguide optimiza-tion and the photonic crystal design, and the reviewers for provid-ing constructive comments, which were very helpful in revisprovid-ing this paper.

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