Comparison of characteristics and integration of copper diffusion-barrier dielectrics

Comparison of characteristics and integration of

copper diffusion-barrier dielectrics

T.C. Wang

, Y.L. Cheng

, Y.L. Wang

*, T.E. Hsieh

, G.J. Hwang

, C.F. Chen

Department of Materials Science and Engineering, National Chiao-Tung University, Hsin-Chu, Taiwan b

College of Science and Engineering, National University of Tainan, Taiwan Available online 11 August 2005

Abstract

The characteristics of various copper (Cu) barrier layers, including SiN, SiCN, and SiCO, were investigated in this work. Carbon-based barrier films (SiCN and SiCO) improved the dielectric constant and line-to-line capacitance, but led to sacrifice in film deposition rate, diffusion-barrier performance, and adhesion strength to Cu in comparison with SiN films. In addition, SiN and SiCO films showed the superior electromigration (EM) performance and stress-induced void migration (SM) performance, respectively. Furthermore, the reliability results of SM and EM are strongly related to the barrier film stress characteristics and the adhesion strength between Cu layers. Therefore, optimization of the barrier layer stress and the enhancement of the interfacial condition between Cu and barrier films are crucial to significantly improve reliability.

D 2005 Elsevier B.V. All rights reserved.

Keywords: Barrier layer; Low dielectric constant; Adhesion strength; Capacitance

1. Introduction

The interconnect resistance – capacitance (RC) delay is a dominant factor in determining the performance of ultra large-scale integrated circuits as minimum device shrinks below 180 nm. Although many low-k (k < 3) materials has been used as interlayer dielectrics (ILD), high dielectric constant (k = 7 ¨ 8) of silicon nitride (SiN) film is still the primary candidate for the Cu cap barrier and etch stop layer (ESL) required in the Cu damascene process [1 – 3]. Thus, this increases the effective k value of stack dielectric films, and limits the reduction of the RC delay in ultra large-scale integration [4,5]. As a result, amorphous silicon carbide (SiC), amorphous silicon nitricarbide (SiCN), and amor-phous silicon oxycarbide (SiCO) deposited using a plasma-enhanced chemical vapor deposition (PECVD) system have received much attention for applications as Cu cap barrier and ESL in Cu damascene process [6 – 9]. The intrinsic properties of carbon-doped barrier films (SiCN and SiCO)

have been extensively investigated by many researchers

[10 – 12]. However, very few papers have studied the integration and reliability of barrier dielectrics in the Cu dual damascene process[13,14].

In this work, we investigated the physical properties, thermal stability, and integrated electrical performance for SiN, SiCN and SiCO dielectric barrier films. Furthermore, reliability results of electromigration (EM) and stress-induced voiding migration (SM) related to the deposited film’s properties were also studied.

2. Experiment

All thin film deposition was performed on an Applied Materials Producer system with a 200 mm DxZ chamber. The thin film was deposited on a p-type (100) silicon substrate by using radio frequency (13.56 MHz) PECVD. A gas mixture of trimethylsilane (3MS) and helium (He) were employed with either NH3 or CO2, which were used to

deposit SiCN or SiCO films, respectively. The detailed process conditions for different Cu barrier dielectrics are listed in Table 1.

0040-6090/$ - see front matterD 2005 Elsevier B.V. All rights reserved. doi:10.1016/j.tsf.2005.07.059

* Corresponding author. Tel.: +886 6 505 9688; fax: +886 6 5051262. E-mail address: [email protected] (Y.L. Wang).

Film thickness and refractive index (RI, at 633 nm wavelength) of all as-deposited films were analyzed by reflectometer and/or ellipsometer using the Nano-Spec\ 9100. The chemical composition was investigated using Rutherford Back-scattering Spectroscopy (RBS). The dielectric constant and leakage current of the barrier dielectric were measured by mercury (Hg) probe using current – voltage (I – V) and capacitance – voltage (C – V) method (5100 CV system) on 300-nm-thick films. The dielectric constant (k) was measured at 1 MHz.

The line-to-line leakage current was measured using a comb-type capacitor, which is a single damascene Cu interconnection with a line spacing of 180 nm. The line-to-line leakage current was measured with a DC source/ monitor system by applying 1 V.

EM studies were carried out on wafers with the 2-level metallization architecture at a temperature of 300 -C, applying a current density with 2 MA/cm2. The failure criterion was a 10% relative increase in resistance. The EM test pattern consisted of 20 contact vias linked with an underlying metal line, with a length of 1000 Am.

In SM testing, the samples were stored in a vacuum oven at a temperature of 175 -C for 500 h. The resistance measurement was performed at room temperature after thermal stress test. The SM failure criterion was 100% relative increase in resistance.

3. Results and discussions 3.1. Physical properties

Table 2 shows the basic film properties of different barrier dielectrics studied in this study. From the results, the deposition rates of SiCN and SiCO films range from 120 to 150 nm/min, about half of that of the SiN film. For all barrier dielectrics in this study, the deposition rate is favorable and well controlled for thin film deposition, as the barrier dielectric film used in the inter-layer dielectric (ILD) is around 50 nm thick.

The dielectric constant at 1 MHz consists of three components arising from electronic (ke), ionic (kion), and

orientational (kori) polarizations [6,10] is governed by the

following relation, kð1 MHzÞ ¼ ke n2

þ kionþ kori ð1Þ

The electronic polarization is the square of the refractive index (n) at 633 nm wavelength arising from the displace-ment of the electron shell relative to a nucleus. The ionic polarization results from the displacement of a charged ion with respect to other ions, and the orientation polarization arises from the change of orientation for the molecules with a permanent electric dipole moment in an applied electric field. As seen in Table 2, carbon-doped barrier dielectrics (SiCO and SiCN) exhibit lower dielectric constants related to SiN films, which is mainly contributed to the occurrence of alkyl groups (Si – CH3) groups, which reduce ionic (kion)

and orientational (kori) polarizations. Thus, this helps to

reduce the dielectric constant. Furthermore, the refractive index of the SiCO is the lowest, resulting in lower electronic dielectric constant, and thus lower dielectric constant at 1 MHz. This is because of the replacement of Si – C with Si – O bond in the SiCO film and the higher electronegativity of oxygen atom.

The stress of SiN, SiCN, and SiCO films at room temperature was 1.29 109

, 2.96 109

, and 2.26 109

dyne/cm2 in compressive, respectively. The compressive stress in these three barrier dielectrics is high enough to achieve a robust stack stability[11,15]. However, the largest stress change after the 420 -C annealing temperature was observed in SiCN films. The shift magnitude of the SiCN film after the 420 -C thermal cycle was about 1.26  109

dyne/cm2, which is significantly higher than that of SiN (1.02 109

dyne/cm2) and SiCO (1.20 109

dyne/cm2). It is speculated to the higher degree of porosity because of the presence of spacially occupied Si – CH3 groups. Although

the stress change of the SiCO film is higher than that of the SiN film, the stress of the SiCO film remains stable during thermal treatment process. This implies that SiCO films have excellent stress stability during thermal annealing. 3.2. Capacitance reduction

In order to investigate the barrier dielectric effect on the interconnect capacitance, the Cu wiring capacitance

struc-Table 1

The process conditions of various Cu barrier dielectrics

SiCN SiCO SiN

Chemical source 3MS + NH3+ He 3MS + CO2+ He SiH4+ NH3+ N2 Gas ratio 1 : 2 : 5 1 : 4 : 2.5 3 : 1 : 80 Deposition temperature (-C) 350 350 350 Deposition pressure (Pa) 400 400 560

RF power (W) 300 300 450

Table 2

Film properties of various Cu barrier dielectrics

SiCN SiCO SiN

Deposition rate (nm/min) 153.1 133.8 326.7

RI (633 mm) 1.946 1.8183 1.9126

Dielectric constant 5.27 4.555 7.26

Electronic (ke) 3.79 3.31 3.66

Ionic (kion), and orientational (kori) 1.48 1.25 3.60 RBS (Si/O/C/H/N) 26 : 0 : 18 : 37 : 19 28 : 13 : 26.5 : 32.5 : 0 45 : 0 : 0 : 12.5 : 42.5 Leakage current density

(10 9A/cm2_{at 1 MV/cm)}

22.90 8.97 1.48

Intrinsic stress (10 9dyne/cm2₎

2.69 2.26 1.26

Stress change after 450-C annealing (10 9dyne/cm2₎

ture illustrated inFig. 1(a), which follows standard 0.13 Am node design rules, was simulated using Raphael analysis.

Fig. 1(b) shows the simulation results of wiring capacitance for different barrier dielectric/low-k dielectric structures. The total capacitance of the low-k (OSG; k = 3.0)/SiCO structure can be reduced by about 16% compared to the FSG (k = 3.5)/SiN structure. On the other hand, the total capacitance of the FSG/SiCO structure can also be reduced by about 10%. However, if we change the ILD layer from FSG film (k = 3.5) to OSG film (k = 3.0), the total capacitance reduction is only 8%. As a result, it can be seen that the option of a low-dielectric constant barrier dielectric is essential in reducing the total capacitance of interconnects.

3.3. Cu barrier ability against the Cu penetration

The effect of various barrier dielectrics on the barrier ability against the Cu penetration was evaluated using secondary ion mass spectroscopy (SIMS) analysis. Thin Cu films were deposited on p-type wafers using electroplating. Following the 600-nm-thick Cu deposition, a barrier layer

(SiN, SiCN, or SiCO) with a 50-nm-thick film was deposited using a PECVD method. Finally, a layer of 50-nm-thick low-k (organo-silicate-glass; OSG) film was deposited to complete the test structure. The samples were then conducted by thermal annealing. The annealing condition was 400 -C for 1 h in a nitrogen atmosphere and the annealing process required 7 heating/cooling cycles in total. Next, analytical characterization was performed using SIMS to trace the Cu intensity within the test structure. A noticeable difference in the diffusion of Cu was observed as shown inFig. 2, where SiCO films have a poor Cu barrier efficiency. The poor barrier properties of the SiCO film against Cu penetration may be attributed to a higher percentage of micro-voids. Since SiCO films contain a rich carbon content, the molecular structure of SiCO film becomes more like a polymer, with less cross-linking, and an enhanced film porosity [12,15]. As a result, Cu atoms easily penetrate into the film. When the Cu diffusion depth is defined as the region with a three-order reduction in Cu concentration, the Cu diffusion depth for SiN, SiCN, and SiCO can be calculated as approximately 12, 25, and 35 nm. This indicates that when the thickness of a barrier layer is

(a)

(b)

Interconnect Layer

Top Metal Layer

Bottom Metal Layer

C_v C_v CL CL Line/Spacing=0.16/0.18µm 80% 85% 90% 95% 100% 105% 110% 3 5 7 9

Dielectric Constant of barrier layer

Capacitance Reduction (%) K=3.0(OSG) K=3.5(FSG) SiN SiCN SiCO 4 6 8

Fig. 1. (a) Schematic view of two-dimensional wring capacitance simulation structure. (b) Simulation results of wring capacitance dependence of the dielectric constant of low-k/barrier films (FSG/SiN = 1).

higher than 50 nm, this layer could efficiently prevent the Cu drift into the low-k dielectrics.

3.4. Adhesion strength between Cu and low-dielectric film

Fig. 3 shows the adhesion strength dependence for various barrier dielectrics with Cu and low-k films (FSG and OSG). The adhesion strength is in order of SiCO < SiCN < SiN for both low-k film cases. Additionally, the adhesion strength of barrier dielectrics with Cu is lower than that of barrier dielectrics with low-k films for these three types of barrier films. This indicates that the interface between the Cu and the barrier layers may be the weak point, which induces reliability issues. Notably, N-doped barrier dielectrics have the superior adhesion ability, indicating that the nitrogen element in the barrier film may provide a new chemical bonding with adjacent layers, which results in an increase of the adhesion strength.

3.5. Electrical performance

Fig. 4 shows the cumulative probability of 20 k via-chain resistance for three types of barrier dielectrics. The FSG/SiCO scheme shows a higher resistance and wider distribution than that of the FSG/SiN scheme. The possible explanation for this is that as the via etch extends into the barrier layer, the rich carbon content of the SiCO film enhances the polymer formation on the via-bottom. This contamination can outgass during metal deposition, result-ing in metal – oxide reaction products, and higher via resistance. As shown in Fig. 4, it is clear that there are no significant changes of via resistance after thermal stress (400 -C, 2 h), indicating a notable thermal stability for these barrier dielectrics.

1.0E-04 1.0E-03 1.0E-02 1.0E-01 1.0E+00 1.0E+01 1.0E+02 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 Sputter Depth (nm) Cu Intensity (Counts) SiN SiCN SiCO

OSG SiN, SiCN, or SiCO Cu

Fig. 2. SIMS profile of copper obtained with OSG/SiN, SiCN, and SiCO/Cu/TaN/Si structure.

0 10 20 30 40 50 60 70 80 90

SiCN SiCO SiN

Adhesion Strength (Gpa) Adhesion Strength with Cu Adhesion Strength with FSG Adhesion Strength with OSG

Fig. 3. Adhesion strength with Cu, OSG, and FSG for SiN, SiCN, and SiCO barrier films. 0.600 0.800 1.00 1.20 1.40 1.60 .01 .1 1 5 10 20 30 50 70 80 90 95 99 99.9 99.99 Rc (Ohm/via) Cumulative (%)

Hollow: Before Annealing Full : After Annealing SiN SiCN SiCO

Fig. 4. Via chain resistance distribution before and after annealing for SiN, SiCN, and SiCO barrier films.

3.6. Metal line-to-line leakage current

The leakage current distribution for various barrier dielectrics is compared in Fig. 5. Although the SiN film has the lowest blanket film leakage current at 2 MV/cm (shown in Table 2), Fig. 5 reveals that the line-to-line leakage current for these barrier dielectrics has no signifi-cant difference under a NH3plasma pre-treatment prior to

barrier layer deposition. In the case of an H2pre-treatment,

the line-to-line leakage current is one order of magnitude larger than that of the NH3plasma pre-treatment. This result

implies that the migration of the Cu atom is on the interface between the Cu and the barrier dielectric. A higher line-to-line leakage current for the H2pre-treatment is the result of

the weak adhesion strength between the Cu and the SiCO film. Therefore, it is concluded that the pre-treatment

modifies the surface condition between the Cu and the barrier dielectric, leading to excellent adhesion and a reduced amount of CuO at the Cu interface.

3.7. Electromigration (EM)

Fig. 6 shows the time to failure distribution of electro-migration plotted in a lognormal scale for SiN, SiCN and SiCO structures, respectively. Median Time to Failure (MTF) and standard deviations deduced from lognormal

plots are reported in Table 3. The MTF of the SiCO

structure was about 21.58 h, whereas in the SiN structure, the failure did not occur until 74.18 h. This result reveals that the electromigration resistance of Cu with SiN is much better than that with SiCN or SiCO film, where the SiCO structure shows the worst results. From the SEM analysis shown in Fig. 7, the extent and location of the voids were significantly different for three kinds of samples. There are two typical mode of the void formation. In the case of SiCN films, most voids were formed at the interface between the Cu and the SiCN film. For SiN films, voids were formed under the via-bottom. On the other hand, in case of SiCO film structures, both types of voids were observed. 10-15 10-14 10-13 10-12 10-11 10-10 .01 .1 1 5 10 20 30 50 70 80 90 95 99 99.9 99.99 SiN SiCN SiCO SiCO/H2 Treat

Leakage Current (A)

Cumulative (%)

Fig. 5. Metal line-to-line leakage current distribution for SiN, SiCN, and SiCO barrier films.

1 10 100 1000 SiOC SiN SiCN 0.050.1 0.2 0.51 2 5 10 20 30 40 50 60 70 80 90 95 98 99 99.9

Failure time (hours)

Cumulative Failure (%)

0.01

Fig. 6. Time to failure distribution for contact-via for SiN, SiCN, and SiCO barrier films.

Table 3

Electromigration results in the contact-via of various Cu barrier dielectrics

SiCN SiCO SiN

MTF (h) 51.39 21.58 74.18

r 1.01 1.08 0.43

Initial failure time (T0.1) 2.27 0.76 19.93 MTF is the measured median time to failure, and r is the standard deviation of natural log of the failure times.

e

-e

-0.5

µ

m

0.5

µ

m

(b)

(a)

The possible reason for these behaviors is the higher residual tensile stress of Cu line with the barrier dielectric, which induces a higher stress on the Cu line. As a result, the void nucleates due to higher residual tensile stress of Cu line with the barrier dielectric. As the voids form at the Cu/TaN surface, it results in the stress gradient as a chemical potential gradient, which in turn, leads to the diffusion of the Cu atoms. Consequently, as the interface weakens as with the Cu/SiCO interface, the voids grow along the Cu/SiCO interface (Fig. 7(a)). Since the implementation of SiN film as a Cu barrier layer can improve the adhesion ability between the Cu/SiN interface, most voids are constrained on the via-bottom (Fig. 7(b)). On the other hand, the higher residual compressive stress of SiCN film induces a high stress gradient on the via-bottom, which inhibits the electron migration along the grain boundary. Therefore, Cu atoms would migrate along the interface between Cu and SiCN films, which forms voids in the Cu/SiCN interface. From these observations, we can conclude that barrier dielectrics with excellent adhesion strength with Cu and a higher compressive stress possess a better EM performance[16 – 18].

3.8. Stress-induced-void migration (SM)

Stress-induced-void migration is one of the problems related to the reliability of Copper interconnects in semi-conductor devices. Repeated cycling from ¨ 400-C to room temperature causes residual film stress that can lead to stress migration failures. The difference in the coefficient of thermal expansion (CTE) of Cu and barrier dielectric makes stress management in the stack more challenge. Further-more, in the Cu fabrication process, the CVD process is performed at a high temperature, about 350 ¨ 400-C. As a result, a high temperature ambient causes Cu expansion during Cu-diffusion barrier layer deposition and shrinkage after deposition.

Table 4shows the relative failure frequency of resistance shift (> 100%) versus the tested barrier dielectrics, which was collected from 72 sites after 500 h baking at 175 -C. From the TEM observation on the failure sites, the Cu in the via was pulled up, resulting in Cu voiding at the via-bottoms (Fig. 8). In addition, SiCN films have the highest failure rate. Higher stress is thought to be applied to the Cu film in the via during the high temperature thermal treatment due to the higher CTE of the SiCN related to Cu. The expansion of the Cu wiring at process temperatures around 175 -C gives the stress the ILD around the Cu wiring. The Cu atoms in the vias were strongly squeezed out

by the thermal stress caused by barrier films with higher residual stress. On the other hand, SiCO films can prevent via degradation because the stress of the SiCO film is lower than that of SiCN and remains constant (shown inTable 2) after the 420-C thermal cycle. Less stress force was applied to the Cu film in the via during the thermal treatment. Therefore, the failure rate decreases when using SiCO films as the barrier dielectric. Although the intrinsic stress of SiN film is the lowest, the stress change is larger than that of SiCO film and moves from compressive to tensile stress after the 420 -C thermal annealing. This behavior is different from the Cu film stress – temperature cycle, and causes the stress mismatch between the Cu film and SiN films. From stress-induced-void migration results, barrier dielectrics with lower and more stable stress level would appear to suppress the void formation. However, this conclusion partly conflicts with EM requirements, which demand the excellent adhesion strength with Cu and a higher compressive stress for the Cu barrier dielectric. As a result, the optimization of the barrier dielectric properties and pre-treatment conditions seems to be a feasible method for obtaining robust reliability results. A more detailed study will be discussed in future publications.

4. Conclusion

This paper describes the film characterization of Cu barrier layers (SiN, SiCN, and SiCO) in detail, in conjunction with electrical and reliability results. Although SiCN and SiCO achieve a reduced dielectric constant, the biggest challenge is to achieve comparable robust integration as the C and O doping into the dielectrics causes integration problems, such as poor adhesion with Cu and a higher coefficient of thermal expansion. Experimental results show that SiCO films have the best stress-induced voiding resistance as a consequence of a lower and stable temperature – stress curve, but this is offset by poor electromigration due to poor adhesion. Conse-quently, optimization of the barrier layer stress and enhance-ment of the Cu barrier layer interface are needed to significantly enhance EM/SM reliability.

Table 4

The failure rate of the stress-induced voiding of various Cu barrier dielectrics

SiCN SiCO SiN

Failure site/total site 7/72 0/72 4/72

void

Stress-induced-Void

0.5

µ

m

Acknowledgement

The authors gratefully acknowledge the financial support of National Science Council (NSC) of Taiwan for this research project under Contract No. NSC91-2116-E-006-060.

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