• 沒有找到結果。

Computer-System Structure

N/A
N/A
Protected

Academic year: 2022

Share "Computer-System Structure"

Copied!
18
0
0

加載中.... (立即查看全文)

全文

(1)

* All rights reserved, Tei-Wei Kuo, National Taiwan University, 2002.

Contents

1. Introduction

2. Computer-System Structures 3. Operating-System Structures 4. Processes

5. Threads

6. CPU Scheduling

7. Process Synchronization 8. Deadlocks

9. Memory Management 10.Virtual Memory 11.File Systems

Chapter 2

Computer-System Structure

(2)

* All rights reserved, Tei-Wei Kuo, National Taiwan University, 2002.

Computer-System Structure

ƒ Objective: General knowledge of the structure of a computer system.

printer CPU

printer controller

memory controller

disk controller

memory

tape-drive controller

disks tape drivers

ƒDevice controllers: synchronize and manage access to devices.

* All rights reserved, Tei-Wei Kuo, National Taiwan University, 2002.

Booting

ƒ Bootstrap program:

ƒ Initialize all aspects of the system, e.g., CPU registers, device

controllers, memory, etc.

ƒ Load and run the OS

ƒ Operating system: run init to initialize system processes, e.g., various daemons, login processes, after the kernel has been bootstrapped.

(/etc/rc* & init or /sbin/rc* & init)

(3)

* All rights reserved, Tei-Wei Kuo, National Taiwan University, 2002.

Interrupt

ƒ Hardware interrupt, e.g. services requests of I/O devices

ƒ Software interrupt, e.g. signals, invalid memory access, division by zero, system calls, etc – (trap)

ƒ Procedures: generic handler or interrupt vector (MS-DOS,UNIX) process execution

interrupt

handler return

Interrupt Handling Procedure

ƒ Saving of the address of the interrupted instruction: fixed locations or stacks

ƒ Interrupt disabling or enabling issues: lost interrupt?!

prioritized interrupts Æ masking interrupted process

system stack fixed address

per interrupt type

interrupted address, registers ...

handler

(4)

* All rights reserved, Tei-Wei Kuo, National Taiwan University, 2002.

Interrupt Handling Procedure

ƒ Interrupt Handling

Î Save interrupt information

Î OS determine the interrupt type (by polling) Î Call the corresponding handlers

Î Return to the interrupted job by the restoring important information (e.g., saved return addr. Æ program counter)

indexed by a unique

device number

Interrupt Vector

0 1

n

--- --- --- --- --- ---

--- --- ---

Interrupt Handlers (Interrupt Service Routines)

* All rights reserved, Tei-Wei Kuo, National Taiwan University, 2002.

I/O Structure

ƒ The device drivers are responsible of moving data between the peripheral devices and their local buffer storages.

printer

CPU printer

controller

memory controller

DMA

memory

tape-drive controller

disk

tape drivers

registers buffers registers buffers

(5)

* All rights reserved, Tei-Wei Kuo, National Taiwan University, 2002.

I/O Structure

ƒ I/O operation

a. CPU sets up specific controller registers within the controller.

b. Read: devices Æ controller buffers Æ memory

Write: memory Æ controller buffers Æ devices

c. Notify the completion of the operation by triggering an interrupt

I/O Types

I/O system call

wait till the

completion •wait instruction (idle till interrupted)wait

•looping

•polling

•wait for an interrupt or

or a. Synchronous I/O

ƒ Issues: overlapping of computations and IO activities, concurrent I/O activities, etc.

Loop: jmp Loop

(6)

* All rights reserved, Tei-Wei Kuo, National Taiwan University, 2002.

I/O types

b. Asynchronous I/O

sync

wait till the completion wait mechanisms!!

*efficiency

* All rights reserved, Tei-Wei Kuo, National Taiwan University, 2002.

I/O Types

Hardware data transfer Interrupt handler

Device driver Requesting process

Hardware data transfer Interrupt handler

Device driver Requesting process

user

Kernel user

Kernel

Synchronous I/O

Time Time

Asynchronous I/O wait

(7)

* All rights reserved, Tei-Wei Kuo, National Taiwan University, 2002.

I/O Types

ƒ A Device-Status Table Approach

card reader 1 status: idle line printer 3 status: busy disk unit 3 status: idle

........

Request addr. 38596 len?1372 Request file:xx Record Addr. len

Request file:yy Record Addr. len

process 1 process 2

•Tracking of many I/O requests

•type-ahead service

DMA

ƒ Goal: Release CPU from handling excessive interrupts!

ƒ E.g. 9600-baud terminal

2-microsecond service / 1000 microseconds

High-speed device:

2-microsecond service / 4 microseconds

ƒ Procedure

ƒ Execute the device driver to set up the registers of the DMA controller.

ƒ DMA moves blocks of data between the memory and its own buffers.

ƒ Transfer from its buffers to its devices.

ƒ Interrupt the CPU when the job is done.

(8)

* All rights reserved, Tei-Wei Kuo, National Taiwan University, 2002.

Storage Structure

ƒ Access time: a cycle

ƒ Access time:

several cycles

ƒ Access time: many cycles

memory

Magnetic Disks registers

cache

CD-ROMs/DVDs Jukeboxes Tertiary Storage

removable media

Secondary Storage

nonvolatile storage

HW-Managed

SW-Managed

Primary Storage

volatile storage

CPU

* Differences:

Size, Cost, Speed, Volatility

* All rights reserved, Tei-Wei Kuo, National Taiwan University, 2002.

Memory

ƒ Processor can have direct access!

ƒ Intermediate storage for data in the registers of device controllers

ƒ Memory-Mapped I/O (PC & Mac) (1)Frequently used devices

(2)Devices must be fast, such as video controller, or special I/O instructions is used to move data between

memory & device controller registers

ƒ Programmed I/O – polling

ƒ or interrupt-driven handling

R1 R2

R3 . . .

Memory

Device Controller

(9)

* All rights reserved, Tei-Wei Kuo, National Taiwan University, 2002.

Magnetic disks

ƒ Transfer Rate

ƒ Random- Access Time

ƒ Seek time in x ms

ƒ Rotational latency in y ms

ƒ60~200 times/sec spindle

sector

cylinder

platter

r/w head

disk arm arm assembly track

Magnetic Disks

ƒ Disks

ƒ Fixed-head disks:

ƒ More r/w heads v.s. fast track switching

ƒ Moving-head disks (hard disk)

ƒ Primary concerns:

ƒ Cost, Size, Speed

ƒ Computer Æ host controller Æ disk controller Æ disk drives (cache ÅÆ disks)

ƒ Floppy disk

ƒ slow rotation, low capacity, low density, but less expensive

ƒ Tapes: backup or data transfer bet machines

(10)

* All rights reserved, Tei-Wei Kuo, National Taiwan University, 2002.

Storage Hierarchy

register

Main Memory Electronic Disk

Magnetic Disk Optical Disk

Cache

Magnetic Tape

Cost

High hitting rate

• instruction & data cache

• combined cache

Faster than magnetic disk – nonvolatile?!

Alias: RAM Disks

Sequential Access XX GB/350F

Speed

Volatile Storage

* All rights reserved, Tei-Wei Kuo, National Taiwan University, 2002.

Storage Hierarchy

ƒ Caching

ƒ Information is copied to a faster storage system on a temporary basis

ƒ Assumption: Data will be used again soon.

ƒProgrammable registers, instr. Cache, etc.

ƒ Cache Management

ƒ Cache Size and the Replacement Policy

ƒ Movement of Information Between Hierarchy

ƒ Hardware Design & Controlling Operating Systems

(11)

* All rights reserved, Tei-Wei Kuo, National Taiwan University, 2002.

Storage Hierarchy

ƒ Coherency and Consistency

ƒ Among several storage levels (vertical)

ƒMultitasking vs unitasking

ƒ Among units of the same storage level , (horizontal), e.g. cache coherency

ƒMultiprocessor or distributed systems

Memory Cache CPU

Memory cache CPU

Hardware Protection

ƒ Goal:

ƒ Prevent errors and misuse!

ƒE.g., input errors of a program in a simple batch operating system

ƒE.g., the modifications of data and code segments of another process or OS

ƒ Dual-Mode Operations – a mode bit

ƒ User-mode executions except those after a trap or an interrupt occurs.

ƒ Monitor-mode (system mode, privileged mode, supervisor mode)

ƒPrivileged instruction:machine instructions that may cause harm

(12)

* All rights reserved, Tei-Wei Kuo, National Taiwan University, 2002.

Hardware Protection

ƒ System Calls – trap to OS for executing privileged instructions.

ƒ Resources to protect

ƒ I/O devices, Memory, CPU

ƒ I/O Protection (I/O devices are scare resources!)

ƒ I/O instructions are privileged.

ƒUser programs must issue I/O through OS

ƒUser programs can never gain control over the computer in the system mode.

* All rights reserved, Tei-Wei Kuo, National Taiwan University, 2002.

Hardware Protection

ƒ Memory Protection

ƒ Goal: Prevent a user program from modifying the code or data structures of either the OS or other users!

ƒ Instructions to modify the memory space for a process are privileged.

kernel job1

……

job2

…… Limit register

Base register Ù Check for every memory address by hardware

(13)

* All rights reserved, Tei-Wei Kuo, National Taiwan University, 2002.

Hardware Protection

ƒ CPU Protection

ƒ Goal

ƒ Prevent user programs from sucking up CPU power!

ƒ Use a timer to implement time-sharing or to compute the current time.

ƒ Instructions that modify timers are privileged.

ƒ Computer control is turned over to OS for every time-slice of time!

ƒ Terms: time-sharing, context switch

Network Structure

ƒ Local-Area Network (LAN)

ƒ Characteristics:

ƒGeographically distributed in a small area, e.g., an office with different computers and peripheral devices.

ƒMore reliable and better speed

ƒ High-quality cables, e.g., twisted pair cables for 10BaseT Ethernet or fiber optic cables for 100BaseT Ethernet

ƒ Started in 1970s

ƒ Configurations: multiaccess bus, ring, star networks (with gateways)

(14)

* All rights reserved, Tei-Wei Kuo, National Taiwan University, 2002.

Network Structure

ƒ Wide-Area Network (WAN)

ƒ Emerged in late 1960s (Arpanet in 1968)

ƒ World Wide Web (WWW)

ƒ Utilize TCP/IP over ARPANET/Internet.

• Definition of “Intranet”: roughly speaking for any network under one authorization, e.g., a company or a school.

Often in a Local Area Network (LAN), or connected LAN’s.

• Having one (or several) gateway with the outside world.

• In general, it has a higher bandwidth because of a LAN.

* All rights reserved, Tei-Wei Kuo, National Taiwan University, 2002.

Network Structure – WAN

gateway

gateway TARNET

TARNET

HINET HINET

Intranet A Intranet AIntranet

A Intranet AIntranet Intranet

Intranet Intranet

router Intranet

Intranet

(15)

* All rights reserved, Tei-Wei Kuo, National Taiwan University, 2002.

Network Structure – WAN

ƒ Router

ƒ With a Routing table

ƒ Use some routing protocol, e.g., to maintain network topology by broadcasting.

ƒ Connecting several subnets (of the same IP-or- higher-layer protocols) for forwarding packets to proper subnets.

ƒ Gateway

ƒ Functionality containing that of routers.

ƒ Connecting several subnets (of different or the same networks, e.g., Bitnet and Internet)for forwarding packets to proper subnets.

Network Structure – WAN

ƒ Connections between networks

ƒ T1: 1.544 mbps, T3: 45mbps (28T1)

ƒTelephone-system services over T1

ƒ Modems

ƒ Conversion of the analog signal and digital signal

(16)

* All rights reserved, Tei-Wei Kuo, National Taiwan University, 2002.

Network Layers in Linux

PPP SLIP Ethernet

Internet Protocol (IP)

Network Layer ARP

TCP UDP

INET sockets

BSD sockets Kernel

Applications applications

* All rights reserved, Tei-Wei Kuo, National Taiwan University, 2002.

TCP/IP

ƒ IP Address:

ƒ 140.123.101.1

ƒ 256*256*256*256 combinations

ƒ 140.123 -> Network Address

ƒ 101.1 -> Host Address

ƒ Subnet:

ƒ 140.123.101 and 140.123.102

ƒ Mapping of IP addresses and host names

ƒ Static assignments: /etc/hosts

ƒ Dynamic acquisition: DNS (Domain Name Server)

ƒ /etc/resolv.confg

ƒ If /etc/hosts is out-of-date, re-check it up with DNS!

ƒ Domain name: cs.ccu.edu.tw as a domain name for 140.123.100, 140.123. 101, and 140.123.103

(17)

* All rights reserved, Tei-Wei Kuo, National Taiwan University, 2002.

TCP/IP

ƒ Transmission Control Protocol (TCP)

ƒ Reliable point-to-point packet transmissions.

ƒ Applications which communicate over TCP/IP with each another must provide IP addresses and port numbers.

ƒ /etc/services

ƒ Port# 80 for a web server.

ƒ User Datagram Protocol (UDP)

ƒ Unreliable point-to-point services.

ƒ Both are over IP.

TCP/IP

ƒ Mapping of Ethernet physical addresses and IP addresses

ƒ Each Ethernet card has a built-in Ethernet physical address, e.g., 08-01-2b-00-50-A6.

ƒ Ethernet cards only recognize frames with their physical addresses.

ƒ Linux uses ARP (Address Resolution

Protocol) to know and maintain the mapping.

ƒ Broadcast requests over Ethernet for IP address resolution over ARP.

ƒ Machines with the indicated IP addresses reply with their Ethernet physical addresses.

(18)

* All rights reserved, Tei-Wei Kuo, National Taiwan University, 2002.

TCP/IP

TCP header + Data

IP header Data

Ethernet header Data

An Ethernet frame

An IP packet

A TCP packet

• Each IP packet has an indicator of which protocol used, e.g., TCP or UDP

參考文獻

相關文件

* All rights reserved, Tei-Wei Kuo, National Taiwan University, 2005!.

* All rights reserved, Tei-Wei Kuo, National Taiwan University, 2001.. Operating

* All rights reserved, Tei-Wei Kuo, National Taiwan University, 2001.. Operating

* All rights reserved, Tei-Wei Kuo, National Taiwan University, 2001.. Operating

Tei-Wei Kuo, Embedded System and Wireless Networking Lab, National Taiwan University.. Real-Time

* All rights reserved, Tei-Wei Kuo, National Taiwan University,

* All rights reserved, Tei-Wei Kuo, National Taiwan University, 2001.. Operating

* All rights reserved, Tei-Wei Kuo, National Taiwan University,