Real-Time/Embedded Operating Systems & Resource Management
Tei-Wei Kuo, Ph.D.
ktw@csie.ntu.edu.tw
Dept. of Computer Science &
Information Engineering National Taiwan University Taipei, Taiwan, ROC
Contents
Overview
A General Architecture of Real-Time/
Embedded Operating Systems
Scheduling Strategies & System Analysis
Process Synchronization over IPC
Summary
* All rights reserved, Tei-Wei Kuo, National Taiwan University, 2002.
Overview
The Purposes of Operating Systems
Convenience
Efficiency
Characteristics of Many Real-Time/
Embedded Applications
More specific in their applications.
More drastic for their failures.
Overview
A Typical Control System Example
Rates -sensors & actuators, peripheral, control program
Phases - takeoff, cruise, and landing, etc.
sensors
actuators environment controlled
process
Task Executions
Clock
Display operator
* All rights reserved, Tei-Wei Kuo, National Taiwan University, 2002.
Overview
Potential Timing Hazards:
Loop
…...
Sensor();
……..
computation……
……..
t = time();
SleepTime := ReadyTime + PERIOD - t;
ReadyTime = ReadyTime + PERIOD;
Sleep(SleepTime);
EndLoop;
Loop Size?
Time Elapsed Here?
Timer Granularity?
Real Sleep Time?
???Multiprogramming???
Overview
General Concerns:
Could I verify the performance of my system?
How to avoid timing hazards?
Is there any good way in scheduling processes or allocating resources?
Æ Understand your operating system and hardware, and use resources intelligently!
* All rights reserved, Tei-Wei Kuo, National Taiwan University, 2002.
Contents
Overview
A General Architecture of Real-Time/
Embedded Operating Systems (RTOS’s)
Scheduling Strategies & System Analysis
Process Synchronization over IPC
Summary
A General Architecture of RTOS’s
Various Requirements
Predictability – Verifiability
Reliability – Strictness of Deadline Violations
Reconfigurability – System Size and Functionality
Efficiency of System Components – Time Granularity, Threads, and Resource
Management
Variable Models of Task Communication – Characteristics of Applications
* All rights reserved, Tei-Wei Kuo, National Taiwan University, 2002.
A General Architecture of RTOS’s
Objectives in the Design of Many RTOS’s
Efficient Scheduling Mechanisms
Good Resource Management Policies
Predictable Performance
Common Functionality of Many RTOS’s
Task Management
Memory Management
Resource Control, including devices
Process Synchronization
A General Architecture
Bottom Half Top Half processes User
Space
OS
hardware
Timer expires to
• Expire the running process’s time quota
• Keep the accounting info for each process
System calls such as I/O requests which may cause the releasing CPU of a process!
Interrupts for Services
* All rights reserved, Tei-Wei Kuo, National Taiwan University, 2002.
A General Architecture
2-Step Interrupt Services
Immediate Interrupt Service
Interrupt priorities > process priorities
Time: Completion of higher priority ISR, context switch, disabling of certain interrupts, starting of the right ISR (urgent/low-level work, set events)
Scheduled Interrupt Service
Usually done by preemptable threads
Remark: Reducing of non-preemptable code, Priority Tracking/Inheritance (LynxOS), etc.
ISR
I
Interrupt/ISR Latency
SecheduledService
IST Latency
A General Architecture
Scheduler
A central part in the kernel
The scheduler is usually driven by a clock interrupt periodically, except when voluntary context switches occur – thread quantum?
Timer Resolution
Tick size vs Interrupt Frequency
10ms? 1ms? 1us? 1ns?
Fine-Grained hardware clock
* All rights reserved, Tei-Wei Kuo, National Taiwan University, 2002.
A General Architecture
Memory Management
No protection for many embedded systems
Memory-locking to avoid paging
Process Synchronization
Sources of Priority Inversion
Nonpreemptible code
Critical sections
A limited number of priority levels, etc.
Contents
Overview
A General Architecture of Real-Time/
Embedded Operating Systems (RTOS’s)
Scheduling Strategies & System Analysis
Process Synchronization over IPC
Summary
* All rights reserved, Tei-Wei Kuo, National Taiwan University, 2002.
Scheduling Strategies &
System Analysis
Why a process in my application does not meet its deadline?
Factors:
Impacts from the executions of higher- priority processes – preemption cost
Lengthy execution time of the process
Blocking time from lower-priority processes – priority inversion
Scheduling Strategies &
System Analysis
Possible Questions:
How do I assign priorities to processes?
How are my processes scheduled by the OS?
How long is the blocking time/non-
preemptable critical sections (from lower- priority processes or interrupts)?
Æ Understand your schedulers
Fixed-Priorities or Dynamic Priorities
Preemptive or Non-Preemptive Scheduling
* All rights reserved, Tei-Wei Kuo, National Taiwan University, 2002.
Scheduling Strategies & System Analysis Scheduling Strategy
Major Components of a Scheduler
Priority Assignment Policy
The number of priority levels, e.g., 256?
Aging Effects?
Priority-Driven Scheduling Mechanism
Priority Queue
Thread Quantum?
Preemption Lock – Disabling of Preemption
etc.
Rate Monotonic Scheduling Algorithm
Assumptions:
all periodic fixed-priority processes
relative deadline = period
independent process - no non-preemptable resources
Rate Monotonic (RM) Scheduling Algorithm
RM priority assignment: priority ~ 1/period.
preemptive priority-driven scheduling.
Example: T1 (p1=4, c1=2) and T2 (p2=5, c1=1)
T1 T2 T1 T2 Time
0 1 2 3 4 5 6 7 8
* All rights reserved, Tei-Wei Kuo, National Taiwan University, 2002.
Rate Monotonic Scheduling Algorithm
Critical Instant 1
An instant at which a request of the process have the largest completion/response time.
An instance at which the process is requested simultaneously with requests of all higher priority processes
Usages
Worst-case analysis
Fully utilization of the processor power
Example: T1 (p1=4, c1=2) and T2 (p2=5, c1=1)
1 Liu and Layland, “Scheduling Algorithms for multiprogramming in a hard real-time Environment,” JACM, vol. 20, no. 1, January 1973, pp. 46-61.
T1 T2 T1 T2 Time
0 1 2 3 4 5 6 7 8
T2 T2
Rate Monotonic Scheduling Algorithm
Schedulability Test:
A sufficient but not necessary condition
Achievable utilization factorα
of a scheduling policy P -> any process set with total utilization factor no more than α is schedulable.
Given n processes, α =
Stability:
Let processes be sorted in RM order. The ith process is schedulable if
An optimal fixed priority scheduling algorithm
c p
i i
∑
( )
n 21/n −1
( )
c pj i
j j
i= ≤ i −
∑
121/ 1
* All rights reserved, Tei-Wei Kuo, National Taiwan University, 2002.
Schedulability Tests – A Sufficient Condition
Theorem 0 [Liu&Layland 73]: Aset of n periodic processes is schedulable if the total utilization factor of the process set is no larger than
Theorem 1 [Kuo, et al. 00]: Suppose that Ti-1 is schedulable. Let k be the number of roots in Ti.
If the total utilization factor of Tiis no larger than
then Tiis schedulable.
) 1 2
( 1n − n
) 1 2
( 1k − k
15 60
3
20
5
Schedulability Tests – Effects of Interrupts
Task Γ1 : C1 =20ms, P1 =100ms, U1=0.2 Task Γ2 : C2 =40ms, P2 =150ms, U2=0.267 Interrupt : Cint=60ms, Pint=200ms, Uint=0.3 Task Γ3 :C3 =20ms, P3 =350ms, U3=0.057
Γ1 Γ2
Γ3 Int
10 100 200 300
Exec with RM priority
Γ1 Γ2
Γ3 Int
10 100 200 300
Exec with an Interrupt priority
The last task was not affected!
* All rights reserved, Tei-Wei Kuo, National Taiwan University, 2002.
Schedulability Tests – Effects of Priority Mapping
Ready Queue
…
Priority-decreasing
0-3 4-7 8-11
proc[i] proc[j]
proc[k]
allproc
zombproc
freeproc
proc[j] …
proc[m] …
proc[n] …
exit() wait()
Let processes be sorted in RM order. The ith process is schedulable if
( )
(c ) /
p
c B
p i
j j
i i
i j
i + + i
≤ −
=
∑
−11 21 1
Rate Monotonic Analysis – A Sufficient & Necessary Condition
Rate Monotonic Analysis (RMA) 2
Basic Idea:
Before time t after the critical instance of process τi, a high priority process τj may request amount of
computation time.
Formula:
A sufficient and necessary condition and many extensions...
2 Sha, “An Intorduction to Rate Monotonic Analysis,” tutorial notes, SEI, CMU, 1992
Time
c t
j p
j
t
deadline of τi
t pj
0
for some t in
{kp jj| =1,..., ;i k=1,..., pi/pj }
( ) i
i j
j j
i t d
p c t t
W ≤ ≤
= ∑ = 1
* All rights reserved, Tei-Wei Kuo, National Taiwan University, 2002.
Rate Monotonic Analysis – A Sufficient & Necessary Condition
A RMA Example:
T1(20,100), T2(30,150), T3(80, 210), T4(100,400)
T1
c1 <= 100
T2
c1 + c2 <= 100 or
2c1 + c2 <= 150
T3
c1 + c2 + c3 <= 100 or
2c1 + c2 + c3 <= 150 or
2c1 + 2c2 + c3 <= 200 or
3c1 + 2c2 + c3 <= 210
T4
c1 + c2 + c3 + c4 <= 100 or
2c1 + c2 + c3 + c4 <= 150 or
.... Time
W3(t)
50 100 150 200 130
150 170 190 210
Rate Monotonic Scheduling Algorithm
RM was chosen by
Space Station Freedom Project
FAA Advanced Automation System (AAS)
RM influenced
the specs of IEEE Futurebus+
RMA is widely used for off-line analysis of time-critical systems.
* All rights reserved, Tei-Wei Kuo, National Taiwan University, 2002.
Earliest Deadline First Scheduling Algorithm
Assumptions (similar to RM):
all periodic dynamic-priority processes
relative deadline = period
independent process - no non-preemptable resources
Earliest Deadline First (EDF) Scheduling Algorithm:
EDF priority assignment: priority ~ absolute deadline.
i.e., arrival time t + relative deadline d.
preemptive priority-driven scheduling
Example: T1(c1=1, p1=2), T2(c2=2, p2=7)
T1 T2 Time
0 1 2 3 4 5 6 7 8
T1 T2 T1 T1 T2
Earliest Deadline First Scheduling Algorithm
Schedulability Test:
A sufficient and necessary condition
Any process set is schedulable by EDF iff
EDF is optimal for any independent process scheduling algorithms
However, its implementation has
considerable overheads on OS’s with a fixed- priority scheduler and is bad for (transiently) overloaded systems.
c p
j
j j
i= ≤
∑
1 1* All rights reserved, Tei-Wei Kuo, National Taiwan University, 2002.
Contents
Overview
A General Architecture of Real-Time/
Embedded Operating Systems (RTOS’s)
Scheduling Strategies & System Analysis
Process Synchronization over IPC
Summary
Synchronization & IPC
Why Inter-Process Communication (IPC)?
Exchanging of Data and Control Information!
Why Process Synchronization?
Protect critical sections!
Ensure the order of executions!
* All rights reserved, Tei-Wei Kuo, National Taiwan University, 2002.
Synchronization & IPC
Common Facility for IPC?
Shared Memory
Message Transmission
Common Facility for Synchronization?
Semaphores
Signals
Synchronization & IPC
Shared Memory
Characteristics: High
bandwidth and low latency, but very primitive!
Needs: Ways to
synchronize its access to avoid racing conditions!
Potential deadlocks/
livelocks/blocking problems
e.g., semaphores, bakery algorithm, etc.
flag[i]=TRUE;
while flag[j]
;
…
flag[i]=FALSE;
key=TRUE;
for(swap(lock,key); key==TRUE; ) swap(lock,key) ;
…
lock=FALSE;
Example 1:
Example 2: (initially, lock=FALSE)
Deadlock?
Livelocks?
* All rights reserved, Tei-Wei Kuo, National Taiwan University, 2002.
Synchronization & IPC
Message Transmission
Characteristics: Simple & clean
interface with various extensions: m:m communication, multi-machines
Needs: A priority-based message transmission/notification/processing mechanism
e.g., message priority, non-blocking library functions, notification of msg arrivals, servicing order of msgs (with respect to other threads in the system), etc.
A B
OS
Synchronization & IPC
General Concerns:
How to enforce mutual exclusion?
We should not rely on OS scheduling to avoid race conditions!
How to process critical messages first?
There is a tight coupling between
message processing and OS scheduling!
After all, we want to manage the priority inversion problem!
How to let critical jobs be done with minimized interferences from less important jobs!
* All rights reserved, Tei-Wei Kuo, National Taiwan University, 2002.
Synchronization & IPC
Solutions??
Synchronization Methods
Priority-Driven Resource Scheduling Support!
Popular Approaches
Semaphore-Based Synchronization?!
Signals are too slow.
Priority Inheritance?!
Ceiling?
Synchronization & IPC – Signals?
The Design of Signal Mechanisms
Inform processes/threads of the occurrences of exceptions or events
Posting of a signal to a process
An appropriate signal is added to the set of pending signals for the process.
Delivering within the context of the receiver
if (sig = CURSIG(p)) postsig(sig)
Signal handlers: user-mode routines
A B
OS
…
* All rights reserved, Tei-Wei Kuo, National Taiwan University, 2002.
Synchronization & IPC – Signals
Questions?
How fast can a signal be delivered?
Complicated actions done by OS
The length of a signal handler?
Signal handlers are executed prior to returning control to the user code.
Real-Time Support
Application-defined signals
Queuing of signals while being blocked.
Signals are delivered in the priority order.
etc
Synchronization & IPC – Can we manage the priority inversion problem?
What are the sources of priority inversion?
Synchronization and mutual exclusion
Nonpreemptable regions of code
FIFO of any other non-priority-based queues
Interrupts
A limited number of priorities
* All rights reserved, Tei-Wei Kuo, National Taiwan University, 2002.
Synchronization & IPC – Can we manage the priority inversion problem?
Popular Synchronization Methods
Nonpreemptable Critical Sections
Highest Locker’s Priority
Priority Inheritance
Priority Ceiling
1. Nonpreemptible Critical Section Critical sections are executed at an
“infinitely” high priority!
Synchronization Protocols
τL τM
τH
Note that τH &τM have no intention to enter a critical section!
Time
* All rights reserved, Tei-Wei Kuo, National Taiwan University, 2002.
Synchronization Protocols
2. Highest Locker’s Priority Protocol
Execute critical section at the priority of the highest-priority task that may lock the semaphore(/resource); higher-priority tasks may preempt the critical section.
τL τM τH τvH
Note that τvHis no longer blocked by τL
Time
3. Basic Inheritance Protocol (BIP) [Sha87]
Execute the critical section at the priority of the highest-priority task being blocked; higher-priority tasks may preempt the critical section.
τL S1
τM τH τvH
S1
S2
S2
S2
t
blocked blocked
Time
- Note that τM is no longer blocked until necessary.
- However, system may be deadlocked or have chained blocking!
Synchronization Protocols
S2 S1 & S2
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4. Priority Ceiling Protocol [Sha87]
BIP + a “Priority Ceiling” rule about when to grant lock requests (see [Sha 87, 90] )
τL S1
τM τH τvH
S1
S2 S1
blocked Time
- No deadlock & chained blocking at the cost of reducing the concurrency level of the system.
- Blocked-at-most-once.
Synchronization Protocols
blocked
S1
Summary of Synchronization Methods
Yes Yes
Priority Ceiling
No Bounded Priority Inheritance
Yes Yes
Highest Locker’s Priority
Yes Yes
Non-preemptible Critical Section
Deadlock Avoidance Blocked
at Once
* All rights reserved, Tei-Wei Kuo, National Taiwan University, 2002.
Contents
Overview
A General Architecture
Scheduling Strategies
Inter-Process Communication
Summary