考慮製程變異下應用Bootstrap信賴區間模擬空間相關性

國

立

交

通

大

學

電機學院 IC 設計產業研發碩士班

碩

士

論

文

考慮製程變異下應用 Bootstrap 信賴區間模擬空間相關

性

BOOTSTRAP CONFIDENCE INTERVALS AS AN APPROACH to

MODEL WITHIN-DIE SPATIAL CORRELATION UNDER PROCESS

VARIATIONS

研 究 生：蘇炳熏

指導教授：李育民 教授

考慮製程變異下應用 Bootstrap 信賴區間模擬空間相關性

BOOTSTRAP CONFIDENCE INTERVALS AS AN APPROACH to

MODEL WITHIN-DIE SPATIAL CORRELATION UNDER PROCESS

VARIATIONS

研 究 生：蘇炳熏

Student：Bing-Hsing Su

指導教授：李育民

Advisor：Yu-Min Lee

國 立 交 通 大 學

電機學院 IC 設計產業研發碩士班

碩 士 論 文

A Thesis

Submitted to College of Electrical and Computer Engineering National Chiao Tung University

in partial Fulfillment of the Requirements for the Degree of

Master in

Industrial Technology R & D Master Program on IC Design

January 2009

Hsinchu, Taiwan, Republic of China

考慮製程變異下應用 Bootstrap 信賴區間模擬空間相關性

學生：蘇炳熏

指導教授：李育民

國立交通大學電機學院產業研發碩士班

摘 要

隨著製程的技術進步及系統單晶片的到來，深次微米中的時序問題已越顯重

要。傳統以 corner value 為基礎的時序分析將會導致預測的時序被過分低

估。統計型靜態時序分析 ( Statistical Static Timing Analysis - SSTA)

就是利用統計的方式去描述這些製程偏差,把他們視為一些統計的隨機變數,

然後利用他們去預測時序並且得到更準確的結果。SSTA 使晶片設計者能得以

將時間餘裕(timing margin)及良率(yield)做最佳化以提升晶片效能和可靠

度。不同於其它論文之模型探討，本文考量實際製程變異及晶圓應用的可行

性 ， 提 出 一 個 實 用 且 新 穎 的 路 徑 學 習 重 複 取 樣 的 方 法 論 (path-based

learning methodology with Balanced Bootstrap re-sampling ) 。此方法

不須作任何timing model的假設，只須從現有寶貴的晶圓量測資料中，重覆

作re-sampling learning的動作，即可得到準確path delay的空間相關性

(spatial correlations)之推論。同時藉由建立信賴區間的方式，可得到path

delay correlation 和 path distance兩者之間的關係和趨勢，由此推論path

distance變化時，會有多少path delay的變化。此方法在晶圓廠有兩個方面

可應用:(1)在先進晶圓製程階段，使用re-sampling 方法，可對有限的晶圓

量測資料，快速建立近似的統計型時序模擬器。 (2)在成熟晶圓製作階段，

使用路徑學習方法，觀察測試晶片的量測資料，可取得統計型靜態時序分析

(SSTA)之建模(modeling)。

BOOTSTRAP CONFIDENCE INTERVALS AS AN APPROACH

to MODEL WITHIN-DIE SPATIAL CORRELATION UNDER

PROCESS VARIATIONS

student：Bing-Hsing Su

Advisors：Dr. Yu-Min Lee

Industrial Technology R & D Master Program of

Electrical and Computer Engineering College

National Chiao Tung University

ABSTRACT

With the advances to nanometer technologies and SOC, the process variation plays

a more important in the future. Traditional corner value timing analysis becomes less

effective and grossly conservative. Statistical timing models and simulation methods

are required to capture these variation effects. The methodology of statistical timing

analysis that characterizes time variables as statistical random variables offers a better

approach for more accurate timing predictions. SSTA enable designer to setup and hold

Timing Margins to optimize and improve the performance and reliability. The thesis

considers real process variations and fabrication implementation designs a practical test

chips and presents the implementation of a novel path-based learning methodology

with Balanced Bootstrap re-sampling that accounts for process variations and their

ii

spatial correlations. It doesn’t need timing model hypothesis and make the accurate

timing spatial correlation inference from fabrication measurement data. By

constructing the confidence interval of the spatial correlation, we can get correlations

and predictions for path delay and path distances. By this, we can know how many path

distance changes will cause how many path delay correlation changes. It can be applied

for two purposes. First, the bootstrap re-sampling can be used to produce a fast and

approximated simulator for statistical timing simulations in the advanced production

phase. Secondly, this path-based learning can be used as a vehicle to derive statistical

static timing analysis (SSTA) based on observed measured data from the test chips in

mature production phase.

誌 謝

這篇論文能夠順利地完成，首先要由衷地感謝我的指導教授 李育民博

士。每當我遭遇困難疑惑之時，老師總像一盞明燈，持續的給予我方向，

讓我能突破瓶頸，使得這篇論文能順利完成。

在實驗室裡，感謝培育學長寶貴的知識經驗傳承，正忠與國富在課業論

文上的討論與加油打氣，以及實驗室學弟懷中、宗祐平日的關心與幫

忙，使我紓解生活壓力，一路相伴與成長。

最後要深深地感謝我的老婆，負擔起家中大大小小的事，給我精神上最

大的支持，以及兩個寶貝兒女的陪伴關心。僅在此將本論文獻給你們，

共享這份喜悅與榮耀。

iv

Contents

1 Introduction

1.1 Introduction ………...………1 1.2 Motivation………..2 1.3 Contribution………...………3

2 Preliminaries

2.1 Process Variation………...4

2.2 Gate Length Variation………...4

2.3 Process Variation Decomposition……….4

2.4 Modeling of Spatial Correlation………5

2.5 Gate Length Spatial Correlation………6

2.6 Path-Base Spatial Correlation………8

2.7 The Path-Base Spatial Correlation Coefficient………..9

3

Bootstrap Confidence Intervals for the Correlation Coefficient

3.1 Bootstrap Concept………..……….……….10

3.2 Balanced Bootstrap……….……….….………...11

3.3 Bootstrap Confidence interval……….12

3.3.1 The Percentile Method……….……….12

3.3.2 The Bias-Corrected and Accelerated Method……….……..…13

3.3.3 The Normal Method……….……...14

3.4 Bootstrap Confidence Intervals for the Correlation Coefficient………..15

4 Experimental Results

……….……....16

4.1 Experiment Setup……….……....16

4.2 Path Correlations with Multivariate Normal Gate Length Variations……….……....17

4.3 Path Correlations with Multivariate Chi Square Gate Length Variations………...……21

List of Figures

Figure 1. Spatial Correlation Simulation………. ...6

Figure 2. Inverter trend array………...7

Figure 3. Path spatial correlation………...9

Figure 4. Flowchart of Bootstrap percentile confidence interval………..12

Figure 5. Flowchart of Bias-Corrected and Accelerated confidence interval………13

Figure 6. Flowchart of Bias-Corrected and Accelerated confidence interval………14

Figure 7. Flow of bootstrap of silicon data………15

Figure 8. Test Chip layout with multiplexor………..16

Figure 9. Gate length histogram……….17

Figure 10. A single inverter delay simulation with gate CD variations……….17

Figure 11. Path delay correlation distributions of inverter trend 1, 2 and 3………..18

Figure 12. The Histograms of correlation coefficients of Bootstrap of 5 by 5 inverter trend…..….18

Figure 13. Coverage rate for BCA, Percentile, Normal, Normal with filter and Fisher Z…………19

Figure 14. Confidence interval bound for delta x distance………20

Figure 15. Confidence interval bound for delta x distance………20

Figure 16. The histogram of a single gate length variation with chi square distribution…………..21

Figure 17. The Histogram of correlation coefficients of Bootstrap of 1 and 2 inverter trend…..….21

Figure 18. Coverage rate for BCA, Percentile, normal, normal with filter and Fisher Z…………..22

Figure 19. Confidence interval bound for delta x distance………22

Chapter 1

Introduction

1.1 Introduction

In today's fabrication processes, there are many process parameters including doping, gate oxidation thickness, gate length, etc. Our research focus here, gate length variation is the dominant source of delay variation. This is due to the fact that gate length variation affects the device at different steps throughout the fabrication process, such as lithography dose variation, focus variation, etch rate variation, etc. These accumulated variations result in the electrical function far away from the target. For example, gate length variation can induce threshold voltage shift, current change and timing delay. The gate length has high correlation to its neighboring so the spatial correlation is our main research purpose. We give an innovated learning base SSTA modeling with bootstrap re-sampling to discuss spatially correlated timing delay caused by gate length variations.

As we know, most of the sources of gate length variation are systematic in nature, and it is possible to remove these systematic variations. By our modeling, we can do it well and give a good perdition for it.

Although many researchers have dealt with process variations, most of them have ignored spatial correlations by simply assuming zero correlation among devices on the chip. The difficulty in considering spatial correlations between parameters is that it can result in complicated path correlation structures which are hard to deal with. The authors in [1] compute path correlations on the basis of pair-wise gate delay covariance and use an analytic method to derive lower and upper bounds of circuit delay. The authors of [2] manipulate the complicated correlation structure with the Principal Component Analysis (PCA) technique to transform the sets of correlated parameters into sets of uncorrelated variables. The statistical timing computation is then performed with a PERTlike circuit graph traversal. The statistical timing analyzer in [3] imposes upper bounds and lower bounds on the delay correlations. These bounds can then be refined through learning the actual delay correlations from the path delay testing on silicon. Most of them have the strong hypothesis about path delay modeling and don’t add process variation conditions into the modeling. Authors of [16], [20] propose a practical implementation to measure spatial correlation from test chips. It is good for huge silicon data but may be trouble in small data. In advanced technology, the process is not stable and silicon data are precious. How to use the limited silicon data to get the useful reference for spatial correlation modeling and how to validate the modeling with the silicon data is a hard topic

1.2 Motivation

SSTA is attractive because traditional worst-case corner timing analysis has become overly conservative due to the process variations. To take the advantage of SSTA technology in practice, the immediate challenge would be how to obtain an accurate and efficient statistical timing model. Many

methodologies have been proposed [4], [5] to get a reliable timing model. There are many sources of pessimism in statistical timing model analysis and many of them are dependent on the method used for analysis. How to model and handle spatial correlations in SSTA is also an important research topic. Various spatial correlation models have been introduced. In [6], the authors use PCA to handle spatial correlations. They assume all delay distributions to be Gaussians, and approximate the MAX operation of 2 or more Gaussian distributions to be Gaussian as well. In [7], they propose a canonical first-order delay model and use an incremental block based timing analyzer to propagate arrival times. Considering process variations into SSTA modeling are more important when the feature size of MOS transistor scales down to nanometers. Under process variations, parameters such as the gate length, the gate width and the metal line height are random variables. Among so many types of variation parameters, spatial correlations are recognized to have significant impact on timing of design [9], [10], and the accuracy of SSTA analysis [11]. Our primary goal is to demonstrate that path-based learning is indeed feasible, and shows how it can be applied in test and diagnosis applications. Many papers describe the process variation modeling but lack to account for it into spatial correlations. A learning procedure from fabrication silicon data to study SSTA is practical and useful. We can design test chips to investigate electrical device parameters and use inverter trend to simulate path delays. After getting the precious silicon data, we use methodologies to model spatial correlation matrix and apply it into statistical static timing analysis (SSTA) modeling.

3

1.3 Contributions

In this work, we propose a novel path-based learning methodology with Balanced Bootstrap

re-sampling that accounts for within-die process variations. By designing a test chip with the inverter trend array, we add gate length variations to the test chip and investigate the spatial correlation for the path delay. After running HSPICE to the test chip, we get the path delay and apply the Balanced Bootstrap confidence interval to estimate the spatial correlation. When the feature size of MOS transistor scales down to nanometers, the fabrication production cost is expensive and experiment silicon data is small. The Balanced Bootstrap can be applied for the small samples and doesn’t need any timing model hypothesis like normal path delay distributions. We demonstrate the Bootstrap confidence interval has a good coverage rate for the true spatial path delay correlation. We also provide a prediction bound of the path spatial correlation for different distances

Chapter 2

Preliminaries

2.1 Process Variation

As the feature size of silicon is scaling down and the wafer size is getting larger, process variation is increasingly difficult to model and analysis. The variation is due to two factors: environmental and physical. Environmental factors occur at run-time and physical factors occur

during the manufacturing of the circuit. Environmental process variation can decompose into lot to lot, wafer to wafer and die to die. Our research focuses on intra-die variation and the channel length (Leff )

variation is the emphasis. The reason is that MOSFETs are very critical to this type of variation and have large impacts on timing delay.

2.2 Gate Length Variation

For many process variation sources, gate length variation is the dominant source of the delay variation [8]. The gate length variation come throughout the fabrication process like focus variation, etch rate variation, scanner variation, etc. Gate length variations are pattern dependences. Close gates are higher similar length than far ones. In our thesis, we model gate length variation and put it into spatial correlations for path delays.

2.3 Process Variation Decomposition

We denote V as the measured gate length process parameter and model it as a random variable. Its overall variation can be decomposed into three distinct components: the inter-chip global variation X, the intra-chip spatial variation Y, and the purely uncorrelated random variation Z, i.e.,

V = v0 + X + Y + Z; (1)

where v0 is the mean value of V, and X, Y and Z are random variables. How to extract the systematic

variation has been studied in many papers [12], [13]. Our focus is on the zero-mean random variation components X, Y and Z. The inter-chip global variation X models the variation due to global variation effects. It is the same within the chip but different for different chips. The intra chip spatial variation Y models location-dependent variations within the chip. It is different at different locations within the same chip. The random variation Z models the purely uncorrelated random component that is not explainable by either the inter chip global variation X or intra-chip spatial variation Y. We assume

5

that X, Y and Z have mutually independent distributions. Hence, the variance of V can be given by _V2 _X2 _Y2_Z2 (2) Where σX2, σY2, andσZ2 are the variances of X, Y , and Z respectively. The σV2 is total variance.

2.4 Modeling of Spatial Correlation

In below 65nm technology, lithography of gate length CD has high correlated on neighboring patterns in the layout (proximity effect), the location in the layout (lens aberrations), and the density of features on the mask (flare). This implies that devices are more likely to have similar

characteristics in close area than devices that are far apart. It means that correlation function ρ(xi , xj ,

yi , yj ) between any two points (xi , yi) and (xj , yj ) depends only on the distance v between them, i.e.,

( ,x x y y_{i j}, _i, _j)( (x_ix_j)2(y_iy_j) )2 ( )v (3)

Suppose there are M chosen points on the chip and their joint spatial variation variable Y = (Y1,

Y2, …, YM)T forms a multivariate Gaussian process with respect to their locations on the chip [19].

Any two points correlation function ρ can be calculated by (3) and hence the correlation matrix of spatial variation variable S is formed in (4):

1 , 2 1 , 3 1 , 2 , 1 2 , 3 2 , 3 , 1 3 , 2 3 , , 1 , 2 , 3 1 . . . 1 . . . 1 . . . . . . . . . . . 1 M M M M M M



























                 (4)

For any two points V1 and V2 of measured gate length process parameters,

)] , cov( ) , cov(Vi Vj  XYi Z XYjZ ) ( ) )][( ( ) [(X Y Z E X Y Z X Y Z E X Y Z E  i   i  i   i  ] ) ( ( ][ ) ( ( [X Y EY Z X Y EY Z E  i i   j  j   2 2 ) , cov( _{i j Z} X Y Y      2 , 2 ) ( i j i j Z X  V       (5)

where ρ(vi,j) is the spatial correlation coefficient between two locations that are vi,j distance apart. The

same distance vi,j always corresponds to the same ρ(vi,j), regardless of their locations.

Those M chosen gate length process parameters form the joint distribution variable V = (V1, V2, …,

                   0 0 0 . . . ) ( v v V V E V  (6) ) ) ( )( ( (( ) ( 2 T V VarV E VEV VEV                   ) , cov( . ) , cov( ) , cov( ) , cov( . . . . . ) , cov( ... ) , cov( ) , cov( ) , cov( ) , cov( ... ) , cov( ) , cov( ) , cov( ) cov( ... ) , cov( ) cov( ) , cov( 3 2 1 3 3 3 2 3 1 3 2 3 2 2 2 1 2 , 1 3 1 2 , 1 2 1 M M M M M M M M V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V (7)

The cov(Vi,Vj) is defined in (5). From (1), we know that X, Y, Z are normal random variable so V is a

multivariate Gaussian process with mean μV and σV2.

2.5 Gate Length Spatial Correlation

The final ρ=ρx ×ρy . The result is shown in Figure 1.

7

There are other three commonly used spatial correlation function types: Linear, Exponential, and Gaussian } 1 , 0 max{ ) (h 2 h r   - Linear ) exp( ) (h 2 h r   - Exponential (10) ) exp( ) (h 2 h 2 r   - Gaussian

where h is (dx, dy) pair distance between two measure points and a is a fitting parameter.

In the exponential spatial correlation function, the distance can be separated into x distance dx and y distance dy. We can rewrite the equation to

) exp( ) exp( ) exp( ) exp( ) (h 2 h 2 dx 2 dy 2 dx 2 dy r          (11)

Let ρ1 to be the correlation between samples separated by one unit, ρ2 to be the correlation between

samples separated by two units, and so on.

Figure 2. Inverter trend array

Suppose we have n by n inverter arrays as Figure 2. The distance between any two neighboring inverters have the same one unit distance. From this hypothesis, (10) can be expressed as

dy dx dy dx dy dx dy dx h r( )exp(2 )exp(2 )   _   (12)

where ρis defined to ρ1=ρ1 and ρ2=ρ2. The gate length spatial correlation matrix for n by n inverter

arrays is ) . . . ( ) ( 1                      n n n n INV INV INV INV n n   

                         ) , ( . ) , ( ) , ( ) , ( . . . . . ) , ( ... ) , ( ) , ( ) , ( ) , ( ... ) , ( ) , ( ) , ( ) ( ... ) , ( ) ( ) , ( 3 2 1 3 3 3 2 3 1 3 2 3 2 2 2 1 2 , 1 3 1 2 , 1 1 1 n n n n n n n n n n n n n n n n INV INV INV INV INV INV INV INV INV INV INV INV INV INV INV INV INV INV INV INV INV INV INV INV INV INV INV INV INV INV INV INV                                                           1 ... ... ... 1 ... 1 ... 1 ) 1 ( ) 3 ( ) 1 ( ) 3 ( ) 1 ( ) 3 ( ) 1 ( ) 3 ( 0 1 0 2 ) 1 ( ) 2 ( 0 1 0 1 ) 1 ( ) 1 ( 0 2 0 1 n n n n n n n n n n n n                                        1 ... ... ... 1 ... 1 ... 1 4 2 3 2 2 2 4 2 2 3 2 2 2 2 n n n n n n                 (13)

From this analysis, we see that the correlation between Inverters closer together is weighted more strongly.

2.6 Path-Base Spatial Correlation

Given a n-stage path, the delay of each stage i can be characterized as a normal distribution di ~

N(μi, σi2 ) for 1 ≤ i ≤ n. The path delay Pd is the summation of these n normal distributions: Pd ~ N(μ,

σ2

) where μ = Σμi and σ2 = Σσi2+2ΣΣρijσiσj. The ρij denotes the correlation between the delay di and

delay dj,where ρij = 1 for i = j and ρij for i ≠j. If ρij = 0 for all i ≠ j, i.e. delays are mutually

independent. More generally speaking, given n delay random variables d1 . . . dn, their correlations can

be specified with a symmetric positive semi-definite n× n correlation matrix ρ =[ρij ].

Given two paths, Px and Py, and their gate delays, xi and yi, i=1, …, n. We can derive their

correlation as below. Corr(Px, Py) =  Cov(xi,yj) / PxPy Cov(xi,yj) = [xi,yj] xiyj Px = [xi, xj] xixj (14) Py = [yi,yj] yiyj CPx, Py = Corr(Px, Py) = C (, x, y )

If x’s, y’s are known, we have a function in terms of correlations C(). The Figure 3 illustrates the

9

Figure 3. Path spatial correlation

2.7 The Path-Base Spatial Correlation Coefficient

In the path learning step, we select two paths Pa and Pb, on the chip and measure their path

delays. Suppose we get Da = [x1,. . ., xm] and Db = [y1, . . . , ym] on m silicon data. If path delays of Pa

and Pb form the bivariate normal distribution, we can apply the Pearson’s correlation coefficient as

(15)

Each rab is a measured path correlation and rab is maximum likelihood estimation [17]. If all path

delays form a multivariate normal distribution, we can apply this way to find out the spatial correlation matrix. One may want to know three things: (1) how confident is the Pearson’s correlation coefficient? (2) How many samples the Pearson’s correlation coefficient need? (3) How to do if the path delay distribution is not a normal distribution? We will discuss them in next chapter

  





 

x



x



t

 

y



y



t t y x y x r i i i i i i i i i i i i i i i ab / / / 2 2 2 2           

Chapter 3

Bootstrap Confidence Intervals for the Correlation

Coefficient

3.1 Bootstrap Concept

Bootstrap is a data based simulation method for statistical inference. The basic idea of bootstrap is to use the sample data to compute a statistic and to estimate its sampling distribution, without any model assumption. The usual confidence interval, based on Student’s t distribution, is not appropriate due to the bias and skewness. The maximum likelihood estimators are dependent on an asymptotic distribution and may not be suitable for small samples. Most sampling distribution is unknown. The bootstrap uses the data and re-sampling to estimate that unknown sampling distribution.

Given a set of independent and identically distributed (iid) observations Xi, i=1… n. A parameter

is defined as the function of the values in the population θ = T(x), a statistic is defined as the function of the observations = T(x), and the bootstrap estimates the sampling distribution Fθ(x) of that

function. The data are used to estimate the unknown cumulative distribution function Fθ(x) of values

in the population. Bootstrap samples are repeatedly drawn from the estimated population and give a set of bootstrap values i=1,…, m. The empirical distribution of those bootstrap values (x) estimates the theoretical sampling distribution Fθ(x).

The bootstrap distribution (x) is used to estimate bias, estimate a standard error (SE) and construct a confidence interval for the statistic of interest. The Bb is the bootstrap bias estimation, and

sb is the bootstrap SE from m bootstrap values:

(16)

(17)

The procedure of Bootstrap is

(1) Given x = (x1, x2,…, xn) the (original-)sample.

(2) Draw B independent samples x1*, x2* ,..., xB*, all containing n data-values of x based on

drawing with replacement

(3) Calculate to each bootstrap-sample statistic of interest: = T(xi*) i= 1, 2, ..., B (4) Calculate (10) and (11) ˆ  i ˆ b Fˆ b Fˆ B B B i i b



  _  1 ) ˆ ˆ (  2 / 1 1 _ * ) ˆ ˆ (            



  B s B i i b    i ˆ

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3.2 Balanced Bootstrap

The balanced bootstrap is a selecting sampling method that can increase the precision of the bootstrap bias and SE. Under balanced bootstrap sampling, samples are generated in such a way that each original data point is present exactly B times in the entire collection of nB samples. Balanced bootstrap samples can be generated by constructing a population with B copies of each of the n observations, then randomly permuting that population. The first n permuted values are the first bootstrap sample, the second n permuted values are the second sample, and so on. The procedure of Balanced Bootstrap is

(1) Given x = (x1,x2,…,xn) the (original-)sample.

(2) Draw B independent samples x1*, x2*,..., xB*, all containing n data-values of x based on drawing

with replacement. n copies this. Then, we have total nB samples. Randomly permute nB samples. The first n permuted values are the first bootstrap sample, the second n permuted values are the second sample, and so on.

(3) Calculate to each bootstrap-sample your statistic of interest: = T (xi* (random permutation) ) i= 1, 2, ..., B

(4) Calculate (10) and (11)

 i

3.3 Bootstrap Confidence interval

Many methods have been proposed for constructing bootstrap confidence intervals [18]. We will discuss the most popular tree: the so-called percentile method, bias-corrected and accelerated method and normal method

3.3.1 The Percentile Method

We can define a 1 − α confidence interval for θ (For example, α= .05 denotes 95% confidence.) The interval between the 2.5% and 97.5% percentiles of the bootstrap distribution of a statistic is a 95% bootstrap percentile confidence interval for the (x). That is, we sort the B values of and throw out lowest (B+1)α/2 values, as well as the highest (B+1)α/2 values. The flowchart is shown in the Figure 4.

Figure 4. Flowchart of Bootstrap percentile confidence interval

b

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3.3.2 The Bias-Corrected and Accelerated Method

The percentile bootstrap endpoints are easy to get and can work well, especially if the sampling distribution is symmetrical. The percentile bootstrap confidence intervals may have bad coverage when the sampling distribution is skewed. Efron (1987) proposed the bias-corrected and accelerated (BCA) bootstrap method to correct for the percentile bootstrap. The BCA method allows for the distribution to be with around an unknown constant (i.e., “biased”) and with non-constant variance (i.e., the variance tends to “accelerate” across values in the sampling distribution). This method adjusts the endpoints of the bootstrap distribution for bias and non-constant variance. The flowchart is shown in the Figure 5.

3.3.3 The Normal Method

When the distribution of is asymptotically normal, we can get a confidence interval from the

familiar normal distribution. The estimation is the estimated from the original data and the estimate, , is from each bootstrap sample. The 1 - α/2 and α/2 quantile confidence interval is

(18)

The Bb is the bootstrap bias estimation, and sb is the bootstrap SE from (16) and (17). The flowchart is

shown in the Figure 6.

Figure 6. Flowchart of Bias-Corrected and Accelerated confidence interval ] ˆ , ˆ [ B_bz_(1/2)s_b B_bz_(/2)s_b ˆ ˆ  i ˆ

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3.4 Botstrap Confidence Intervals for the Correlation Coefficient

Pearson’s correlation coefficient, rxy, is often used to measure the association between two

sampled (data size n) variables, x and y. For binormally distributed data, Fisher’s (1921) transformation yields z being asymptotically distributed with variance 1/(n-3). However, most cases are nonnormal data distributions and make normal-theory-based intervals questionable. The bootstrap is a good candidate to solve these problems. There are no distributionary assumptions because it uses the data to simulate the distribution. We can use it to find a confidence interval for the correlation coefficient of two path delays.

Figure 7. Flow of silicon data bootstrap

From Figure 7, we measurer two path delays and use bootstrap re-sampling. We can get an approximation of the population distribution. If the path delay is approximated normal, we can use Bootstrap normal confidence interval to estimate spatial path delay correlations. If the path delay is skewed, we can use Bootstrap Bias-Corrected and Accelerated confidence interval to estimate delay correlations. If we know nothing about path delay, we can use Bootstrap percentile confidence interval to estimate delay correlations.

) 1 1 log( 5 . 0 xy xy r r z   

Chapter 4

Experimental Results

4.1 Experiment Setup

We design a novel test chip to run HSPICE to simulate path delay spatial correlations. Many papers propose the Ring Oscillator (RO) to find spatial process variation [14]. To get an efficient experiment result, we use the multiplexor with a 5 by 5 inverter trend in an inverter array. Each inverter trend has 900 inverters and the inverter trend array is 1640 um by 1640 um. The layout is shown in Figure 8. The inverter trend array can reduce process variations including photo impact, etch impact, CMP impact and micro loading impact. We simulate the 5 by 5 inverter trend delay with HSPICE simulations.

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4.2 Spatial Path Correlations with Multivariate Normal Gate Length Variations

To detail understanding the correlation of CD variation and delays, we first simulate the single inverter delay with gate length CD variations. Suppose the gate length variation is normal and its histogram is shown in Figure 9. Its delay after Hspice simulation is shown in Figure 10 and is high correlated to CD variations

Figure 9. Gate length histogram

68.5 68.0 67.5 67.0 66.5 66.0 65.5 65.0 3.1000E-11 3.0000E-11 2.9000E-11 2.8000E-11 2.7000E-11 L D el ay L gate vs Delay

Figure 10. A single inverter delay simulation with gate CD variations

For the 5 by 5 inverter trend, the gate CD variation is multivariate normal distribution with correlation matrix                               1 ... ... ... 1 ... 1 ... 1 ) 1 ( ) 3 ( ) 1 ( ) 2 ( ) 1 ( 2 ) 1 ( ) 3 ( 2 ) 1 ( ) 2 ( ) 1 ( 2 2 n n n n n n n n n n                 (19)

The correlation matrix is from (15) where n=25 & ρ=0.98.

To validate the accuracy of path base spatial correlation, we run Monte Carlo to generate 100000 patterns and set it as a golden set. The path delay distribution of the golden set is shown in Figure 11.

It shows inverter trend 1 and 2 has higher correlation than inverter trend of 1 and 3 due to the spatial distance. Close path distance has higher correlations.

Figure 11. Path delay correlation distributions of inverter trend 1, 2 and 3

We select 100 samples from the golden set and run 2000 bootstrap re-sampling for the 5 by 5 inverter trend. The delay spatial correlation of this is in Figure 12.

19

The histogram is approximated as normal distribution. Inverter trend 1 and 6 (in Figure 8) are most close and have the highest correlation distribution. The correlation of inverter trend 1 and 5 is lower due to the distance of them is far. The histogram variation of them is wide.

Confidence interval coverage rate is the probability that the confidence interval includes the true parameter from the population. If the coverage rate is the same as the stated size of the confidence interval, the intervals are accurate. We simulate 5 kinds of bootstrap confidence interval: Percentile method, Bias-Corrected and Accelerated method, Normal method, Normal method with outlier filter and Fisher Z. The normal with outlier filter is normal method excluding outlier with 3 standard variations.

The coverage rates are listed in Figure 13 with population size 100000, sample size 3000 and confidence α=95%

Coverage Rate for different Bootstrap times

0.94 0.942 0.944 0.946 0.948 0.95 0.952 0.954 0.956 1000 2000 3000 Bootstrap time C o v e ra g e R a te BCA_Percentile Normal Normal_Z_Filter Percentile Fisher_Z

Figure 13. Coverage rate for BCA, Percentile, Normal, Normal with filter and Fisher Z

The coverage rate is around 95% under confidence α=95%. The Bootstrap normal confidence interval is better than other bootstrap ones due to normal distributions of gate length variations. The Fisher Z confidence interval has the same performance with Bootstrap methods. This is also because normal gate length variations. From Figure 12, we investigate the coverage rate is better as bootstrap times increase.

The correlations of path delays to delta x direction distance and delta y direction distance are listed in the Figure 14 and 15. The delta x distance is two inverter trend distance in the x direction and the delta y distance is two inverter trend distance in the y direction. The path delay correlation decrease as the path distance increase. When the trends are closer, the bound is smaller. This is because long distances have low correlations and cause more variations from them.

Delta X distance vs Path correlation (Sample=3000) 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 0 1 2 3 4 5

Delta X distance (normalized)

P at h C o rr el at io n B=1000 Upper Bound B=1000 Lower Bound B=100 Upper Bound B=100 Lower Bound Real

Figure 14. Confidence interval bound for delta x distance

Delta Y distance vs Path correlation (Sample=3000)

0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 0 1 2 3 4 5

Delta Y distance (normalized)

P at h C o rr el at io n _{B=1000 Upper Bound} B=1000 Lower Bound B=100 Upper Bound B=100 Lower Bound Real

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4.3 Correlations with Multivariate Chi Square Gate Length Variations

Most path delays are not normal distributed. We demonstrate a gate length variation with chi square distribution. The Figure 16 shows the histogram of a single gate length variation.

Figure 16. The histogram of a single gate length variation with chi square distribution

For the inverter trend array, multi gate length variations are multivariate chi square distribution with the same correlation matrix (19) and ρ=0.98. We use Bootstrap methodology to resample the correlation coefficient of the path delay. The result is shown in Figure17. The histogram shows the correlation coefficient distribution is non-normal.

We simulate 5 kinds of Bootstrap confidence interval under the 95% confidence. The coverage rate is shown in Figure 18. The Bootstrap confidence intervals have 94.5% coverage rate but Fisher Z is lower about 93%. This is because the path delay is non-normal distribution and it is not suitable for Fisher Z confidence interval.

Figure 18. Coverage rate for BCA, Percentile, normal, normal with filter and Fisher Z

The correlations of path delays to delta x direction distances and delta y direction distances are listed in the Figure 19 and 20.

Delta X distance vs Path correlation (Sample=3000)

0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 1.1 0 1 2 3 4 5

Delta X distance (normalized)

P at h C o rr el at io n B=1000 Upper Bound B=1000 Lower Bound B=100 Upper Bound B=100 Lower Bound Real

23

Delta Y distance vs Path correlation (Sample=3000)

0 0.2 0.4 0.6 0.8 1 1.2 0 1 2 3 4 5

Delta Y distance (normalized)

P at h C o rr el at io n B=1000 Upper Bound B=1000 Lower Bound B=100 Upper Bound B=100 Lower Bound Real

Figure 20. Confidence interval bound for delta Y distance

The gap of the upper bound and the lower bound is big than normal case. This is because the data are skewed seriously.

Chapter 5

Conclusion

In this thesis, we have applied bootstrap re-sampling algorithm and path-based learning methodology to estimate the spatial correlation of the path delay on the test chip. From this way, we can get a confidence interval for spatial correlation with a good coverage rate. It is also applied to non-normal correlation distribution. The plot of the path distance and the path delay correlation give us a predation way and give designer guidance for timing analysis. For the future work, we can select an initial correlation matrix which fall into Bootstap confidence intervals and put the initial correlation matrix to SSTA models. With the Bayesian theory or other learning methodologies, we use new silicon data to adjust the initial correlation matrix. After repeating this, we can get a converged correlation matrix which approximates to the true value.

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