應用在802.11a和超寬頻系統之射頻CMOS線性功率放大器之設計

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(1)國. 立. 交. 電子工程學系. 通. 大. 學. 電子研究所碩士班碩士論文. 應用在802.11a和超寬頻系統之射頻CMOS線性功率放大器之設計. Design of RF CMOS linear Power Amplifier for 802.11a and UWB Applications. 研究生:林櫸壇指導教授:荊鳳德. 中華民國九十四年六月.

(2) 應用在802.11a和超寬頻系統之射頻CMOS線性功率放大器之設計. 學生: 林櫸壇國. 指導教授: 荊鳳德立. 交. 通. 電子工程學系. 大. 學. 電子研究所碩士班摘要. 可攜式的無線通訊系統元件的市場快速成長，對建立下一代的低功率射頻積體電路產品有很大的幫助。製程的進步使的CMOS單晶片的實現越來越容易，例如 IEEE 802.11a/b/g/n這樣的無線區域網路，和802.15.3a標準無線廣播服務將變的可行。這篇論文是關於設計射頻區塊中的重要元件―功率放大器的設計。第三章，設計一疊接架構的功率放大器。此功率放大器的最大輸出功率為22dBm，功率增益為26dB，P1dB為-3dBm，在3.3V的電壓供應下總電流消耗為204mA。第四章，設計一個利用電感電阻回授的3~10GHz超寬頻功率放大器。此功率放大器在 3~10GHz的範圍內，有13~0dB的功率增益，雜訊指數4~7dB。在3~6GHz的範圍內，P1db為4dBm，PAE低於3%。在1.2V的供應電壓下總功率消耗為74.4mW。全部的結果都根據ADS的模擬和台積電0.18µm製程。量測結果為國家奈米元件實驗室(NDL)中電路量測系統的量測結果。. II.

(3) Design of RF CMOS linear Power Amplifier for 802.11a and UWB Applications Student: Gi-Time Lin. Advisor: Albert Chin. Department of Electronics Engineering and Institute of Electronics National Chiao Tung University, Hsinchu, Taiwan, R.O.C. Abstract. The rapid growth of the market for portable wireless communication devices has given great push to the development of a next generation of low power radio frequency integrated circuits (RFIC) product. A single chip CMOS transceiver has been implemented available due to improve of process, some short range wireless systems such as IEEE 802.11a/b/g/n, Wireless Local Area Network (WLAN), and the 802.15.3a standards have made wireless computing and other broadband service possible. This thesis describes the design of key RF block in the UWB transceiver- the power amplifier. In the Chapter3, a power amplifier by using cascode configuration is designed. The PA allows the maximum output power 22dBm, and has power gain 26dB, P1dB at -3dBm, and total current consumption 204mA at DC supply 3.3V. In the Chapter4, it describes a 3~10GHz power amplifier for UWB application, by use inductor-resistor feedback configuration. In practical measurement, we have power gain 13~0dB, and noise figure 4~7dB from 3~10GHz. The P1dB is 4dBm and PAE is lower than 3% from 3~6GHz. Total power consumption is 74.4mW with vg 1.2V and vd 1.2V condition. All the above mentioned results are from simulation in ADS and using TSMC 0.18µm process. The practical measurement is according to NDL RFIC measurement systems.. III.

(4) 誌. 謝. 本篇碩士論文順利完成，首先感謝指導老師荊鳳德教授，老師熱誠的態度與對研究的敏銳度感染了實驗室每個同學，在老師的指導下順利完成學業，讓我學習到很多，成長了許多。在此致上我最深的尊敬與感謝。另外也要感謝交大電信所的孟慶宗教授，提供電路上的技術指導和建議。感謝電子所電信所的教授們，讓我修習的課程有豐富的收穫。感謝交通大學ED633實驗室的全體同學，感謝于殿聖博士，楊明誼博士和馬鳴汶學長在生活上的照顧，讓我能很快的融入新學校的生活，以及擁有一起出遊的美好回憶。感謝陳家忠學長、賴軍宏學長、洪彬舫學長、吳建宏學長、高萱玲學姊和陳建羽學長，給予我的建議與關心，提供我許多寶貴的經驗。感謝同屆的同學鄭存甫，曾月盈，李秋楓，賴照民。在學業上一起經歷這兩年，一起修課，一起寫作業，一起接受嚴厲考試的試煉；在生活上互相砥礪，在研究中有討論的同伴，一起經歷了美好的日子。感謝實驗室的學弟們，陳科閔、張國慶、王鴻瑋以及族繁不及輩載的學弟們，為碩士生活注入新鮮的活力。感謝我的室友，陳銘福、施義浩、陳啟宗，感謝你們容忍作息不正常的我，感謝你們幫我買便當，感謝我們住兩年的寢室７舍３２４室。感謝大學時代的朋友，高中時代的朋友，你們貼心關懷與支持讓我的腳步更堅定。最後感謝我的家人，我努力的動力，我不敢忘記家裡的需要與父母的辛苦，是你們讓我能有美好的環境，有機會挑戰自我的理想，抱歉讓你們操心了。感謝新竹，感謝交大，感謝土地公以及那些幫助我關心我的人。. IV.

(5) Contents Chapter1_INTRODUCTION. -1-. 1.1 RF CMOS Transceivers. -1-. 1.2 Wireless Transmission Protocols. -3-. 1.3 motivation. -6-. Chapter2_ Basic concepts of Power Amplifier. -7-. 2.0. -7-. 2.1. Introduction Amplifier parameter definitions. -8-. 2.1.1. Weakly nonlinear effects: Power and Volterra series. -8-. 2.1.2. Strongly nonlinear effects. -8-. 2.1.3. Nonlinear device models for CAD. -9-. 2.1.4. Gain match and Power match. -10-. 2.1.5. Knee voltage effect. -11-. 2.1.6. Load-Pull Measurement. -12-. 2.1.7. Input and output VSWR. -13-. 2.1.8. Power gain. -14-. 2.1.9. Output power and P1dB. -14-. 2.1.10. Power added efficiency (PAE), Drain efficiency (ηd), and Power utilization factor. -14-. 2.1.11. Spectral Regrowth. -15-. 2.1.12. Adjacent channel power ratio (ACPR). -16-. 2.1.13. Peak-to-Average Ratio (PAR). -17-. 2.1.14. Nonlinearity effect in power amplifier use two-tone analysis. -17-. 2.1.15. AM-to-PM Effect. -18-. 2.2 Class of power amplifiers. -19-. V.

(6) 2.2.1. Class A, AB, B, and C power amplifiers. -20-. 2.2.2. Class D, E and F power amplifier. -23-. 2.2.3. Power Amplifier Stability Issues. -24-. 2.3 Challenges of RF power amplifiers in CMOS technology. -25-. 2.3.1. Low breakdown voltage of deep sub-micron technologies. -25-. 2.3.2. Substrates coupling effects. -25-. 2.3.3. Large signal CMOS RF models. -25-. 2.3.4. Low-Q passive element at the output matching network. -26-. 2.3.5. Electro-migration and reliability of CMOS devices. -26-. Chapter3_ Simulation of 5.2GHz Power Amplifier for 802.11a Application by using cascade. -28-. 3.1. overview of 802.11a WLAN standard. -28-. 3.2. The PA issues of 802.11a transmitter. -29-. 3.3 Simulation of Power Amplifier for 802.11a application. -33-. 3.4 Simulation results of 5.2GHz Power Amplifier. -35-. 3.5. layout consideration. -40-. 3.6. Discussion. -41-. Chapter4_UWB CMOS Power Amplifier. -42-. 4.1. Introduction of IEEE802.15.3a and UWB. -42-. 4.2. Design of CMOS Power Amplifier for UWB. -47-. 4.2.1. The PA issues of UWB transmitter. -47-. 4.2.2. Wide Bandwidth Matching with Inductor-Resister Feedback. -28-. 4.2.3. Gain flatness of amplifier with inductor-resistor feedback. -51-. 4.2.4. Output matching with inductor-resistor feedback. -54-. 4.3 Simulation of Power Amplifier for UWB application. -54-. 4.4 Simulation results of UWB power amplifier. -56VI.

(7) 4.5 Layout and measurement consideration. -74-. 4.6 Experiment results. -76-. 4.7 Remark. -79-. Chapter5_Conclusion. -80-. REFERENCE. -81-. VII.

(8) List of Figures Figure 2.1: conjugate match and load-line match. -11-. Figure 2.2: knee voltage of deep sub-micron CMOS transistor is larger than typical power transistor. -12-. Figure 2.3: Typical configuration of load-pull. -13-. Figure 2.4: Spectral regrowth due to amplifier nonlinearity. -16-. Figure 2.5: phase-shift distortion with input power increases. -19-. Figure 2.6: classification of Power amplifier. -20-. Figure 2.7: Reduced conduction angle current waveform. -20-. Figure 2.8: Fourier component of power amplifier relate to conduction angle. -22-. Figure 2.9: RF power and efficiency with conduction angle sweep; assume optimum load and harmonic short.. -23-. Figure 3.1: Channel of EEE802.11a wireless WLAN. -29-. Figure 3.2: Efficiency vs. Back-off in PA for OFDM. -30-. Figure 3.3: Breakdown current of NMOS device. -31-. Figure 3.4: Practical measurement of I-V curve in NMOS. -32-. Figure 3.5: Typical amplifier design flow. -33-. Figure 3.6: Cascode configuration I-V curve and load-line simulation. -36-. Figure 3.7: Simulation of output band-pass filter. -36-. Figure 3.8: schematic of 5.2GHz PA. -37-. Figure 3.9: The stability of 5.2GHz PA. -38-. Figure 3.10: Gain and output power of 5.2GHz PA. -38-. Figure 3.11: IM3 of 5.2GHz PA. -39-. Figure 3.11: Input power vs. PAE in 5.2GHz PA. -39-. Figure 3.13: layout of PA. -41-. VIII.

(9) Figure 4.1: Example TX architecture for a multi-band OFDM system. -45-. Figure 4.2: The waveforms of DS-CDMA proposal. -46-. Figure 4.3:13 bands and 4 groups are divided by MB-OFDM. -46-. Figure 4.4: The power level of UWB. -47-. Figure 4.5: Parallel resonance circuits. -48-. Figure 4.6: A CS amplifier with inductor degeneration. -49-. Figure 4.7: A source degeneration amplifier with inductor-resistor feedback. -50-. Figure 4.8: The equivalent circuit of a source degeneration amplifier with inductor-resistor feedback. -51-. Figure 4.9: NMOS with resistor feedback. -51-. Figure 4.10: Gain characteristic of resistor feedback. -53-. Figure 4.11: Gain flatness of cascading two feedback. -53-. Figure 4.12: Schematic and simulation result of I-V curve. -57-. Figure 4.13: Simulation of input impedance of a source degeneration amplifier -58Figure 4.14: Input impedance of inductor-resistor feedback amplifier compare to equivalent. -59-. Figure 4.15: The gain and stability simulations of single stage inductor-resister feedback amplifier. -60-. Figure 4.16: Schematic and simulation result of I-V curve with inductor-resistor feedback.. -61-. Figure 4.17: Schematic of the two stage inductor-resistor feedback amplifier. -62-. Figure 4.18: Simulation of second stage with resistor feedback comparing to inductor-resistor feedback. -63-. Figure 4.19: Simulation of first stage with resistor feedback compare to inductor-resistor feedback. -64-. Figure 4.20: Simulation of inter-stage stability. -65IX.

(10) Figure 4.21: Stability simulation from 0~20GHz of UWB power amplifier. -66-. Figure 4.22: S parameters simulation of UWB power amplifier. -66-. Figure 4.23: Power gain and PAE simulation of UWB power amplifier. -67-. Figure 4.24: P1dB and IIP3 simulation of UWB power amplifier. -68-. Figure 4.25: RF corner SS at 16.8°C simulation of UWB power amplifier. -69-. Figure 4.26: RF corner-SS at 85°C simulation of UWB power amplifier. -69-. Figure 4.27: RF corner-SS at 125.0°C simulation of UWB power amplifier. -70-. Figure 4.28: RF corner-FF at 16.8°C simulation of UWB power amplifier. -70-. Figure 4.29: RF corner-FF at 85.0°C simulation of UWB power amplifier. -71-. Figure 4.30: RF corner-FF at 125.0°C simulation of UWB power amplifier. -71-. Figure 4.31: RF corner-TT at 16.8°C simulation of UWB power amplifier. -72-. Figure 4.32: RF corner-TT at 85.0°C simulation of UWB power amplifier. -72-. Figure 4.33: RF corner-TT at 125.0°C simulation of UWB amplifier. -73-. Figure 4.34: resistor variation by +50% simulation of UWB power amplifier. -73-. Figure 4.35: resistor variation by -50% simulation of UWB power amplifier. -74-. Figure 4.36: layout of UWB PA. -75-. Figure 4.37: S parameter measurement of UWB PA. -77-. Figure 4.38: power gain and NF measurement of UWB PA. -77-. Figure 4.39: P1dB measurement of UWB PA. -78-. X.

(11) List of Table Table 1.1: short-range wireless standards. -5-. Table 3.1: Simulation results of 5.2GHz PA. -40-. Table 4.1: IEEE 802.15.3a Requirements. -43-. Table 4.2: The simulation specification of UWB power amplifier. -74-. Table 4.3: Measurement compare to simulation of UWB power amplifier. -78-. XI.

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