Bidirectional Current Sensorless Control for the
Full-Bridge AC/DC Converter With Considering
Both Inductor Resistance and Conduction Voltages
Hung-Chi Chen, Member, IEEE, and Jhen-Yu Liao
Abstract—The full-bridge converter is often connected between the ac grid and the dc bus. In the conventional multiloop control, the inner current control loop shapes the ac-side current waveform, and the outer voltage control loop regulates the dc-bus voltage. In this paper, the single-loop bidirectional current sensorless control (BCSC) for the full-bridge ac/dc converter with considering both the inductor resistance and conduction voltage is first proposed. The average-value behavior of the full-bridge ac/dc converter is analyzed and it is simplified to an equivalent single-switch model. Based on this developed equivalent model, BCSC is designed and implemented in the FPGA-based system. There is only voltage control loop in the proposed BCSC (i.e., no current control loop), but BCSC is able to regulate the dc-bus voltage and shape the ac-side current. The provided results in both the rectifier operation and the inverter operation demonstrate the effectiveness of the proposed BCSC.
Index Terms—Current sensorless control, full-bride converter.
I. INTRODUCTION
T
HE four-switch full-bridge converter is a basic circuit topology in the power electronics due to its bidirectional ability in both the dc/dc conversion and the ac/dc conversion. In the past years, the pulse-width-modulation (PWM) rectifiers had been presented to replace the diode rectifiers for their high power-factor ability. Many topologies of PWM rectifiers had been studied. The full-bridge ac/dc converter as shown in Fig. 1 claims to provide the better input current waveform and the ability of the bidirectional operation [1]–[3].Recently, the full-bridge ac/dc converters are widely used in the single-phase rectifier application and the single-phase inverter applications, such as the power factor correction (PFC) [4], [5], the front end of the motor drive [6], [7], the photovoltaic generation system [8]–[11], the uninterruptible power source [12], and the dc microgrid system [13], [14].
Manuscript received November 1, 2012; revised February 19, 2013 and May 20, 2013; accepted May 21, 2013. Date of current version October 15, 2013. This work was supported by the National Science Council of Taiwan under Contract NSC 102-ET-E-009-004-ET.This paper was presented in part at IEEE Energy Conversion Congress and Exposition, Raleigh, NC, USA, September 15–20, 2012. Recommended for publication by Associate Editor A. Prodic.
The authors are with the Department of Electrical and Computer Engi-neering, National Chiao Tung University, Hsinchu 30010, Taiwan (e-mail: hcchen@mail.nctu.edu.tw; popoid1003@hotmail.com).
Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org.
Digital Object Identifier 10.1109/TPEL.2013.2265323
Fig. 1. Full-bridge ac/dc converter with the conventional multiloop control.
The multiloop control as shown in Fig. 1 is often used to control the full-bridge ac/dc converter [4]–[19]. There are two control loops cascaded in the multiloop control. The outer volt-age control loop regulates the dc-bus voltvolt-age Vo and the inner
control loop shapes the ac-side current is. The ac-side voltage
sign(Idc) is also sensed to obtain the phase information of the
ac grid for the inner current control loop.
In [4], the dual hysteresis current control loop was proposed to improve the current shaping performance. Additional switches were connected to the four-switch full-bridge converter to re-duce the dc-bus voltage ripple and thus, increase the power density [5]. The multiloop control was modified to reduce the circulating current in parallel full-bridge converters in [6], [7], and [10]. In addition, the maximum power point tracking scheme and the multiloop control were integrated to control the PV-based grid-tied system [8], [9]. For the parallel full-bridge in-verters, the multiloop control with the centralized voltage loop and the individual current loops was proposed in [12].
For the thyristor-based bidirectional ac/dc converter in [15], the voltage sensorless concept was implemented with the mul-tiloop control in which both the ac-side voltage and the dc-bus voltage were estimated from the sensed rising/falling rate of the inductor current. A PWM strategy for full-bridge ac/dc con-verter was proposed in [16] where two switches switch in the carrier frequency and the other two switches switch in the line frequency.
In current control loop, relatively high-resolution current A/D conversion is required over a wide range of the sensed ac-side currents, which increases the complexity, the power 0885-8993 © 2013 IEEE
TABLE I
SUMMARIZEDRESULTS FORVARIOUSCURRENTSENSORLESS CONTROLMETHODS
consumption, and the cost of the controller implementation [17]. In [17] and [18], the comparator-based sensing methods with-out using the real analog-to-digital converters (ADCs) were proposed to save the hardware cost in the multiloop control.
In order to remove the current measurement, numerous ap-proaches were proposed in [19]–[23] and tabulated in Table I. Like the voltage sensorless concept in [15], the inductor current in continuous conducting mode (CCM) was rebuilt by the sensed voltages [23]. All the listed current sensorless control methods were developed for the single-phase diode rectifier plus the boost converter, but not for bidirectional circuits. In addition, because that the rules in CCM are significantly simpler than those in discontinuous conduction mode (DCM), all the listed methods are developed based on CCM. Therefore, to guarantee operat-ing in CCM duroperat-ing the whole cycle, bulky inductors are often selected [19], [21], [22].
Both voltage control loop and current control loop exist in [21] and [23]. But only single voltage loop is included in [19], [20], and [22]. Recently, to obtain the accurate current estimation and reduce the accumulative error, the inductance, the inductor re-sistance, and the conduction voltage had been considered in [21] and [22]. The time delay had also been considered in [23]. It shows that considering only inductance cannot meet the current sensorless operation of the PFC function. In this paper, the bidi-rectional current sensorless control (BCSC) for the full-bridge converter is first proposed. Only the voltage control loop is in-cluded in the proposed BCSC, and both the inductor resistance and the conduction voltage are considered.
This paper is organized as following. In first, the behavior of a full-bridge converter is studied and it can be simplified to an equivalent single-switch model. Based on the developed model, the BCSC is proposed. By considering the power flow direc-tion and the polarity of the ac-side voltage, the four switching
Fig. 2. Full-bridge ac/dc converter with the proposed control method.
signals are generated. Finally, the provided simulation and the experiment results are able to verify the proposed BCSC.
II. SINGLE-SWITCHMODEL FOR THEFULL-BRIDGE AC/DC CONVERTER
Fig. 1 shows the full-bridge ac/dc converter with the pro-posed control configuration. A full-bridge converter with four switches is connected between the ac grid and the dc bus. Both the ac-side voltage vsand the dc-bus voltage Voare sensed. The
four switching signals GA +, GA−, GB +, and GB− are
gener-ated from the switching signal generator according to three input signals sign( ˆVL), sign (vs), and d(t). The switching signal d(t)
is generated from the proposed BCSC and the sign function sign(x) is denoted as
sign(x) =
1, when x≥ 0
0, when x < 0 . (1)
In order to represent the behavior of the full-bridge converter accurately, the inductor resistance and the voltage drops of the semiconductor devices are also considered in this paper. In ad-dition, CCM is assumed during the line cycle.
A dc power supply operated in constant current (cc) mode is connected to the dc bus to represent the direct power flow to the dc bus. Since the yielded current Iccof the connected dc power
supply cannot be negative (i.e., Icc≥ 0), a resistor R is also
connected in the dc bus to represent the load power in dc side. When the power flow VoIcc is larger than the load power
V2
o/R (i.e., the negative current Idc< 0), the dc-bus voltage Vo
would rise due to the capacitor C connected in the dc bus. In order to regulate the dc-bus voltage Vo, excess power should be
transferred from dc-side bus to ac grid and thus, the full-bridge converter needs to operate at the inverter mode. Contrarily, the full-bridge converter needs to operate at the rectifier mode when the power flow VoIccis smaller than the load power Vo2/R (i.e.,
the positive current Idc > 0).
Therefore, the signal sign(Idc) shown as the dashed line
in Fig. 2 is helpful in the derivation of the following single-switch model of the full-bridge converter. However, this signal sign(Idc) can be equivalently replaced by the other sign value
signal in the proposed BCSC. Therefore, the proposed control method does not need to sense any current in fact.
TABLE II
SUMMARY OFSWITCHINGSIGNALCOMBINATION
According to the switching signal d(t), the sign value sign (vs) of input voltage vsand the power direction signal sign (Idc),
four switching signals GA +, GA−, GB +, and GB− are
gener-ated based on the following rules. The summaries of generating rules are tabulated in Table II
GA + = sign(Idc)· sign(vs) + sign(Idc)· sign(vs)· d(t)(2)
GA−= sign(Idc)· sign(vs) + sign(Idc)· sign(vs)· d(t)(3)
GB += sign(Idc)· sign(vs)· d(t) (4)
GB−= sign(Idc)· sign(vs)· d(t). (5)
In the following sections, the behaviors at the rectifier mode and the inverter mode are studied, respectively.
A. Rectifier Operation(sign(Idc) = 1)
At the rectifier operation sign(Idc) = 1, only one switch
switches with the switching signal d(t) and the other three switches block. When the ac-side voltage is positive vs> 0,
only the switch TA− switches with the switching signal d(t)
and the other switches keep turning OFF. As the ac-side voltage is negative vs< 0, only the switch TA +switches with the signal
d(t).
According to (2)–(5), the gate signals during the positive input voltage (sign(vs) = 1) and during the negative input voltage
(sign(vs) = 0) can be summarized as (6) and (7), respectively.
Switching signal d(t) is either d(t) = 1 or d(t) = 0 GA + = 0, GA−= d(t), GB += 0, GB−= 0,
when positive voltage sign(vs) = 1 (6)
GA + = d(t), GA−= 0, GB += 0, GB−= 0,
when negative voltage sign(vs) = 0. (7)
The resulting current flowing paths during positive input volt-age and negative input voltvolt-age are plotted in Figs. 3 and 4,
Fig. 3. Current flowing path during positive input voltage vs> 0 (a) when the switching signal d(t) = 1, (b) when d(t) = 0.
Fig. 4. Current flowing path during negative input voltage vs< 0 (a) when the switching signal d(t) = 1, (b) when d(t) = 0.
respectively. When the switching signal d(t) = 1, the inductor voltage of Figs. 3(a) and 4(a) can be expressed as (8) and (9), respectively
vL = vs− VF − rLis, when positive voltage sign(vs) = 1
(8) vL = vs+ VF − rLis, when negative voltage sign(vs) = 0
(9) where the constant VF is assumed to represent the total
conduc-tion drops through the flowing path. Then, the inductor voltage in (8) and (9) for d(t) = 1 can be combined to the following
Fig. 5. Current flowing path during positive input voltage vs> 0 (a) when the switching signal d(t) = 1, (b) when d(t) = 0.
equation:
vL = vs− [2sign(vs)− 1]VF − rLis, when d(t) = 1.
(10) Similarly, the inductor voltage of Figs. 3(b) and 4(b) for d(t) = 0 can be expressed as (11) and (12), respectively
vL = vs− VF − rLis− Vo,
when positive voltage sign(vs) = 1 (11)
vL = vs+ VF − rLis+ Vo,
when negative voltage sign(vs) = 0. (12)
These two equations can be combined to the following equation
vL = vs− [2sign(vs)− 1]VF − rLis− [2sign(vs)− 1]Vo,
when d(t) = 0. (13)
B. Inverter Operation(sign(Idc) = 0)
At the inverter operation sign(Idc) = 0, two switches switch
with the switching signal d(t) and the others switch with the line voltage sign. When the ac-side voltage is positive vs > 0, the
switch TA +keeps turning ON and the switch TB−switches with
the complement switching signal d(t). The other two switches TB + and TA− keep turning OFF. As the ac-side voltage turns
to negative vs < 0, the switch TA− keeps turning ON and the
switch TB + switches with the complement switching signal
d(t).
The gate signals during the positive input voltage (sign(vs) =
1) and during the negative input voltage (sign(vs) = 0) can be
summarized as (14) and (15), respectively
GA + = 1, GA−= 0, GB + = 0, GB−= d(t) (14)
GA + = 0, GA−= 1, GB += d(t), GB−= 0. (15)
In addition, the resulting current flowing paths during positive input voltage and negative input voltage are plotted in Figs. 5 and 6, respectively. When d(t) = 1, the inductor voltage
Fig. 6 Current flowing path during negative input voltage vs < 0 (a) when the switching signal d(t) = 1, (b) when d(t) = 0.
of Figs. 5(a) and 6(a) can be expressed as (16) and (17), respectively
vL = vs+ VF − rLis,
when positive voltage sign(vs) = 1 (16)
vL = vs− VF − rLis,
when negative voltage sign(vs) = 0. (17)
From (16) and (17), the inductor voltage for d(t) = 1 can be simplified to the following equation:
vL = vs+ [2sign(vs)− 1]VF − rLis, when d(t) = 1.
(18) Likewise, from Figs. 5(b) and 6(b), the inductor voltage for d(t) = 0 can be represented together
vL = vs+ [2sign(vs)− 1]VF − rLis− [2sign(vs)− 1]Vo,
when d(t) = 0. (19)
C. Equivalent Single-Switch Model
By considering both (10) at the rectifier mode sign(Idc) =
1 and (18) at the inverter mode sign(Idc) = 0, the inductor
voltage can be expressed in terms of the power direction signal sign(Idc) and the voltage polarity signal sign(vs).
vL = vs− KFVF − rLis, when d(t) = 1. (20)
Similarly, from (13) and (19), the inductor voltage for d(t) = 0 can be expressed as
vL = vs− KFVF − rLis− KoVo, when d(t) = 0. (21)
Therefore, according to (20) and (21), the equivalent single-switch model for the bidirectional full-bridge ac/dc con-verter can be plotted in Fig. 7 where KF = [2sign(Idc)−
1][2sign(vs)− 1] and Ko= [2sign(vs)− 1] are two gains to
represent the effects of the total conduction voltage drop VF
Fig. 7. Equivalent single-switch modeling of the full-bridge AC/DC converter.
Fig. 8. Proposed BCSC.
III. PROPOSEDCONTROLLER
From the developed equivalent single-switch model of the full-bridge ac/dc converter, the average inductor voltagevLTs
can be calculated with multiplying (20) by the conducting time Ts· d(t)Ts and multiplying (21) by the blocking time Ts·
(1− d(t)Ts) wherevLTs represents the average value of the
inductor voltage vLwithin the switching period Ts.
Then, the average inductor voltagevLTs can be expressed
as
vLTs = vs− KFVF − rLis− Ko(1− d(t)Ts)Vo. (22)
A. BCSC
The proposed BCSC is plotted in Fig. 8 where the triangular signal vtrivaries between 0 and 1 periodically. A
proportional-integral (PI)-type voltage controller is used to regulate the dc-bus voltage Vo and shape the ac-side current waveform effectively.
Two signals cos(ωt) and sin(ωt) are generated from the action of the look-up table. Both cos(ωt) and sin(ωt) are synchro-nized to the zero-crossing instants of the ac-side voltage vsvia
the zero-crossing point detector (ZCP Detector).
The switching signal d(t) is obtained from the comparison of the control signal vcontand the triangular signal vtri. Thus, the
duty ratio of the switching signal d(t) can be expressed as d(t)Ts = 1− vcontTs. (23)
In order to yield a sinusoidal ac-grid current is = ˆIssin(ωt)
in phase with the ac-grid voltage vs, the average inductor voltage
vLTsmust follow the function cos(ωt). Thus, the desired
aver-age inductor voltaver-age can be expressed asvLTs = ˆVLcos(ωt)
where the bipolar signal ˆVL represents the inductor voltage
amplitude. Since the average inductor voltage vLTs is
ex-pressed as ˆVLcos(ωt), the yielded average inductor current
iLTs would be
iLTs =
ˆ VL
ωLsin(ωt) = ˆIssin(ωt). (24) By substitutingvLTs = ˆVLcos(ωt), (23) and (24) into (22),
the average control signalvcontTs needs to be
vcontTs= 1 Vo ⎧ ⎪ ⎪ ⎨ ⎪ ⎪ ⎩ vs [2sign(vs)−1]− [2sign(Idc)−1]VF − VˆL [2sign(vs)−1] cos(ωt)+rL ωLsin(ωt) ⎫ ⎪ ⎪ ⎬ ⎪ ⎪ ⎭ . (25) The average value of the yielded instantaneous power ps=
vs· isTs within the switching period Tsbecomes
ps= ˆ VsIˆs 2 (1− cos 2ωt) = ˆ Vs 2ωLVˆL− ˆ Vs 2ωLVˆLcos 2ωt. (26) Furthermore, the average power P from ac grid to dc bus is the average value of the instantaneous powervs· isT within
the line period T = ω/2π.
P =vs· isT =
ˆ Vs
2ωLVˆL. (27)
B. Replacement for signIdc
Equation (27) is very important for the proposed BCSC. First, the signal ˆVL is bipolar, and thus, the yielded power flow P is
bidirectional. It means that the proposed BCSC is able to operate in both the rectifier operation and the inverter operation.
In addition, the sign value sign( ˆVL) = 1 means that the
average power is positive P > 0 (i.e., rectifier operation with sign(Idc) = 1). Zero value sign( ˆVL) = 0 means negative
aver-age power P < 0 (i.e., inverter operation with sign(Idc) = 0).
Therefore, the sign value sign( ˆVL) can be used to equivalently
replace for the sign value sign(Idc) shown in Table I, Fig. 2, and
(25). The resulting control signal vcontcan be obtained by
vcontTs = 1 Vo∗ |vs| − [2sign( ˆVL)− 1]VF − ˆVL cos(ωt) + rL ωLsin (ωt) (28)
where cos(ωt) = Kocos(ωt) and sin(ωt) = Kosin(ωt). The
first term in the right-hand of (25) is equal to the rectified input voltage|vs|.
Based on (28), the control signal vcontof the proposed BCSC
is plotted in Fig. 8. Because that the signal sign(Idc) is
equiva-lently replaced by the sign value sign( ˆVL), the proposed BCSC
does not need to sense the dc bus current Idc in fact.
C. PI-Type Controller
The transfer function of the output voltage perturbation ΔVo due to the controller output signal Δ ˆVL can be obtained from
the instantaneous power balance ps= pC + pdcbetween the
ac-side power ps, the dc-side delivered power pdcand the capacitor
From (22), the instantaneous power pscan be written as
ps =
ˆ vs
2ωL( ˆVL + Δ ˆVL)(1− cos 2ωt). (29) The dc-side delivered power pdc with the small perturbation
Δpdccan be represented by the voltage command ΔVo∗plus the
perturbation ΔVo pdc = (Vo∗+ ΔVo)2 R ≈ (Vo∗)2 R + 2Vo∗ΔVo R . (30)
The capacitor power pC can be represented by the voltage
perturbation ΔVo pC = d(1 2C(Vo∗+ ΔVo)2) dt ≈ CV ∗ o dΔVo dt . (31)
By neglecting the double line-frequency component in the instantaneous power ps, substituting (29)–(31) into the balance
ps= pC + pdc can yield the following small-signal transfer
function Gs(s) Gs(s) = ΔVo(s) Δ ˆVL(s) = Vˆs 2ωLCVo∗ 1 (s +R C2 ). (32) Obviously, the small-signal behavior of the dc-bus voltage can be seen as a first-order model. Thus, the output voltage can be well regulated by including the PI-type controller in the proposed BCSC. After choosing the ratio of proportional gain kP and the integral gain kI to the pole of Gs(s)
kI
kP
= 2
RC (33)
the closed-loop transfer function of the output voltage ΔVoand the output voltage command ΔVo∗can be obtained
ΔVo(s) ΔVo∗(s) = kP ˆ Vs 2ω L C Vo∗ s + kP ˆ Vs 2ω L C Vo∗ . (34)
The closed-loop transfer function (34) can be seen as a low-pass filter. In order to avoid the effect of the double line-frequency voltage ripple in dc voltage bus, the cutoff line-frequency of (34) is chosen to be far smaller than the double line frequency. Therefore, the proportional gain can be chosen by
kP =
ω2LCV∗
o
50 ˆVs
. (35)
IV. SIMULATIONRESULTS
In this section, a series of computer simulations are performed to demonstrate the proposed BCSC. Some nominal values and circuit elements are listed in Table III. The simple PI-type volt-age controller is used to regulate the output voltvolt-age and shape the current waveform.
In the simulation, a resistor R = 80 Ω is connected to the dc bus and a current source Icc is also connected to dc bus
to represent the direct power flow to the dc bus. When the current source Iccis zero, the full-bridge ac/dc converter needs
to operate in the rectifier mode to transfer the average power 500 W from ac grid to dc bus to regulate the dc-bus voltage. Once the current Iccis larger than 2.5 A, the full-bridge converter
TABLE III SIMULATIONPARAMETERS
needs to operate in the inverter mode to move some power from dc bus to ac grid.
A. Pure Sinusoidal Grid Voltage
The simulated waveforms when the full-bridge converter op-erates in the rectifier mode and in the inverter mode are plotted in Fig. 9(a) and (b), respectively. The input current isis sinusoidal
in phase with the input voltage vsand the voltage amplitude ˆVL
is tuned to about 12.0 V.
In Fig. 9(a), the current Icc is set to zero, and the dc-side
power is near 500 W. To supply the dissipated energy of the resistor R = 80 Ω, the full-bridge converter needs to provide the power flow near 500 W to dc bus. Two synchronized signals cos(ωt) and sin(ωt) with double line frequency are generated from the alignments to the ZCPs of the ac-grid voltage. The voltage waveform vabshows that the used PWM method can be
seen as the unipolar PWM method, but its ripple frequency is the same as the carrier frequency.
In this simulation, the inductor resistance and the conduction voltages of the semiconductor devices are not set to zero. With consideration of the loss of the full-bridge converter, the yielded average power is near 530 W larger than 500 W.
On the contrary, when the current source Icc is set to 5 A,
the total dc-side power now is−500 W. In order to regulate the dc-bus voltage, near 500 W power needs to be transferred from dc bus and thus, the full-bridge ac/dc converter turns to the inverter mode as shown in Fig 9(b). The yielded current is sinusoidal and the steady-state value of the voltage amplitude signal ˆVL is about−9.7 V. It is noted that the net power flow
into ac grid is near 470 W smaller than 500 W due to the loss of the full-bridge converter.
Therefore, the steady-state amplitude ˆVL is not equalized.
When the system absorbing power from ac grid, the steady state ˆ
VL is about 12.0 V, but when the system is delivering power to
the ac grid, the steady state ˆVL is about−9.7 V, not −12 V.
B. Distorted Grid Voltage
In the practical condition, the input voltage is often distorted due to the input inductance as shown in Fig. 2. To evaluate the performance of the proposed BCSC, the simulated waveforms with distorted input voltage at the rectifier mode and the inverter mode are plotted in Fig. 10(a) and (b), respectively. Although the ac-grid voltage vsis distorted, the yielded input currents isare
Fig. 9. Simulation results when the full-bridge converter operates (a) in recti-fier mode with average input power≈530 W (Ic c= 0 A), (b) in inverter mode
with average input power≈−470 W (Ic c= 5 A).
closed to the sinusoidal waveforms. It shows that the proposed BCSC is also able to work well with the distorted input voltage. The simulated steady-state waveforms without considering the inductor resistance and the conduction voltage (i.e., with considering only inductance) at the rectifier mode and the in-verter mode are plotted in Fig. 11(a) and (b), respectively. The current initiates flowing at one ZCP, but falls to zero prior to the next ZCP. The resulting zero-current duration makes power
fac-Fig. 10. Simulation results with distorted input voltage (a) in the rectifier mode with the average power≈530 W (i.e., Ic c= 0 A), (b) in the inverter mode
with the average power≈−470 W (i.e., Ic c= 5 A).
Fig. 11. Simulation results with considering only inductance (a) in the rectifier mode with the average power≈530 W (i.e., Ic c= 0 A), (b) in the inverter mode
with the average power≈−470 W (i.e., Ic c= 5 A).
tor leading and introduces larger current harmonics. The results show that the proposed BCSC without considering the parasitic effects is still stable, but yielded current waveform may not be acceptable.
In practice, the circuit parameters may change due to the heat from the power loss. As the inductor temperature increases, the resistance may increase but the inductance may decrease, which contributes to the circuit uncertainty.
With 10% changes of the circuit parameters rL = 0.5 Ω×
1.1, L = 4.6 mH× 0.9 and no change of the control pa-rameters rL = 0.5 Ω, L = 4.6 mH, the simulated steady-state
Fig. 12. Simulation results with circuit parameters rL= 0.5 Ω× 1.1 and L = 4.6 mH× 0.9 (a) in the rectifier mode with the average power ≈530 W (i.e., Ic c= 0 A), (b) in the inverter mode with the average power≈−470 W
(i.e,. Ic c= 5 A).
waveforms at the rectifier mode and the inverter mode are plot-ted in Fig. 12(a) and (b), respectively.
The results show that the proposed BCSC is stable, but the circuit yields larger current harmonics than the uncertainty-free case as shown in Fig. 10. However, the current waveforms in Fig. 12 are better than the special case with considering only inductance as shown in Fig. 11, which also shows the benefits of considering the resistance and the conduction voltage in this paper.
The simulated waveforms with the average power≈320 W (i.e., Icc = 1.0 A) and input voltage 90 Vrms are plotted in
Fig. 13(a). Additionally, the simulated waveforms with the av-erage power≈−750 W (i.e., Icc= 6.5 A) under input voltage
130 Vrms are plotted in Fig. 13(b).
The yielded currents initiate flowing at the voltage ZCPs, and returns to zero near the next ZCPs, which shows that the proposed BCSC is able to work under various power levels and various input voltages. However, the reported total harmonic distortion (THD) value in Fig. 13 is smaller than the uncertainty-free case as shown in Fig. 10. It means that the circuit parameters need to be optimized to yield the smallest current harmonics at the rated conditions.
C. Transient Response
In order to evaluate the transient performance of the proposed BCSC, the simulated waveform with the sudden change of dc current source from Icc= 0 A to Icc= 4 A and from Icc= 4 A
to Icc= 0 A are plotted in Fig. 14(a) and (b), respectively.
In Fig. 11(a), the current Iccincreases suddenly from 0 to 4 A,
and the dc-side current Idchas a sudden drop from 2 to−2 A.
The sudden change contributes to the rapid rise of the dc-bus
Fig. 13. Simulation results with various power levels and various input volt-ages (a) with the average power≈320 W (i.e., Ic c= 1.0 A) under input voltage
90 Vrms, (b) with the average power≈−750 W (i.e,. Ic c= 6.5 A) under input
voltage 130 Vrms.
voltage Vo. It means that the full-bridge ac/dc converter needs
to operate at the inverter mode to sweep the power imbalance. At the same time, the negative voltage error εV turns to
neg-ative, and thus, the PI-type controller tunes its output ˆVL from
the positive value 9.2 V to the negative value−7.9 V in order to regulate the dc-bus voltage Vo. After less than 40 ms, the
dc-bus voltage is restored and the yielded input current is near sinusoidal waveform.
Due to the input inductance in the ac grid, the measured volt-age vsin the rectifier operation is the infinite bus voltage minus
the voltage drop of the inductor. But in the inverter operation, the voltage drop is negative and the ac-grid voltage vswould be
larger than that in the rectifier operation. Therefore, the peak am-plitude of the ac-side voltage vsincreases as shown in Fig. 14(a)
after the full-bridge converter changes from the rectifier mode to the inverter mode.
Similarly, when the current Iccdecreases suddenly from 4 to
0 A, the dc-bus voltage Vo drops rapidly. In order to regulate
the dc-bus voltage, the full-bridge converter needs to operate at rectifier mode and thus, the peak amplitude of the ac-side voltage decreases as shown in Fig. 14(b).
Therefore, the provided simulation results demonstrate the proposed BCSC.
V. EXPERIMENTALRESULTS
The experimental setup and the FPGA-based implementation of the proposed BCSC are plotted in Fig. 15. The circuit parame-ters had been tabulated in Table II. A dc power source operating
Fig. 14. Simulation results when dc current source suddenly changes (a) from Ic c= 0 A to Ic c= 4 A, (b) from Ic c= 4 A to Ic c= 0 A.
at CC mode is connected to the dc bus to represent the direct power flow into the dc bus.
Due to no A/D function in a commercial FPGA chip, an external A/D converter is used to sense the output voltage and a zero-crossing detecting circuit is used to detect the zero-crossing of the ac-side voltage. Some D/A converters are used to show the control variables of the implemented BCSC in the scope.
The average current model is the basis of the proposed BCSC and it is developed based on the CCM assumption. When the input ac voltage is at near ZCPs, the circuit often operates in DCM due to the cusp distortion. To meet the assumption of
Fig. 15. Experimental setup of the proposed BCSC.
CCM, either high switching frequency or the bulky inductor should be selected.
The switching frequency 40 kHz is first selected based on the concern of PWM resolution in the FPGA-based implementation. Therefore, the bulky inductor 4.6 mH is selected to guarantee the CCM assumption. Those current sensorless control methods in Table I also select bulky inductors.
A. Pure Sinusoidal Grid Voltage
In order to provide a pure sinusoidal voltage waveform, an equipment (named programmable ac voltage source) is directly connected to the ac-side voltage. The current Iccis set to zero and
thus, the full-bridge converter needs to operate at rectifier mode. The yielded ac-side current and the dc-bus voltage waveform is plotted in Fig. 16(a).
Because that the programmable ac power source cannot ab-sorb power, no experimental result of the inverter mode with the sinusoidal voltage is provided.
B. Distorted Grid Voltage
By plugging into the ac grid, the yielded waveforms at rectifier mode and at inverter mode are plotted in Fig. 16(b) and (c), respectively. In Fig. 16(b), the current Icc in dc power source
is set to zero and the full-bridge converter needs to operate in rectifier mode to regulate the dc-bus voltage. The yielded input current isis in phase with the input voltage, and some distortion
can be found in Fig. 16(b) due to the distorted grid voltage. The measured THD factor is 4.81%.
In Fig. 16(c), the current Iccin dc power source is set to 5 A
and the full-bridge converter needs to transfer some power to ac grid to balance the power. The yielded input current is is
aligned to the ac-side voltage vs, and the measured THD factor
is 14.84%.
Due to the voltage drop across the input inductance as shown in Fig. 2, the peak amplitude of the measured ac-side voltage vs
at Fig. 16(c) is larger than that in Fig. 16(b).
Since the dc power supply is operated in CC mode, its output current Icc may be disturbed by the variation of the dc-bus
voltage. Therefore, as shown in Fig. 14, the current Icc carries
double line-frequency ripple due to the double line-frequency voltage ripple in the dc voltage Vo. Thus, when the converter
Fig. 16. Experimental waveforms (a) with sinusoidal input voltage (average input power≈500 W); (b) with distorted input voltage (average input power ≈500 W); (c) with distorted input voltage (average input power ≈−500 W).
operated in inverter operation, the current Icc does not keep
fixed.
But the current Icc has no current ripple when the current
Icc is set to zero. Therefore, the yielded current waveform of
the inverter operation as shown in Fig. 16(c) possesses larger harmonics than that as shown in Fig. 16(b).
The experimental waveforms at distorted input voltages 90 Vrms and 130 Vrms are plotted in Figs. 17 and 18, respec-tively. The results show that the proposed BCSC is able to work under various input voltage and various power levels.
C. Transient Response
The experimental results during the change of power supply current Icc from 0 to 4 A and from 4 to 0 A are plotted in
Fig. 19(a) and (b), respectively. The dc-bus voltage Vo is well
regulated to 200 V and the yielded input current isis in phase
with the input voltage. Like the simulation results in Fig. 14, the
Fig. 17. Experimental waveforms at distorted input voltage 90 Vrms (a) with average input power≈300 W; (b) with average input power ≈−300 W.
Fig. 18. Experimental waveforms at distorted input voltage 130 Vrms (a) with average input power≈800 W; (b) with average input power ≈−800 W.
peak amplitude of the ac-side voltage vsmay changes after the
operation mode of the full-bridge converter is changed. In addition, the real power supply current Icccannot change
suddenly like the simulations in Fig. 14, and it has a significant transient time near 20 ms. In fact, the direct power flow to the dc
Fig. 19. Experimental waveforms during the change of direct dc power flow (a) from Ic c= 0 A to Ic c= 4 A, (b) from Ic c= 4 A to Ic c= 0 A.
bus cannot change suddenly and thus, the transient time makes the experiment more closed to the practical condition.
However, these results have verified the feasibility of the proposed system and control scheme.
VI. CONCLUSION
In this paper, the behavior of the full-bridge ac/dc converter has been studied and its single-switch model is proposed. Ac-cording to the developed equivalent single-switch model, BCSC has been proposed and implemented. The experiment results show that the proposed BCSC is able to shape the ac-side cur-rent and regulate the dc-side voltage. The proposed BCSC with reduced number of sensor can be used to regulate the dc-grid voltage in the household application. However, the waveform in the inverter operation has larger current harmonic than that in the rectifier operation, which needs more attention to improve it.
REFERENCES
[1] J. C. Salmon, “Circuit topologies for single-phase voltage-doubler boost rectifiers,” IEEE Trans. Power Electron., vol. 8, no. 5, pp. 521–529, Oct. 1993.
[2] B. Singh, B. N. Singh, A. Chandra, K. Al-Haddad, A. Pandey, and D. P. Kothari, “A review of single-phase improved power quality AC-DC converters,” IEEE Trans. Ind. Electron., vol. 50, no. 5, pp. 962–981, Oct. 2003.
[3] E. Cipriano, C. B. Jacobina, E. R. C. da Silva, and N. Rocha, “Singe-Phase to three-phase power converters: State of the art,” IEEE Trans.
Power Electron., vol. 27, no. 5, pp. 2437–2452, May 2012.
[4] Y. K. Lo, “Dual hysteresis loops for a high-performance four-switch boost rectifier,” IEEE Trans. Ind. Electron., vol. 47, no. 5, pp. 1174–1176, Oct. 2000.
[5] R. Wang, F. Wang, D. Boroyevich, R. Burgos, R. Lai, P. Ning, and K. Rajashekara, “A high power density single-phase PWM rectifier with active ripple energy storage,” IEEE Trans. Power Electron., vol. 26, no. 5, pp. 1430–1443, May 2011.
[6] C. B. Jacobina, E. C. Edos Santos, N. Rocha, and E. L. Lopes Fabricio, “Single-Phase to three-phase drive system using two parallel single-phase rectifiers,” IEEE Trans. Power Electron., vol. 25, no. 5, pp. 1285–1295, May 2010.
[7] C. B. Jacobina, E. C. Edos Santos, N. Rocha, B. D. S. Gouveia, and E. da Silva, “Reversible AC drive systems based on parallel AC–AC DC-Link converters,” IEEE Trans. Ind. Appl., vol. 46, no. 4, pp. 1456–1467, Jul./Aug. 2010.
[8] C. Meza, J. J. Negroni, D. Biel, and F. Guinjoan, “Energy-Balance mod-eling and discrete control for single-phase grid connected PV central inverters,” IEEE Trans. Ind. Electron., vol. 55, no. 7, pp. 2734–2743, Jul. 2008.
[9] B. Yang, Y. Zhao, and X. He, “Design and analysis of a grid-connected photovoltaic power system,” IEEE Trans. Power Electron., vol. 25, no. 4, pp. 992–1000, Apr. 2010.
[10] L. Zhang, K. Sun, Y. Xing, L. Feng, and H. Ge, “A modular grid-connected photovoltaic generation system based on DC bus,” IEEE Trans. Power
Electron., vol. 26, no. 2, pp. 523–531, Feb. 2011.
[11] Y. H. Liao and C. M. Lai, “Newly-Constructed simplified single-phase multistring multilevel inverter topology for distributed energy resources,”
IEEE Trans. Power Electron., vol. 26, no. 9, pp. 2386–2392, Sep.
2011.
[12] M. Pascual, G. Garcera, E. Figueres, and F. Gonzalez-Espin, “Robust model-following control of parallel UPS single-phase inverters,” IEEE
Trans. Ind. Electron., vol. 55, no. 8, pp. 2870–2883, Aug. 2008.
[13] Y. C. Chang and C. M. Liaw, “Establishment of a switched-reluctance generator-based common microgrid system,” IEEE Trans. Power
Elec-tron., vol. 26, no. 9, pp. 2512–2527, Sep. 2011.
[14] T. F. Wu, K. H. Sun, C. L. Kuo, and C. H. Chang, “Predictive current controlled 5-kW single-phase bidirectional inverter with wide inductance variation for DC-Microgrid applications,” IEEE Trans. Power Electron., vol. 25, no. 12, pp. 3076–3084, Dec. 2010.
[15] S. C. Yip, D. Y. Qiu, H. S. H. Chung, and S. Y. R. Hui, “A novel volt-age sensorless control technique for a bidirectional AC/DC converter,”
IEEE Trans. Power Electron., vol. 18, no. 6, pp. 1346–1355, Nov.
2003.
[16] H. M. Kojabadi, B. Yu, I. A. Gadoura, L. Chang, and M. Ghribi, “A novel DSP-based current-controlled PWM strategy for single phase grid connected inverters,” IEEE Trans. Power Electron., vol. 21, no. 4, pp. 985– 993, Jul. 2006.
[17] M. Rodriguez, V. M. Lopez, F. J. Azcondo, J. Sebastian, and D. Maksimovic, “Average inductor current sensor for digitally controlled switched-mode power supplies,” IEEE Trans. Power Electron., vol. 27, no. 8, pp. 3795–4029, Aug. 2012.
[18] K. I. Hwu, H. W. Chen, and Y. T. Yau, “Fully digitalized implementation of PFC rectifier in CCM without ADC,” IEEE Trans. Power Electron., vol. 27, no. 9, pp. 4021–4029, Sep. 2012.
[19] S. Sivakumar, K. Natarajan, and R. Gudelewicz, “Control of power factor correcting boost converter without instantaneous measurement of input current,” IEEE Trans. Power Electron., vol. 10, no. 4, pp. 435–445, Jul. 1995.
[20] Y. L. Lo, H. J. Chiu, and S. Y. Ou, “Constant-Switching-Frequency con-trol of switch-mode rectifiers without current sensors,” IEEE Trans. Ind.
Electron., vol. 47, no. 5, pp. 1172–1147, Oct. 2000.
[21] W. Zhang, G. Feng, Y. F. Liu, and B. Wu, “A digital power factor cor-rection (PFC) control strategy optimized for DSP,” IEEE Trans. Power
Electron., vol. 19, no. 6, pp. 1474–1485, Nov. 2004.
[22] H. C. Chen, “Single-Loop current sensorless control for single-phase boost-type SMR,” IEEE Trans. Power Electron., vol. 24, no. 1, pp. 163– 171, Jan. 2009.
[23] F. J. Azcondo, A. Castro, V. M. Lopez, and O. Garica, “Power fac-tor correction without current sensor based on digital current rebuild-ing,” IEEE Trans. Power Electron., vol. 25, no. 6, pp. 1527–1536, Jun. 2010.
Hung Chi Chen (M’06) was born in Taichung,
Tai-wan, in June 1974. He received the B.S. and Ph.D. de-grees from the Department of Electrical Engineering, National Tsing-Hua University, Hsinchu, Taiwan, in June 1996 and June 2001, respectively.
From October 2001, he was a Researcher at the Energy and Resources Laboratory, Industrial Tech-nology Research Institute ITRI, Hsinchu. In August 2006, he joined the Department of Electrical and Control, National Chiao-Tung University, Hsinchu, where he is currently an Associate Professor. From September 2011 to February 2012, he was a Visiting Scholar in the University of Texas in Arlington. His research interests include power electronics, power factor correction, motor and inverter-fed control, DSP/MCU/FPGA-based im-plementation of digital control.
Jhen Yu Liao was born in Taoyuan, Taiwan, in
Au-gust 1986. He received the B.S. degrees from the De-partment of Mechatronic Technology, National Tai-wan Normal University, Taipei, TaiTai-wan, in June 2008, and the M.S. degree from the Institute of Electrical Control Engineering, National Chiao Tung Univer-sity, Hsinchu, Taiwan, in June 2010. He is currently working toward the Ph.D. degree in National Chiao Tung University.
His research interests include power electronics and control, power factor correction, and FPGA-based implementation of digital control.
