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Analysis of an anomalous hump in gate current after dynamic negative bias stress in HfxZr1-xO2/metal gate p-channel metal-oxide-semiconductor field-effect transistors

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Analysis of an anomalous hump in gate current after dynamic negative bias stress in

HfxZr1-xO2/metal gate p-channel metal-oxide-semiconductor field-effect transistors

Szu-Han Ho, Ting-Chang Chang, Chi-Wei Wu, Wen-Hung Lo, Ching-En Chen, Jyun-Yu Tsai, Hung-Ping Luo,

Tseung-Yuen Tseng, Osbert Cheng, Cheng-Tung Huang, and Simon M. Sze

Citation: Applied Physics Letters 101, 052105 (2012); doi: 10.1063/1.4739525

View online: http://dx.doi.org/10.1063/1.4739525

View Table of Contents: http://scitation.aip.org/content/aip/journal/apl/101/5?ver=pdfcov

Published by the AIP Publishing

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stress in Hf

x

Zr

1-x

O

2

/metal gate p-channel metal-oxide-semiconductor

field-effect transistors

Szu-Han Ho,1Ting-Chang Chang,1,2,a)Chi-Wei Wu,1Wen-Hung Lo,2Ching-En Chen,1 Jyun-Yu Tsai,2Hung-Ping Luo,1Tseung-Yuen Tseng,1Osbert Cheng,3

Cheng-Tung Huang,3and Simon M. Sze1,2,4

1

Department of Electronics Engineering, National Chiao Tung University, Hsinchu 300, Taiwan

2

Department of Physics, National Sun Yat-Sen University, Kaohsiung 804, Taiwan

3

Device Department, United Microelectronics Corporation, Tainan Science Park, Taiwan

4

Department of Electronics Engineering, Stanford University, Stanford, California 94305, USA

(Received 15 June 2012; accepted 13 July 2012; published online 30 July 2012)

This letter investigates a hump in gate current after dynamic negative bias stress (NBS) in HfxZr1-xO2/metal gate p-channel metal-oxide-semiconductor field-effect transistors. By

measuring gate current under initial through body floating and source/drain floating, it shows that hole current flows from source/drain. The fitting of gate current-gate voltage characteristic curve demonstrates that Frenkel-Poole mechanism dominates the conduction. Next, by fitting the gate current after dynamic NBS, in the order of Frenkel-Poole then tunneling, the Frenkel-Poole mechanism can be confirmed. These phenomena can be attributed to hole trapping in high-k bulk and the electric field formula Ehigh-k ehigh-k¼ Q þ Esio2esio2.VC 2012

American Institute of Physics. [http://dx.doi.org/10.1063/1.4739525]

With the scaling down of metal-oxide semiconductor field-effect transistors (MOSFETs), gate current changes from Fowler-Nordheim tunneling current to direct tunneling current, causing power dissipation to increase and perform-ance to degrade. In addition, conventional SiO2-based

dielec-trics have approached their physical limits. Hence, replacing SiO2-based dielectric with high-k based dielectric is a valid

way to solve these problems. Furthermore, high-k/metal gate can be integrated with the techniques of silicon on insulator (SOI),1–3 strained-silicon,4,5 and multi-gate to improve de-vice characteristic. As recommended in the International Technology Roadmap for Semiconductors, Hf-based dielec-trics have been heavily studied to replace SiO2-based

dielec-trics in recent years.6,7However, HfO2suffers from charge

trapping,8–10 mobility degradation, threshold voltage (Vt)

instability, and positive bias temperature instability (PBTI) issues. Recently, the HfxZr1-xO2dielectrics have been shown

to be a superior gate dielectric to Hf-based dielectric.11–13In terms of material characteristics, Zr-doping in HfO2

trans-forms the monoclinic crystal structure into a tetragonal crys-tal structure, leading to a rise in the value of dielectric constant and a decrease in grain size. For electrical charac-teristics, the increasing value of dielectric constant leads to a decrease in Vt. Diminishing grain size makes HfxZr1-xO2

dielectric oxidize more completely during annealing, causing a reduction in charge trapping, an increase in mobility, and a decrease in PBTI.14Thus, this study focuses mainly on gate current fitting for HfxZr1-xO2 dielectrics p-MOSFETs in

dynamic negative bias stress (NBS) because devices gener-ally operate in the dynamic state and gate current generates an anomalous hump. The causes of the hump are explained in this letter.

The HfxZr1-xO2/metal gate p-MOSFETs (x¼ 8%–10%)

used in this study is fabricated through the gate last process. First, high quality thermal oxide with thickness of 1 nm was grown as an interfacial layer. Second, HfO2, ZrO2,and HfO2

dielectrics were deposited in that order by atomic layer depo-sition (ALD). Then, after annealing, HfxZr1-xO2with

thick-ness of 2 nm was formed. This process may be crystallized into monoclinic crystal structure or tetragonal crystal struc-ture. Finally, TixN1xwas deposited by physical vapor

depo-sition (PVD). Metal gate can eliminate gate depletion and resist remote phonon scattering.15,16 The p-MOSFETs are stressed in the dynamic condition with 50% duty cycle. A pulse train with high-voltage of Vt-1.1 V, low-voltage of 0 V,

and frequency of 10 kHz was applied on the gate terminal. Ig-Vgtransfer curves were measured with the source, drain,

and body terminals all grounded with Vggiven from 0 V to

1.3 V. Then through body floating (BF) and source/drain floating (SDF) process, the current path and carrier polarity can be confirmed. Next, Ig-Vg curve is fitted by

Frenkel-Poole current and tunneling current after 0 s and 1000 s dynamic NBS. All experimental curves were measured using an Agilent B1500 semiconductor parameter analyzer.

Figures1(a) and1(b)show the Id-Vgand Ig-Vgtransfer

characteristic curves with 50 mV drain voltage under the dynamic NBS at 0 s, 1 s, 10 s, 100 s, 300 s, 500 s, 700 s, and 1000 s. Clearly, the Vtshift 390 mV in the negative direction

and on-current is degraded after the dynamic NBS. Further-more, subthreshold swing degradation is slight. Thus, Vt

shift can be mainly attributed to hole trapping in high-k bulk. However, the gate current hump appears clearly in Fig.1(b)

until 100 s dynamic NBS. With hole trapping increasing, the gate current hump becomes clearer. Therefore, the hump can be generated only when enough holes are trapped in high-k bulk.

a)

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To further understand the causes of the hump, fitting and distinguishing gate current are necessary. Figure2(a)shows Ig-Vg characteristics with BF, source/drain floating (SDF),

and body/source/drain all grounded (SDB). Obviously, the Ig-Vgcharacteristic in BF is similar to that in SDB, and the

Ig-Vgcharacteristic in SDF is much smaller than that in both

SDB and BF. These results indicate that holes transfer from source/drain to the gate, rather than electrons transfer from gate to body. Moreover, gate current is fitted under initial as shown in Fig.2(b), where it can be observed that gate current is confirmed to be the Frenkel-Poole mechanism. These results can be explained from the energy band diagram shown in Fig.2(a); holes transfer from source/drain to gate with the Frenkel-Poole mechanism.

After confirming Frenkel-Poole mechanism under ini-tial, the Ig-Vg characteristic is fitted after 1000 s dynamic

NBS in the Fig. 3(a). Clearly, section A indicates the Frenkel-Poole current in Fig. 3(b), from Vg¼ 0.44 to

Vg¼ 0.56, while section B is tunneling current in Fig.3(c),

from Vg¼ 0.80 to Vg¼ 0.92, and section C is again

Frenkel-Poole current in Fig. 3(d), from Vg¼ 1.18 to

Vg¼ 1.3. In addition, in the Vg< Vt¼ 0.9 V situation,

Frenkel-Poole current transfers to tunneling current with Vg

increasing. On the contrary, tunneling current transfers to Frenkel-Poole current when Vg> Vt. Frenkel-Poole current

and tunneling current are a series; whichever current is smaller dominates the current path. Therefore, Frenkel-Poole current dominates current path because JFrenkel-Poole JTunneling,

while tunneling current dominates current path when JFrenkel-Poole  JTunneling. Therefore, the conditions under

which a hump is generated is JFrenkel-Poole  JTunneling.

Figures 4(a) and 4(b) show that energy diagrams for Vg¼ 0 V with hole trapping and without hole trapping,

respectively. Note that Ehigh-k becomes large and ESiO2

reduces with hole trapping. An increase in Ehigh-kproduces a

larger Frenkel-Poole current, and a reduction in ESiO2

pro-duces a larger DEtrap, causing tunneling current to decrease.

DEtrapindicates the energy from the conduction band in the

surface to trap level. Therefore, with hole trapping increas-ing, JFrenkel-Poole is larger than JTunneling. Because the hump

generation condition is JFrenkel-Poole  JTunneling, the hole

trapping leads to a more significant hump. In Figs. 1(a)and

1(b), it can be observed that the more holes that are captured in high-k bulk, the clearer gate current hump we can see. Figure 4(c)shows energy diagrams in the Vg< Vtsituation

with hole trapping. The electric field must follow the formula Ehigh-k ehigh-k¼ Q þ Esio2esio2¼ (Q/Esio2 þ esio2) Esio2¼ e0

Esio2, where Q indicates the quantity of hole trapping (Q >

0), Esio2indicates an electric field in the SiO2, and Ehigh-kis

an electric field in the high-k. The voltage across gate oxide is small when Vg < Vt. Hence, Q/Esio2 cannot be ignored

(Q  Esio2). This result makes ehigh-k < e0 and Ehigh-k >

Esio2. When Vgis swept from 0 V to Vton the device with a

large amount of hole trapping in high-k bulk, most of the applied gate voltage drops in the HfxZr1-xO2 layer. This is

the reason why JFrenkel-Pooleafter dynamic NBS appears

ear-lier than JFrenkel-Poole under initial. Nevertheless, relatively

smaller voltage drops in the SiO2layer, leading to a slight

rise in JTunneling due to a small variation in DEtrap. With an

increase in Vg, JFrenkel-Poole increases significantly while

JTunneling changes only slightly. This causes JFrenkel-Poole to

change to JTunneling. At the beginning stages, JFrenkel-Poole

appears in section A (Fig.3(a)) owing to the supply of holes exceeding the demand (JTunneling  JFrenkel-Poole). Next,

JTunnelingappears in section B (Fig.3(a)), because the supply

of holes is unable to meet the demand (JTunneling JFrenkel-Poole).

FIG. 1. (a) Id-Vgand (b) Ig-Vgtransfer

characteristic curves of high-k/metal gate MOSFETs as function of stress time under dynamic NBS. The sweep was done at Vd¼ 0.05 V for both

curves.

FIG. 2. (a) Ig-Vgcharacteristic curves in

the SBD, BF, and SDB conditions. The energy band diagram shows gate current is the Frenkel-Poole path. (b) Id-Vg

transfer characteristic curves of high-k/ metal gate MOSFETs under initial and after dynamic NBS. Inset shows that gate current is fitted by Frenkel-Poole model under initial.

052105-2 Ho et al. Appl. Phys. Lett. 101, 052105 (2012)

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Figure4(d)shows energy diagrams in the Vg> Vtcondition

with hole trapping. The electric field should also obey for-mula Ehigh-k ehigh-k¼ Q þ Esio2esio2¼ (Q/Esio2þ esio2) Esio2.

On the contrary, Vgapplied to SiO2and HfxZr1-xO2in the

Vg > Vt condition is large, causing Q/Esio2 to be ignored

(Q Esio2). This result leads to ehigh-k>esio2and Ehigh-k<

Esio2. Therefore, with Vg increasing, DEtrap decreases, and

JTunnelingincreases sharply due to the exponential dependence

on DEtrap. This is the reason why JTunneling changes to

JFrenkel-Poole. Finally, JFrenkel-Poole appears in section C

(Fig. 3(a)), since the supply of holes exceeds the demand (JTunneling JFrenkel-Poole).

In summary, the Vtshifts 390 mV in the negative

direc-tion and the hump generates in the Ig-Vgtransfer

character-istic curves after dynamic NBS, and these are results of hole trapping in high-k bulk. Through fitting and distin-guishing gate current under initial, holes transfer through the Frenkel-Poole mechanism from the source and drain. Gate current fitting after dynamic NBS indicates that JFrenkel-Poole changes to JTunneling in the Vg < Vt situation

owing to the influence of Ehigh-k > Esio2, while JTunneling

changes to JFrenkel-Poolein the Vg> Vt condition due to the

influence of Ehigh-k< Esio2. These phenomena can be

attrib-uted to the fact that the electric field must follow the for-mula Ehigh-kehigh-k¼ Q þ Esio2esio2.

Part of this work was performed at United Microelec-tronics Corporation. The work was supported by the National Science Council under Contract No. NSC 100-2120-M-110-003.

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FIG. 4. The energy band diagram of high-k/metal gate MOSFETs in the Vg¼ 0 V condition (a) without hole trapping and (b) with hole trapping. (c)

The energy band diagram of high-k/metal gate MOSFETs in the Vg< Vt

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052105-4 Ho et al. Appl. Phys. Lett. 101, 052105 (2012)

數據

FIG. 1. (a) I d -V g and (b) I g -V g transfer
FIG. 4. The energy band diagram of high-k/metal gate MOSFETs in the V g ¼ 0 V condition (a) without hole trapping and (b) with hole trapping

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