• 沒有找到結果。

R The Study of a Dual-Mode Ring Oscillator

N/A
N/A
Protected

Academic year: 2022

Share "R The Study of a Dual-Mode Ring Oscillator"

Copied!
5
0
0

加載中.... (立即查看全文)

全文

(1)

Abstract—An analytical investigation of a dual-mode ring oscillator is presented. The ring oscillator is constructed in a CMOS 0.18-μm technology with differential 8-stage delay cells employing auxiliary input devices. With proper startup control, the oscillator operates in two different modes covering two different frequency bands. A nonlinear model along with linearization method is used to obtain the transient and steady-state behaviors of the dual-mode ring oscillator. The analytical derivations are verified through HSPICE simulation.

The oscillator operates at the frequency bands from 2 ~ 5 GHz and from 0.1 ~ 2 GHz, respectively.

Index Terms—Fractional-N frequency synthesizer, multiphase signals, ring oscillators, voltage-control oscillators (VCOs).

I. INTRODUCTION

ing oscillators are found in various of communication systems and clock generators. Compared with their LC-VCO counterparts, ring oscillators have the advantage of small size, highly integration, multiphase outputs, and wide oscillation range. Multiphase signals are required by communication systems, such as phase-array transceivers, clock data recovery circuits (CDR) and fractional-N frequency synthesizers (FNFS). In delta-sigma FNFS, multiphase ring oscillators are used to reduce quantization noise [1], thus allowing a wide loop bandwidth to achieve faster settling time and better immunity to VCO induced phase noise. In view of the demand for a large number of distinct phases, the number of delay stages must be large, which leads to lower oscillation frequency and poorer phase spacing resolution. Delay cells with auxiliary input devices are often employed to achieve high oscillation frequencies in long-chain ring oscillators [2]-[7].

Wide range oscillators are also demanded by communication systems that are intended to cover different standards at various frequency bands. In ring oscillators, wide oscillation range is achieved by tuning the tail current and loading resistance of each delay cell, or by dividing and mixing the output signal.

Multiple oscillation modes are often found in ring oscillators which employ delay cells with auxiliary input devices [4][6].

Constraint for stable oscillation at the desired mode is

This work was supported by National Science Council (NSC) under Contract 99-2220-E-002-023-.

The authors are with the Department of Electrical Engineering and the Graduate Institute of Electronics Engineering, National Taiwan University, Taipei 106, Taiwan.

Copyright (c) 2011 IEEE. Personal use of this material is permitted.

However, permission to use this material for any other purposes must be obtained from the IEEE by sending an email to pubs-permissions@ieee.org.

explained in [6]. However, the characteristics of multi-mode ring oscillators remain unidentified. Motivated by these ambiguous multi-mode phenomena, in this brief, we provide a thorough analysis of multi-mode ring oscillators. A dual-mode 8-stage ring oscillator with delay cells utilizing auxiliary input devices is presented as an example. A startup circuit is proposed to control the dual-mode ring oscillator to operate in either the two modes. A nonlinear model of the ring oscillator is also introduced. The voltage-to-current transfer function of nonlinear devices is modeled with polynomial equations.

Further, by applying linearization methods as addressed in [8][9], behaviors including the output phase relation, amplitude, oscillation frequency, and criterion of oscillation at either the two modes are given. Analytical expressions of the criterion of oscillation explain the conditions which provoke the ring oscillator to shift to different modes, and the situations for it to remain in one of the multiple modes. The analytical equations presented permit an accurate prediction of the ring oscillator and the results are verified by simulations.

In section II, the generic concept of the dual-mode ring oscillator is presented. The startup circuit and its operation are also provided. In section III, a nonlinear model is used to describe the behavior, as well as the stability, of the two oscillation modes. In section IV, simulation results are presented to illustrate the validity of the derived analytical equations. A conclusion is then given in section V.

V4 V4b

in+

aux+

in- aux-

V1

V1b V3 V3b

in+

aux+

in- aux-

V8b

V8 V2 V2b

in+

aux+

in- aux-

V7b

V7 V1 V1b

in+

aux+

in- aux-

V6b

V6

V5b V5 V5b

V5

V6b V6 V4b

V4 V7b

V7

V3b

V3 V8b

V8

V2b

V2

in- aux-

in+

aux+

in- aux-

in+

aux+

in- aux-

in+

aux+

in- aux-

in+

aux+

V1

Fig. 1 Dual-mode ring oscillator.

II. DELAY CELL WITH AUXILIARY INPUT DEVICES

Figure 1 shows the diagram of the presented dual-mode ring oscillator. The topology is chosen because it achieves two oscillation modes, one of high oscillation frequency and the other of low oscillation frequency. Moreover, as will be explained later, both modes retain 16 distinct output phases.

Differential delay cells are used for greater common-mode noise rejection. The schematic of each delay cell is depicted in Fig. 2(a). Each delay cell is constructed with a pair of main input devices M1,2 and a pair of auxiliary input devices M3,4 that

The Study of a Dual-Mode Ring Oscillator

Zuow-Zun Chen and Tai-Cheng Lee, Member, IEEE

R

(2)

forms a secondary delay path. Furthermore, transistors M5,6 operate in the triode region and work as output resistive loads.

The equivalent resistance can be adjusted through control signal vctl1. The sum of the two differential pair tail current II

and IA is designed to be constant, Itotal = II + IA. In this brief, to ensure the dual-mode oscillation, a startup circuit is employed to control the tail current of main input devices and auxiliary input devices via vctl2, Fig. 2(b). The operation of the startup circuit is explained below.

Vaux VDD

M5 M6

M1 M2

Vin M3 M4

Vctl1 Vout

Vb,in1 Vb,in2

Vb,aux1 Vb,aux2

II IA

M7 M8

M9 M10

(a) VDD

Vctl2

IA + II

Vb,in1 Vb,in2

Vbias

Vb,aux1 Vb,aux2

Mc1 Mc3

IA + II Mc2

Mc4

Mc5 Mc6

Mc8 Mc7

(b)

Fig. 2 (a) Schematic of delay cell. (b) Schematic of startup circuit.

Vin Vout

Vaux

gm,aux gm,aux

gm,in gm,in

(a)

Vaux Vout

Vin

gm,aux gm,aux

gm,in gm,in (b)

Fig. 3 Dual-delay-path ring oscillator. (a) Mode 1. (b) Mode 2.

Mode 1: To ensure mode 1, vctl2 is at first set low. The bias current will mainly flow through main input devices M1,2. After the oscillator reaches steady-state oscillation at mode 1, vctl2 can then be brought to a higher value to activate the auxiliary pair and shift up the oscillation frequency. The half-circuit equivalent of the ring oscillator is shown in Fig. 3(a). The ring oscillator can be regarded as a main delay path formed with main input devices plus an additional delay path constructed by auxiliary input devices. gm,in and gm,aux represent the equivalent transconductance of the main input devices and auxiliary input devices, respectively. The equivalent output resistance and capacitance are also depicted in Fig. 3(a). Miller effect capacitances are ignored here for simplicity.

Mode 2: To ensure mode 2, vctl2 is set high at first. The bias current will then flow mainly through auxiliary input devices M3,4. After the oscillator reaches stable oscillation at mode 2, vctl2 can be brought to a lower value to decrease the oscillation frequency. As shown in Fig. 3(b), the ring oscillator operating at mode 2 can also be regarded as a main delay path plus an

additional delay path. However, in contrast to mode 1, now the auxiliary input devices form the main delay path, and the main input devices construct the additional delay path. Therefore, with aid of Fig. 3(b) the block diagram of Fig. 1 can be redrawn as Fig. 4 for mode 2 oscillation. The phase relation of the two modes is shown in Fig. 5. Although the order of the output phases is different, the number of distinct phases is the same, both contain 16 distinct phases. Nevertheless, different circuit topologies, such as number of stages, delay cell architecture, and interconnections affect the possible oscillation modes and output phase relations [6]. These characteristics can be determined through solving for the general solutions of the ring oscillator using small-signal linear approximation.

V8 V8b

in+

aux+

in- aux-

V7

V7b V5 V5b

in+

aux+

in- aux-

V4

V4b V2 V2b

in+

aux+

in- aux-

V1

V1b V7b V7

in+

aux+

in- aux-

V6b

V6

V3 V3b V3b

V3

V6 V6b V8

V8b V1b

V1

V5

V5b V4b

V4

V2

V2b

in- aux-

in+

aux+

in- aux-

in+

aux+

in- aux-

in+

aux+

in- aux-

in+

aux+

Fig. 4 The rearranged diagram of Fig.1.

V2 V3

V4

V5 V6

V7

V6b

V4b V2b

V8

V7b V5b

V3bV8b V1

V1b V2

V3 V4

V5 V6

V7

V6b V4b V2b V8 V7b V5b V3b

V8b

V1 V1b

(a) (b)

Fig. 5 Phase relation of each output node. (a) Mode 1. (b) Mode 2.

Moreover, small-signal linear approximation provides an alternative way to observe the two oscillation modes of the ring oscillator. With the aid of Fig. 3, the normalized root locus of the ring oscillator at mode 1 and mode 2 are drawn in Fig. 6(a) and (b), respectively. Parameters were extracted from HSPICE simulations at the bias point. Fig. 6(a) shows the root locus of mode 1, where vctl2 is initially set low (black dots). As predicted, the pair of poles of mode 1 lies at the right-half plane. Thus the signal of mode 1 will build up and reach steady-state oscillation.

Further, by increasing vctl2, the location of the poles of mode 1 changes (gray dots). This indicates a change in both the amplitude and oscillation frequency of mode 1 signal. A question then occurs. While further rising vctl2, the pair of poles of mode 2 enters the right-half plane. It is evident that there is a period in which two pairs of poles lie at the right-half plane.

The problem of whether mode 2 signal will build up and dominate the ring oscillator, or the ring oscillator remains operating at mode 1, becomes ambiguous.

On the other hand, Fig. 6(b) depicts the root locus of mode 2, where vctl2 is initially set high (black dots). In this case, the pair of poles of mode 2 lies at the right-half plane. As previously mentioned, the same question arises when bringing vctl2 to a lower value. The pair of poles of mode 1 will enter the

(3)

right-half plane (gray dots). To determine whether the ring oscillator will remain at the same mode or shift to the other mode requires nonlinear analysis, because linear model possess superposition feature which allows both modes to sustain and oscillate simultaneously. However, simultaneous oscillation has not been observed within the presented ring oscillator.

Simulation results indicate that only one of the two modes remains, while the other dies away.

In the following section, a nonlinear model is introduced.

Analytical derivations explain the circumstances which cause one mode to shift to the other, as well as the conditions in which the oscillator remains at its initial mode.

-1 0 1

Im

-3 -2 -1 0 1

Re 2.0

-2.0

M1

M2

-1 0 1

Im

-3 -2 -1 0 1

Re 2.0

-2.0

M1

M2

(a) (b) Fig. 6 Root locus. (a) Mode 1. (b) Mode 2.

III. NONLINEAR ANALYSIS

A. Derivation of Mode Equations

In order to investigate the transient and steady-state behaviors of the two oscillation modes, we consider one of the delay stages in half-circuit representation, as shown in Fig. 7.

vin and vaux are the differential input signals of main input device and auxiliary input device. vout is the output signal. vin2

and vaux2 are the output signals of the successive main input device and auxiliary input device. CL, CM,aux, and CM,in represent the output loading capacitance and Miller effect capacitances, respectively. It is assumed that the differential signals can be expressed as sinusoidal signals [10][11], and because two oscillation modes are predicted, the voltage signal of each node is given as

( ) ( )

, 1 , 2

1 1 1 2 2 2

,

x xm xm

m m x,m m m x,m

v v v

A cos t A cos t

= +

= ⋅ ω + φ + ⋅ ω + φ

(1) where Am1, Am2, ωm1, and ωm2 are the amplitude and oscillation frequency of mode 1 and mode 2, respectively. φx,m1 and φx,m2

are constant phases of the two modes at node x, and the values can be found with aid of Fig. 5. Subscript x = in, aux, in2, aux2, and out. The differential equation of the delay stage can be formed as

2 2

( ) ( )

( ) ( ) ( )

,

aux out in out

in aux M,aux M,in

out out aux out in out

L M,aux M,in

o

d v v d v v

i i C C

dt dt

d v d v v d v v v

C C C

dt dt dt R

− −

+ + +

− −

= + + +

(2) iin and iaux are the differential output currents of the main input device and auxiliary input device. From [12], for CMOS differential pairs, the differential output current iod can be obtained as

2 2 SS ,

od id id

i kv I v

= − k − (3) where vid is the differential input signal, k = (1/2)μnCox(W/L), and ISS represents the tail current of the differential pair. The Taylor expansion of (3) is

3

1 3 ,

od id id

i =α v +α v + ... (4) in which

1 2 , and 3 1.

SS 4

SS

α kI α k α

= − = I (5)

Vaux Vin Main

Aux

Vout CL Ro CM,in

CM,aux

IA II

CM,in

CM,aux Vaux2 Vin2

Fig. 7 Half-circuit representation of one delay stage.

Note, because of the differential structure, there are no even power terms in (4). To provide intuitive analysis, only power series up to the 3rd power term is considered. The simplification retains the essence and offers more insight of the effect of nonlinear voltage-to-current functions and the behavior of the oscillator. Substitute (1) into (4), the output current of main input device and auxiliary input device can be derived as

2 2

1 3 1 2 1

2 2

1 3 2 1 2

3 3

4 2

3 3

.

4 2

y, y, m m

y y,m

y, y, m m y,m

i A A v

A A v

⎛ ⎛ ⎞⎞

= α + α⎜⎝ ⎜⎝ + ⎟⎠⎟⎠

⎛ ⎛ ⎞⎞

+ α + α⎜⎝ ⎜⎝ + ⎟⎠⎟⎠

(6) In the above equation, subscript y is equal to in and aux. The influences of higher-order harmonic terms are assumed to be small and can be neglected [8][9]. By applying (1) and (6) into (2), and let φout,m1 = φout,m2 = 0, with some mathematical manipulations we arrive at differential equations for the amplitudes of the two modes

( ) ( )

( )

( ) ( )

( )

1 1 1 1

2 2

1 1

2 2

1

1 2 3 1 3 1

1

( ) 2

3 3 ,

4 2

in, in,m aux, aux,m

m m o

m

m m in, in,m aux, aux,m

cos cos

d A A R

dt K

A A cos cos

α φ + α φ

=

+ + α φ + α φ

( ) ( )

( )

( ) ( )

( )

1 2 1 2

2 2

2 2

2 2

2

2 1 3 2 3 2

1

( ) 2

.

3 3

4 2

in, in,m aux, aux,m

m m o

m

m m in, in,m aux, aux,m

cos cos

d A A R

dt K

A A cos cos

α φ + α φ

=

+ + α φ + α φ

(7) And the oscillation frequencies of the two modes can be expressed as

( ) ( )

( ) ( )

( )

1 1 1 1

1 2 2

1 1 2 3 1 3 1

1 3 3 ,

4 2

in, in m, aux, aux,m

m

m m m in, in m, aux, aux,m

sin sin

K A A sin sin

⎧α φ + α φ ⎫

⎪ ⎪

ω = ⎨⎪⎩+⎛⎜⎝ + ⎞⎟⎠ α φ + α φ ⎬⎪⎭

(4)

( ) ( )

( ) ( )

( )

1 2 1 2

2 2 2

2 2 1 3 2 3 2

1 3 3 .

4 2

in, in m, aux, aux,m

m

m m m in, in m, aux, aux,m

sin sin

K A A sin sin

⎧α φ + α φ ⎫

⎪ ⎪

ω = ⎨⎪⎩+⎛⎜⎝ + ⎞⎟⎠ α φ + α φ ⎬⎪⎭

(8) Ki is defined as

( ) ( ) ( ) ( )

2, ,

2, ,

2

. 2

L M,in in i in i

i

M,aux aux i aux i

C C cos cos

K C cos cos

⎧ + ⎡ − φ − φ ⎤⎫

⎪ ⎣ ⎦⎪

= ⎨ ⎬

⎡ ⎤

+ − φ − φ

⎪ ⎣ ⎦⎪

⎩ ⎭

(9)

For i = m1 and m2. The square of the steady-state amplitude at mode 1 alone (Am22 = 0), and the square of the steady-state amplitude at mode 2 alone (Am12 = 0), can be obtained as (10) from (7) by setting d(Am12) / dt = 0 and d(Am22) / dt = 0, respectively.

( ) ( )

( ) ( )

1 1 1 1

2 1,0

3 1 3 1

1

4 ,

3

in, in,m aux, aux,m

o m

in, in,m aux, aux,m

cos cos

A R

cos cos

α φ + α φ −

= − α φ + α φ

( ) ( )

( ) ( )

1 2 1 2

2 2,0

3 2 3 2

1

4 .

3

in, in,m aux, aux,m

o m

in, in,m aux, aux,m

cos cos

A R

cos cos

α φ + α φ −

= − α φ + α φ (10)

B. Stability analysis

The stability of the ring oscillator can be determined by introducing a small perturbation of amplitude around the stationary point and evaluating the properties of (7) in response to this disturbance. To this end, the Jacobean matrix of the amplitude equations (7) is formed and the eigenvalues are evaluated for each of the four equilibrium states:

State 1: Zero state, where Am12 = 0 and Am22 = 0. It can be shown that if

( ) ( )

1 1 1 1

1 , or

in, in,m aux, aux,m

o

cos cos

α φ + α φ −R > 0

( ) ( )

1 2 1 2

1 ,

in, in,m aux, aux,m

o

cos cos

α φ + α φ −R > 0 (11) the zero state will be unstable. These are also the criteria for each oscillation mode to build up.

State 2: Oscillation at mode 1, where Am12 ≠ 0 and Am22 = 0.

For steady-state oscillation at mode 1, the conditions to be satisfied are

( ) ( )

1 1 1 1

1 ,

in, in,m aux, aux,m

o

cos cos

α φ + α φ −R > 0

( ) ( )

( ) ( )

1 2 1 2

2 2

0 2 0

1

3 2 3 2

1

2 1

3 2 .

in, in,m aux, aux,m

o

, ,

m m

in, in,m aux, aux,m

cos cos

A R A

cos cos

α φ + α φ −

> − =

α φ + α φ (12)

State 3: Oscillation at mode 2, where Am12 = 0 and Am22 ≠ 0.

Similarly, the conditions required for steady-state oscillation at mode 2 are

( ) ( )

1 2 1 2

1 ,

in, in,m aux, aux,m

o

cos cos

α φ + α φ −R > 0

( ) ( )

( ) ( )

1 1 1 1

2 2

2 0 1 0

3 1 3 1

1

2 1

3 2 .

in, in,m aux, aux,m

o

, ,

m m

in, in,m aux, aux,m

cos cos

A R A

cos cos

α φ + α φ −

> − =

α φ + α φ (13)

State 4: Simultaneous oscillation at mode 1 and mode 2, where Am12 ≠ 0 and Am22 ≠ 0. Expressions of amplitudes of the two modes for this equilibrium state can also be derived from (7). However, the eigenvalues of the Jacobean matrix evaluated from this state have positive signs, and this indicates the ring oscillator does not generate simultaneous oscillation.

Figure 8 depicts the phase portrait formed from (7) the unit of the axis is in amplitude instead of the square of amplitude for clarity. Figure 8(a) shows the case when both (11) and Am1,02 <

Am2,02 < 2Am1,02 are satisfied. Among the four equilibrium states, the zero state and simultaneous oscillation state are unstable.

As for the other two equilibrium states, the ring oscillator can retain steady-state oscillation. Fig. 8(b) depicts the case when both conditions (11) and Am2,02 > 2Am1,02 are meet. As predicted in (12), when Am2,02 > 2Am1,02, mode 1 becomes unstable and the only stable state is oscillation at mode 2. The black and gray dots correspond to the maximum and minimum amplitudes of each mode. Therefore, by using the derived equations the frequency range of the two modes can be calculated. For mode 1, applying (5) and (10) to the second constraint given in (12), a maximum IA required for oscillation in mode 1 can be derived.

Since larger IA attains higher frequency, the maximum frequency can be found with the aid of (8). On the other hand, because smaller IA does not break the constraints in (12), the lowest frequency can be obtained by (8) and the minimum available IA, which is around 0.2 mA in our design. The frequency range of mode 2 can also be calculated in a similar way.

Am1 (V) Am2 (V)

0.1 0.2 0.3 0.4 0.5

0.1 0.2 0.3 0.4 0.5 4

2 3

1 Am1 (V) 0.0

Am2 (V) 0.1 0.2 0.3 0.4 0.5

0.1 0.2 0.3 0.4 0.5 4

2 3

1 0.0

(a) (b) Fig. 8 Phase portrait. (a) Am1,02 < Am2,02 < 2Am1,02. (b) Am2,02 > 2Am1,02.

IV. SIMULATION RESULTS

To determine the validity of the equations derived in section III, the oscillation frequency, amplitude, and criteria of oscillation are calculated using (8), (10), (12), and (13), and are compared with those obtained from the behavior simulations and circuit level simulations, respectively. The behavioral model was created in Verilog-A using delay stages as shown in Fig. 7. Nonlinear current functions are formed from (4), and power series up to the 3rd power term are considered.

Parameters ISS, k, CL, CM,in, CM,aux, and Ro are extracted from transistor-level simulations in HSPICE based on a CMOS 0.18-μm technology, with VDD = 1.8 V.

In order to test the criterion of oscillation, two simulation methodologies are designed. The first one is designed to control the oscillator to initially start oscillating at mode 1. This is done by setting vctl2 to 0 V, which makes II Itotal and IA 0 mA. After the oscillator reaches steady-state oscillation at mode 1, then vctl2 is adjust to vfinal. The process of tail current adjustment via vctl2 is shown in Fig. 9(a). vfinal is swept from 0 V

(5)

to VDD. A comparison of the calculation results with Verilog-A and HSPICE simulation results is shown in Fig. 10(a). The black and gray dots represent oscillation at mode 1 and mode 2, respectively. In Fig. 10(a), the oscillator initially oscillates at mode 1. By rising vctl2 to vfinal, IA increases and II decreases. This tuning is equivalent to increasing (Am2,02 / Am1,02). As vfinal is swept to the voltage level where (Am2,02 / Am1,02) > 2, oscillation at mode 1 no longer sustains, and the oscillator shifts to mode 2.

Similarly, the second simulation methodology is to control the oscillator to initially start oscillating at mode 2. This is done by setting vctl2 to VDD, which makes II 0 mA and IA Itotal. After the oscillator reaches steady-state oscillation at mode 2, then vctl2 is adjust to vfinal. The process of tail current adjustment for this case is shown in Fig. 9(b). The final value vfinal is now swept from VDD to 0 V. The results are plotted in Fig. 10(b). In Fig. 10(b), the oscillator initially oscillates at mode 2. By bringing vctl2 lower, II increases and IA decreases so that (Am1,02 / Am2,02) increases. As the operating point (Am1,02 / Am2,02) > 2 is reached, oscillation at mode 2 no longer sustains and the oscillator shifts to mode 1. Note the full range of II is from 0.2 mA to 1.8 mA. We demonstrated the region 0.2 mA to 1.05 mA here to emphasize on the transitions from mode 1 to mode 2 and mode 2 to mode 1, respectively. The simulated frequency bands are from 2 ~ 5 GHz and from 0.1 ~ 2 GHz for mode 1 and mode 2, respectively.

As shown, the calculated values using (8), (10), (12), and (13) closely match with the results of the behavior simulations as well as the circuit level simulations. This assures the validity of the assumption of representing node voltage as sinusoidal signals, and neglect of higher harmonics in the current functions. The simplification of power series up to the 3rd power term is also feasible.

I (mA)

Time (Sec) II

0 0.4 0.8 1.2 1.6 2.0

IA

Itotal = II + IA

I (mA)

Time (Sec) II

0 0.4 0.8 1.2 1.6 2.0

IA

Itotal = II + IA

Mode 1 Mode 2

(a) (b) Fig. 9 (a) Mode 1 startup control. (b) Mode 2 startup control.

0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0

0 2 4 6

II (mA)

Frequency (GHz)

0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0

0.2 0.3 0.4 0.5

II (mA)

Amplitude (V)

Am2,02 < 2Am1,02 (Cal.) Am2,02 > 2Am1,02 (Cal.)

Calculation Verilog-A Sim. HSPICE Sim.

(a)

0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 0

2 4 6

II (mA)

Frequency (GHz)

0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 0.2

0.3 0.4 0.5

II (mA)

Amplitude (V)

Am1,02 > 2Am2,02 (Cal.) Am1,02 < 2Am2,02 (Cal.)

Calculation Verilog-A Sim. HSPICE Sim.

(b)

Fig. 10 Oscillation mode simulation. (a) Startup from Mode 1. (b) Startup from Mode 2. (Black dots are oscillation at mode 1. Gray dots are oscillation at mode 2.)

V. CONCLUSIONS

The study of a dual-mode ring oscillator in a CMOS 0.18-μm technology is presented. A startup circuit is designed to control the oscillator to properly operate in either of the two modes.

Analytical derivations, which include the expressions of oscillation frequency, amplitude, and criterion of oscillation, provide full insight into the behavior of the dual-mode ring oscillator. A transistor-level ring oscillator circuit is built and simulated in HSPICE. Simulation results show consistency with the analytical derivations.

REFERENCES

[1] T. Riley and J. Kostamovaara, "A Hybrid ΔΣ Fractional-N Frequency Synthesizer," IEEE Trans. Circuits Syst. II, vol. 50, pp. 176–180, Apr.

2003.

[2] D. Y. Jeong et al., “CMOS Current-Controlled Oscillators Using Multiple-Feedback Loop Ring Architectures,” in IEEE ISSCC Dig. Tech.

Papers, Feb. 1997, pp. 386–387.

[3] S. J. Lee, B. Kim, and K. Lee, “A Novel High-Speed Ring Oscillator for Multi-phase Clock Generation Using Negative Skewed-Delay Scheme,”

IEEE J. Solid-State Circuits, vol. 32, pp. 289–291, Feb. 1997.

[4] L. Sun and T. A. Kwasniewski, “A 1.25-GHz 0.35-μm Monolithic CMOS PLL Based on a Multiphase Ring Oscillator,” IEEE J. Solid-State Circuits, vol. 36, pp. 910–916, Jun. 2001.

[5] Y. A. Eken, and J. P. Uyemura, “A 5.9-GHz Voltage-Controlled Ring Oscillator in 0.18-μm CMOS,” IEEE J. Solid-State Circuits, vol. 39, pp.

230–333, Jan. 2004.

[6] S. S. Mohan et al., “Differential Ring Oscillators with Multipath Delay Stages,” in Proc. IEEE Custom Integrated Circuits Conf. (CICC), Sep.

2005, pp. 503–506.

[7] C.-Y. Yang, C.-H. Chang, and W.-G. Wong, “A Δ-Σ PLL-Based Spread-Spectrum Clock Generator with a Ditherless Fractional Topology,” IEEE Trans. Circuits Syst. I, vol. 56, pp. 51–59, Jan. 2009.

[8] B. van der Pol, “On Oscillation Hysteresis in a Triode Generator with Two Degrees of Freedom,” Philosoph. Mag., vol. 43, pp. 700–719, Apr.

1922.

[9] A. Goel, and H. Hashemi, “Frequency Switching in Dual-Resonance Oscillators,” IEEE J. Solid-State Circuits, vol. 42, pp. 571–582, March 2007.

[10] S. Docking and M. Sachdev, “A Method to Derive an Equation for the Oscillation Frequency of a Ring Oscillator,” IEEE Trans. Circuits Syst. I, vol. 50, pp. 259–264, Feb. 2003.

[11] P. M. Farahabadi et al., “Closed-Form Analytical Equations for Amplitude and Frequency of High-Frequency CMOS Ring Oscillators,”

IEEE Trans. Circuits Syst. I, vol. 56, pp. 2669–2677, Dec. 2009.

[12] B. Razavi, Design of Analog CMOS Integrated Circuits. New York:

McGraw-Hill, 2001, ch. 4.

參考文獻

相關文件

By the similar reasoning of pumping lemma, if some non-S variable appears at least twice in a path from root, then the looping part between the two occurrences can be repeated as

– Runs replay mode to search for a solution – Reports to the user to run observation

The cross-section is a hexagon, and the shape of the solid looks like the union of two umbrellas..

The analytical solution of vertical, pitching, yawing, lower rolling, and higher rolling frequency expressions for linear guideway type (LGT) recirculating rollers with

With the help of the pictures and the words below, write a journal entry about what happened.. Write at least

Let p be the probability that a healthy person gets the disease, r be the probability that an infected person recovers in each month.. Suppose there are 8

 Promote project learning, mathematical modeling, and problem-based learning to strengthen the ability to integrate and apply knowledge and skills, and make. calculated

Now, nearly all of the current flows through wire S since it has a much lower resistance than the light bulb. The light bulb does not glow because the current flowing through it