Interoperability of EFCI and ER Switches for ABR Services in ATM Networks
Yuan-Cheng Lai Ying-Dar Lin Nai-Bin Hsu Department of Computer and Information Science National Chiao Tung University, Hsinchu, Taiwan
Abstract
With the advances in switching technologies, ER switches are becoming popular since they perform better than EFCI switches. In the transitional period, the EFCI and ER switches may coexist in the same ATM network.
Hence the efficiency of various ER schemes should be con- sidered in the mixed EFCI-ER environment, not only in the homogeneous ER environment.
In this paper, we describe five ER control mechanisms and compare their performance in the mixed EFCI-ER envi- ronment. Simulation results show that these algorithms can interoperate with the EFCI switches. However, the behavior of these ER schemes in the mixed EFCI-ER environment is sometimes different with that in the homogeneous ER envi- ronment. These ER schemes are re-evaluated based on their interoperability with EFCI schemes.
1 Introduction
The rate-based flow control for available bit rate(ABR) traffic is defined in the ATM Forum Traffic Management Specification Version 4.0 to provide a wide range of non- real time applications [1]. The behavior of traffic sources and destinations is clearly defined in order to provide the baseline for the vendors to follow. However, the meth- ods the switches use to control the source rate are up to the vendors. Currently, most ATM vendors have already provided ATM switches equipped with Explicit Forward Congestion Indication (EFCI) functions recommend by the ITU-T [2]. These switches, which use EFCI marking, are called the first-generation switches [3]. With the advances in switching technologies, the second-generation switches, which own the Explicit Rate (ER) setting capacity, are be- coming popular.
In the transitional period from first- to second-generation switches, interoperation of EFCI and ER switches becomes unavoidable. Because of the differences in their basic op- erations, whether they can cooperate efficiently along the path of the same virtual circuit (VC) is questionable. In
this paper, the performance of interoperating various ER schemes with EFCI is presented and compared. Although we know some properties of these ER schemes from many papers [4-7], the knowledge is obtained from an environ- ment in which all switches use the same flow control algo- rithm. However, from our simulation, the behavior of these ER schemes in the mixed EFCI-ER environment is some- times different with that in a pure ER environment. Hence these ER schemes must be reevaluated.
2 ABR Flow Control
First we briefly introduce the basic operation of the closed-loop rate-based control mechanism [1]. When a VC is established, the source end system (SES) sends the cells at the allowed cell rate (ACR), which is set as initial cell rate (ICR). In order to probe the congestion status of the network, the SES sends a forward Resource Management (RM) cell every Nrm-1 data cells. Each switch may set certain fields of the RM cell to indicate its own conges- tion status or the bandwidth the VC source should use. The destination end system (DES) returns the forward RM cell as a backward RM cell to the SES. According to the re- ceived backward RM cell, the SES adjusts its ACR, which is bound between peak cell rate (PCR) and minimum cell rate (MCR).
The RM cell contains a 1-bit congestion indication (CI) set to zero, and an explicit rate (ER) field which is set ini- tially to PCR by the SES. When the SES receives a back- ward RM cell, it modifies its ACR using additive increase and multiplicative decrease. The new ACR is computed as follows, depending on CI and ER fields in RM cells:
ACR=max(min(ACR + RIFPCR,ER),MCR), if CI=0, ACR=max(min(ACR(1-RDF),ER),MCR), if CI=1, where RIF is the rate increase factor and RDF is the rate decrease factor.
According to the congestion monitoring and feedback mechanism, various switch mechanisms can be classified into two types. One is the EFCI switch, the other is the ER switch.
2.1 EFCI scheme
In this scheme [8], when congestion occurs, the switch sets the EFCI bit to one (EFCI=1) in the header of each passing data cells. The DES, if a cell with EFCI=1 has been received, marks the CI bit (CI=1) to indicate conges- tion in each backward RM cell. In most cases, the queue length is used to decide whether congestion occurs or not.
As the queue length exceeds a threshold, denoted by Qt, congestion is claimed. When the queue length falls below the threshold, congestion is relieved.
2.2 Explicit Rate Feedback Schemes
In ER schemes, the switch computes the fair share of bandwidth with which a VC can be supported, and deter- mines the load and the actual explicit rate. When each RM cell passes, the switch sets the ER field to the determined explicit rate. Note that each switch is not allowed to in- crease the ER field. Thus, a source shall receive the mini- mum ACR of all the switches along the path.
Enhanced Proportional Control Algorithm (EPRCA) [9]
Each switch maintains a mean allowed cell rate (MACR) using a running exponential weighted average. When a switch receives a forward RM cell during the congestion period, MACR is updated as
MACR=(1-)MACR +CCR,
whereis the exponential averaging factor generally set to be 1/16 and CCR is the current cell rate of the VC recorded in the RM cell. The fair bandwidth share is computed as a fraction of the MACR:
Fair share = DPFMACR,
where DPF is a switch down pressure factor set close to but below 1. When a switch receives a backward RM cell, it reduces the ER field to the fair share if its queue length is larger thanQt.
Explicit Rate Indication for Congestion Avoidance (ER- ICA) [10]
ERICA uses a load factor, z, to indicate the overload or underload state of the switch. The load factor is defined as
z
=
Target rateInput rate:
The input rate is measured over a fixed averaging interval, and the target rate is usually set slightly below the link band- width. Because the goal of this algorithm is to maintain the load factor close to one, the sources ought to change their current sending rates inversely proportional to the cal- culated load factor. The VC share and fair share are as fol- lows:
VC share
=
CCRz ;Fair share
=
Target rateNumber of active connections: A switch updates the ER field in the backward RM cell it received to be the maximum value of the fair share and VC share.
Congestion Avoidance using Proportional Control (CAPC) [11]
Again, as in the ERICA scheme, the switches set a target utilization slightly below 1 and compute the load factor. The main difference lies in the way the fair share is computed, which depends on whether z<1 or z>1. Thus, we have
Fair share = Fair sharemin(ERU, 1+(1-z)Rup), if z<1, Fair share = Fair sharemax(ERF, 1-(z-1)Rdn), if z>1, where Rup is a slope parameter between 0.025 and 0.1, and Rdn is between 0.2 and 0.8. ERU and ERF determine the maximum allowed increase and minimum allowed de- crease, respectively. Usually ERU is set to 1.5 and ERF is set to 0.5. When a returning RM cell arrives at the switch, the ER field is updated to be the fair share.
The Charny Max-Min Scheme [12]
The fair share is computed using an iterative procedure in this scheme. Initially, the fair share is set to the link band- width divided by the number of active VCs. Some VCs cannot achieve the fair share at a switch because of the con- straints imposed by the limited amount of bandwidth avail- able at other switches along its path. For this switch, these VCs are called ”constrained VCs”. The switch can deter- mine whether a VC is constrained or not by comparing the fair share with the CCR field in the received forward RM cell. If the CCR field is less than the fair share, the VC is a constrained VC. Otherwise, it is an unconstrained VC.
For high throughput, the available bandwidth which the constrained VCs cannot use should be utilized by the uncon- strained VCs. Hence the fair share is computed as follows:
Fair share=Link bandwidth,
P
Bandwidth of constrained VCs Number of VCs,Number of constrained VCs
:
As a forward RM cell traverses the network, the switch determines whether the VC is constrained or not, recom- putes the fair share and reduces the ER and CCR field of the RM cell down to their fair share. The ER and CCR field of a backward RM cell may be reduced further down to the most current fair share on the forward path.
The Tsang Max-Min Scheme [13]
This scheme is similar to Charny Max-Min method, ex- cept for three differences:
1. The switch does not update the CCR field of the RM cell.
2. The switch determines a VC state depending on ER field, instead of CCR field, of the RM cell.
3. The switch determines the VC state and computes the fair share on forward and backward RM cells, not just the forward RM cell.
The following parameters are set for the above schemes in our example and simulation: Nrm=32, PCR=155Mbps, MCR=0bps, ICR=PCR/16, RIF=PCR/256, and RDF=1/16.
For EFCI, we used Qt=1000 cells. For EPRCA, we set
Q
t=1000 cells, =1/16, and DPF=7/8. Target rate is set to be 95% of the link bandwidth for EFICA and CAPC.
Also in the CAPC scheme, we use the following parame- ters: ERU=1.5, Rup=0.05, ERF=0.5, and Rdn=0.5.
3 Homogeneous environment
To understand the behavior of interoperating various ER schemes with EFCI scheme, we first show the performance of these schemes in the homogeneous environment in which all switches utilize the same control scheme. We use a sim- ple 3-switch configuration as shown in Figure 1, as our net- work topology. It is sufficient to exhibit the characteris- tics of various switches [14]. It consists of three switches and some connections grouped into three groups (G1, G2, G3). There are N1, N2, and N3 connections in the G1, G2, and G3, respectively. In our simulation of the homo- geneous environment, there are two VCs in each group, i.e.
N1=N2=N3=2. Also all sources considered in the simula- tions are persistent.
SW1 SW2 SW3
G3 G3
G1 (N1 VCs)
G2
51km 51km
1km
51km 51km
1km 100km 100km
Link1 Link2
(N3 VCs)
G1
G2 (N2 VCs)
Figure 1. Simulation Model.
Three performance issues we concern are the maximum queue length (MQL), utilization (U), and fairness (F). Fair- ness is defined as
F
= max(1
,max(
jxi,1
j)
;0)
where xi is the ratio of the actual throughput to the fair throughput for source i. This definition is the maximum ratio difference between ideal and achieved rate.
Simulation results in the homogeneous environment are shown in Table 1. MQL1 and U1 represent the maximum queue length and utilization at the switch 1. Similarly, MQL2 and U2 represent the maximum queue length and utilization at the switch 2. Note that the results about switch 3 are not shown because it do not become a bottleneck at any time.
From the table, it is obvious that the resulting behavior is more unfair in the homogeneous EFCI environment than in the homogeneous ER environments. The main reason is
Scheme G1 G2 G3 MQL1 MQL2 U1 U2 F
Ideal 38.75 38.75 38.75 0 0 100% 100% 100%
EFCI 39.48 42.46 27.29 1580 1443 85.8% 89.7% 70.4%
EPRCA 40.85 41.10 36.41 1470 1393 99.4% 99.7% 93.9%
ERICA 38.53 38.87 36.85 3 3 96.9% 97.4% 95.1%
CAPC 37.49 36.87 35.89 172 131 94.4% 93.6% 92.6%
CMM 38.57 38.57 38.57 3 3 99.2% 99.2% 99.5%
TMM 38.57 38.57 38.57 3 3 99.2% 99.2% 99.5%
Table 1. Comparison of the various switch schemes in the homogeneous environments.
that the beat down problem occurs when we use the pure EFCI switches. The beat down problem is that VCs passing through a larger number of switches get less bandwidth than VCs passing through a smaller number of switches.
Also, we observe that the MQL of EFCI and EPRCA is large. The is caused by the large oscillation of ACR.
Actually, in the homogeneous environments, the ACR of EFCI and EPRCA has large oscillation, the ACR of ERICA and CAPC has little oscillation, and the ACR of CMM and TMM is oscillation-free [5,7].
Regarding utilization, link capacity is not fully utilized because queue length threshold,Qt, is set too low in the ho- mogeneous EFCI environment. However, ifQtis set high, the maximum queue length will be raised dramatically [15].
Hence we sacrifice some bandwidth to keep the maximum queue length in the reasonable range. On the other hand, high utilization is achieved in the homogeneous ER envi- ronments. EPRCA has high utilization. ERICA and CPAC achieve the target rate. TMM and CMM utilize almost the complete link bandwidth.
4 Interoperating EFCI with ER schemes
In this heterogeneous simulation we use an EFCI scheme on switch 1 and an ER scheme on switch 2. The results of interoperating EFCI with various ER schemes are in Table 2. From the table, the throughput of G3, which ranges be- tween 31.47 and 32.57, is smaller than that of G1 and G2.
Hence the beat down problem still exists when the EFCI switch appears. Meanwhile, the severity of the beat down problem is very similar among all mixed EFCI-ER environ- ments. Their performance lies between the homogeneous EFCI environment and the homogeneous ER environment, which is very reasonable.
EFCI-EPRCA
In this mixed EFCI-EPRCA environment, the perfor- mance of the EFCI switch is similar to that of the homoge- neous EFCI environment. The EFCI switch only achieves 86.9% link bandwidth because the buffer is empty at the switch sometimes. Meanwhile, the utilization of EPRCA is driven to 99.6%, similar to that of the homogeneous EPRCA environment.
Scheme G1 G2 G3 MQL1 MQL2 U1 U2 F
Ideal 38.75 38.75 38.75 0 0 100% 100% 100%
EFCI-EPRCA 35.24 45.09 32.36 1580 1813 86.9% 99.6% 83.5%
EFCI-ERICA 43.40 41.90 31.98 1317 12 96.9% 95.0% 82.5%
EFCI-CAPC 43.27 38.75 31.47 1332 147 96.1% 90.3% 81.2%
EFCI-CMM 43.34 39.64 32.30 1296 52 97.3% 92.5% 83.4%
EFCI-TMM 43.59 38.57 32.57 1296 4 97.3% 90.8% 84.1%
Table 2. Comparison of the various ER schemes in the mixed EFCI-ER environments.
As described above, in the EFCI-EPRCA environment, the throughput of G3 (32.36) is between the homogeneous EFCI environment (27.29) and the homogeneous EPRCA environment (36.41). Therefore G1 obtains the lower throughput and G2 obtains the higher throughput. From Figure 2, the same conclusion is drawn because the ACR of G1 has larger oscillation and lower mean value, and ACR of G2 has smaller oscillation and higher mean value.
0 0.05 0.1 0.15 0.2 0.25 0.3
0 10 20 30 40 50 60 70 80 90
G1 G2 G3
time(sec)
ACR(Mbps)
Figure 2. ACR dynamics in the EFCI-EPRCA.
EFCI-ERICA
In Figure 3, the oscillation of ACR of G2 is small. Hence the virtue of EPRCA is kept in this environment. The no- ticeable thing is that throughput of G1 and utilization of switch 1 are raised. The phenomenon is different from the one in the EFCI-EPRCA environment. We can explain it as follows. The ACR of G3 does not increase to a high level because the ACR of G2 slightly oscillates around the fair share and ACR of G3 is bounded to the ACR of G2, as shown in Figure 3. When the ACR of G3 is restricted to the value in ER field, which is set by ERICA scheme, the resid- ual bandwidth left by G3 is used by G1 at switch 1. Hence the maximum ACR of G1 increases. Then the probability that the buffer is empty at the EFCI switch is reduced, which causes higher utilization.
The same fact also explains the increase of ACR of G2 and the decrease of utilization of the ERICA switch. When the ACR of G3 is reduced because congestion occurs at the EFCI switch, the ACR of G2 increases to use the resid- ual bandwidth left by G3. However, the increase speed is not fast enough to completely match the residual band-
width. Hence some bandwidth is wasted, which causes the decrease of utilization at switch 2.
0 0.05 0.1 0.15 0.2 0.25 0.3
0 10 20 30 40 50 60 70 80 90
G1 G2 G3
time(sec)
ACR(Mbps)
Figure 3. ACR dynamics in the EFCI-ERICA.
EFCI-CAPC
As the EFCI-ERICA environment, the oscillation of G2’s ACR is small in this EFCI-CAPC environment. How- ever, the utilization of the CAPC switch is only 90.3%.
There is a gap between the throughput and target rate. The main reason is that the parameters are slowly increased and quickly decreased (Rup=0.05 and Rdn=0.5). Hence only a little residual bandwidth G3 left is used by G2, which causes the lower utilization. Therefore, the choice of pa- rameters is critical to the performance of CAPC scheme, especially in the mixed environment. The ACR dynamics in the EFCI-CAPC environment is shown in Figure 4.
0 0.05 0.1 0.15 0.2 0.25 0.3
0 10 20 30 40 50 60 70 80 90
time(sec)
ACR(Mbps)
G1 G2 G3
Figure 4. ACR dynamics in the EFCI-CAPC.
EFCI-CMM
From Figure 5, the ACR of G2 oscillates slightly in the mixed EFCI-CMM environment although it is an oscilla- tion free mechanism in the homogeneous environment. The oscillation is good because G2 can utilize residual band- width left by G3. However, the residual bandwidth is not completely used by G2 although the residual bandwidth can be calculated in the CMM scheme. There are two reasons.
First, when the ACR of G3 decreases due to congestion of the EFCI switch, i.e. there are at leastQtcells in the EFCI switch, the CMM does not obtain the current cell rate be- cause the RM cells of G3 are queued at switch 1. Hence the
fair share calculated by CMM is smaller than the actual fair share because the current CCR information, recorded in the RM cells queued at switch 1, is delayed.
Another more important factor is that the ER value is decreased both in the forward and backward paths. When the accurate ER is recorded in the forward RM cell, the ER value may be reduced to a lower level in the backward path.
On the other hand, when less bandwidth is set in the forward path, ER value can not be increased in the backward path.
That ER is set in the forward and backward is a conservative method to protect the switch, but is not beneficial in this case.
0 0.05 0.1 0.15 0.2 0.25 0.3
0 10 20 30 40 50 60 70 80 90
G1 G2 G3
time(sec)
ACR(Mbps)
Figure 5. ACR dynamics in the EFCI-CMM.
EFCI-TMM
The ACR dynamics of the interoperating EFCI with TMM is shown in Figure 6. It is reasonable that the ACR of G3 is bounded by the fair share. However, it is surprising that the ACR of G2 does not capture the residual bandwidth left by G3. The reason is as follows. TMM does not obtain any ER information because the EFCI switch does not set the ER field. When TMM uses the ER field, which is set to PCR by the source initially, to determine whether a VC is constrained or not, all VCs are determined as the uncon- strained VCs. Therefore, the ACR of G2 is bounded by the fair share, regardless the decrease of ACR of G3. This also results in the lower utilization at the TMM switch.
0 0.05 0.1 0.15 0.2 0.25 0.3
0 10 20 30 40 50 60 70 80 90
G1 G2 G3
time(sec)
ACR(Mbps)
Figure 6. ACR dynamics in the EFCI-TMM.
Finally, from the value of utilization, MQL, and fairness,
we feel that CMM is a better scheme.
5 Conclusion
In the EFCI-ER environment, there are some observa- tions which are not shown in the homogeneous environ- ment. We summarize them as follows.
1. The performance of the mixed EFCI-ER environment usually lies between the homogeneous EFCI and ER envi- ronments.
2. The small oscillation and oscillation free ER schemes help the EFCI switch to raise its utilization.
3. The performances of TMM and CMM are different in the mixed EFCI-ER environment, although they have the same behavior in the homogeneous environment.
4. The performance of CMM is better from the simula- tion results in the homogeneous and mixed environments.
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