應用電子學（II）期中考
第1頁，共 4 頁
應用電子學（）期中考試題
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VT=26mV
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應用電子學（II）期中考
第2頁，共 4 頁
1. (10 points) Draw a circuit model for a voltage amplifier with an open-circuit voltage gain of 20, an input impedance of 1k, and an output impedance of 5 k.
A signal source with an output impedance of 0.5 k and a 10 k load are connected to the amplifier. What is the voltage gain and current gain?
2. (16 points) The collector current of each BJT is biased at 0.5 mA and in a forward active mode. Find the small signal input/output impedance marked in each circuit.
(npn BJT: IS = 210-15 A, VA = 50 V, = 200. pnp BJT: IS = 10-15 A, VA = 40 V, = 100.)
(a) (b)
(c) (d)
3. (28 points) The BJTs have the same parameters and IC of problem 2. Find the voltage gain and input/output impedance.
(a) (b)
(c) (d) Rin
Rin
Rout Rout
應用電子學（II）期中考
第3頁，共 4 頁
4. (40 points) Use the circuit to the right to design a CE amplifier with a voltage gain (o/sig) close to -20. In this circuit, VCC = 9 V, Rsig = 50 , RL = 600 , and the BJT has a of 200 and IS=210-15 A. Neglect the Early effect in this problem. Follow the following steps to complete the design.
(a) First assume that Rsig is much
smaller than R1//R2//r, thus the gain is about -gm(RL//RC). The values of VC and VE are set at 5 and 1 V, respectively. Find RC, RE and IC to give the right gain.
Hint:
(b) Estimate VB, from which you can choose R1 and R2. Assume the current flowing through R2 is 10 times of IB. Check if Rsig is much smaller than R1//R2//r. Hint:
(c) Plot the small-signal model of the circuit. Calculate Rin and Rout (as shown in the figure).
(d) Now we want to modify the emitter resistor part to make the amplifier more linear but with a smaller gain, -5. The method is to split RE into Re and RE’, and only RE’ is bypassed by the capacitor. The gain can be set by Re. Find out Re and RE’, and calculate Rin for this modified circuit.
For nMOSFETs and pMOSFETs with following parameters (unless otherwise stated), answer the following questions.
nMOSFET: μnCox = 200 μA/V2, VTH = 0.4 V, and λ = 0.1V-1. pMOSFET: μpCox = 100 μA/V2, VTH =- 0.4 V, and λ = 0.1V-1.
5. (16 points)Design a current source of 0.5mA with an NMOS and a PMOS
respectively. W/L=18/0.18. VDD=1.8V. λ = 0. Use resistors for gate bias. Find the compliance of each circuit.
6. (30 points) Design a voltage amplifier with an open-circuit voltage gain of -5, an input impedance of 2 M, and an output impedance of 2 k. Use a four-resistor bias circuit and an NMOS with ID = 0.5 mA and W/L=10/0.18. VCC=2.5V. Plot the small-signal model of the circuit and check the Rout of the final circuit.
Rout
VB VC
VE
應用電子學（II）期中考
第4頁，共 4 頁
7. (20 points) Find the voltage gain and input/output impedance. All the MOSFETs are biased at ID = 0.5 mA. W/L=10/0.18. (Find ro and gm for NMOS and PMOS first)
(a) (b) (c)
(d)
