應用電子學（II）期中考
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應用電子學（）期中考試題
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應用電子學（II）期中考
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1. (12 points) Draw a circuit model for a voltage amplifier with an open-circuit voltage gain of 10, an input impedance of 50, and an output impedance of 50.
A signal source with an output impedance of 50 and a 50 load are connected to the amplifier. What is the voltage gain, current gain and the power gain? If the signal source is delivering a 1 W AC signal into the amplifier, what is the power sent to the load?
2. (24 points) The collector current of each BJT is biased at 0.4 mA and in a forward active mode. Find the small signal input/output impedance marked in each circuit.
(npn BJT: IS = 110-15 A, VA = 40 V, = 100. pnp BJT: IS = 0.510-15 A, VA = 30 V,
= 50.) VB and VCC are constant voltage sources.
(a) (b)
(c) (d)
(e) (f) Rin
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應用電子學（II）期中考
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3. (20 points) The BJTs have the same parameters and IC of problem 2. Find the ac small signal voltage gain of each amplifier circuit.
(a) (b)
(c) (d)
4. (30 points) Use the circuit to the right to design a CE amplifier with an AC voltage gain of -5. The output impedance should be 600 , and the input impedance should be larger than 2k. In this circuit, VCC = 1.8 V, and the BJT has a of 100 and IS=0.510-15 A. The voltage drop across RC is set to be 0.6 V, and VCE of Q is set to be 0.9 V without input signal. Neglect the Early effect in this problem.
(a) Find RC, RE1, and RE2.
Hint: find the voltage drops across RE1, and RE2 respectively first.
(b) Calculate the base voltage bias VB. Design proper R1 and R2 to yield right VB. Assume the current flowing through R2 is 10 times of IB. Calculate the input impedance and check if it is larger than the required value.
(c) Plot the small-signal model of the circuit.
For nMOSFETs and pMOSFETs with following parameters (unless otherwise stated), answer the following questions.
nMOSFET: μnCox = 250 μA/V2, VTH = 0.4 V, and λ = 0.1V-1. pMOSFET: μpCox = 120 μA/V2, VTH =- 0.4 V, and λ = 0.1V-1.
應用電子學（II）期中考
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5. (16 points) Design a current source of 0.2mA with an NMOS and a PMOS respectively. W/L=10/0.18. VDD=1.8V. λ = 0. Use resistors for gate bias. Find the compliance of each circuit.
6. (30 points) Design an AC voltage amplifier with an open-circuit voltage gain of 5 (a positive gain) and an output impedance of 2 k. Use a four-resistor bias circuit with VDD=1.8V and an NMOS of W/L=18/0.18. Plot the small-signal model of the circuit and calculate the input impedance of the final circuit.
7. (28 points) Find the voltage gain and input/output impedance. All the MOSFETs are biased at ID = 0.5 mA. W/L=18/0.18. (Find ro and gm for NMOS and PMOS first)
(a) (b)
(b) (d)
