本研究利用 ANP 法進行將資深的生管專家之意見整合到晶圓廠整合性派工
程序的決策評估，並應用電腦輔助決策軟體 Super Decision 運算出最適派工方 法，作為生管人員在選擇派工策略從事生產規劃與控制時選定最適派工方法之參 考。在研究過程中受到一些研究上的限制，未來的研究方向建議如下：
1. 由 於 ANP 法 在 決 策 評 估 的 過 程 中 ， 忽 略 了 專 家 評 估 判 斷 的 模 糊 性
（Fuzziness），因此本研究建議後續研究時，可應用模糊集合（Fuzzy Set）
的概念加以分析運用。
2. ANP 法的決策過程中需要經過一些繁複的成對比較判斷，容易造成專家在進 行準則與方案評估時的困擾，未來可考慮其他較簡易的權重計算方式，取代 繁雜的成對比較程序。
3. 根據評估結果，顯示 EDD 法為最適派工方法，然而本研究所提出之 8 種派工 方法係為單獨式派工方法，未來可針對此部分，可改以幾種組合式派工方法 來取代單獨式派工方法。
4. 本研究之目的係提供晶圓廠未來在評估多種生產績效情況下，能較快速且便 利找出適宜之派工模式。因此在建構生產績效指標上只考慮少數幾種，為的 是簡化過於繁瑣的指標項目。對於後續的研究者，建議可加入其他與生產績 效相關之評估準則，做更精確的評估。
5. 本研究發現綜合期望指標概念，可供生管人員作為評估現場派工的良好工 具。因為綜合期望指標值，提供了一個生管人員將生產特徵因素對產能情況 及生產績效做量化的評比方式。因此，後續研究者可加入更多的生產特徵因 素項目，並進行更完整的現場最適派工方法之評比。
6. 本研究之 ANP 派工法則評估模式所考慮之衡量要素係以訂單式生產（MTO）
型態之晶圓製造廠為主，未來可加入包含其他不同生產型態之晶圓製造廠之 衡量要素作為評估，進行可適用不同生產型態的現場最適派工方法之評比。
參考文獻
19.鄧振源，「層級分析法，計畫評估：理論與實務講義」，華梵大學工業管理學 系，台北，2001。
20.謝志岳，「晶圓製造廠黃光區與爐管區派工法則之研究」，國立交通大學工業 工程與管理學系，碩士論文，1998。
21.賴勇見，「應用系統模擬於鞋模具生產與派工之探討」，雲林科技大學工業工 程與管理研究所，碩士論文，2004。
22.簡煌煜，「產出績效衡量指標之研究」，國立交通大學工業工程與管理學系，
碩士論文，1998。
23.羅仕宗，「時間加權的及時派工法則」，國立清華大學工業工程與工程管理學 系，碩士論文，2001。
24.Atherton, L. F. and R. W. Atherton, “Wafer Fabrication : Factory Performance and Analysis,” Kluwer Academic Publishers, 1995.
25.Blackstone, J. H., Phillips, D. T. and Hogg, G. L., 1982, A state-of-the-art survey of dispatching rules for manufacturing job shop operations. International journal of production research, 20, 27-45.
26.Benson, R. F., S. P. Cunningham, and R. C. Leachman, “Benchmarking Manufacturing Performance in the Semiconductor Industry,” Production and Operations Management, Vol. 4, No. 3, 1995.
27.Blackstone, J. H., D.T., Phillips, and G. L., Hogg, “A state-of-The Art Survey of Dispatching Rules for Manufacturing Job Shop Operations”, International Journal of Production Research, Vol.20, pp. 27-45, 1982.
28.Chang, Y. T. Sueyoshi, and R. S. Sullivan, “Ranking Dispatching Rules by Data Envelopment Analysis in a Job Shop Environment”, IIE Transactions, Vol. 28, pp.
631-642, 1996.
29.Chen , J. C., C. W. Chen, C. Y. Tai, and J. C. Tyan, “Dynamic state-dependent dispatching for wafer fabrication,” International Journal of Production Research, Vol. 42, No. 21, pp. 4547-4562, 2004.
30.Chung, S. H, Amy H.I. Lee, and W.L. Pearn, “Analytic networkprocess (ANP) approach for product mix planning in semiconductor fabricator,” International Journal of Production Economics, 96, pp. 15-36, 2005.
31.Conway, R. W., “Priority dispatching and work-in-process inventory in a job shop,” Journal of Industrial Engineering, Vol. 16, pp. 123-130 and pp. 228-237, 1965.
32.Crandell, R. E. and T. H. Burwell, “The Effect of Work- in-Process Inventory Levels on Throughput and Lead Time,” Production and Inventory Management Journal, Vol. 34, No. 1, pp. 6-12, 1993.
33.Ehteshami, B., R. G. Petrakian, and P. M. Shabem, “Trade-Offs in Cycle Time Management: Hot Lots,” IEEE Transactions on Semiconductor Manufacturing,
Vol. 5, No. 5, pp. 101-105, 1992.
34.Enns, S. T., “An Integrated System for Controlling Shop Loading and Work Folw,” International Journal Production Research, Vol. 33, No.10, pp. 2801-2820, 1995.
35.French, Simon, “Sequencing and Scheduling,” Ellis-Horwood Inc., 1982.
36.Fronckowiak, D., A. Peilert, and K. Nishinohara, “Using Discrete Event Simulation to Analyze the Impact of Job Priorities on Cycle Time in Semiconductor Manufacturing,” IEEE/SEMI Advanced Semiconductor Manufacturing Conference, pp. 151-155, 1996.
37.Goldratt, E. M. and J. Cox, “The Goal: A Process of Ongoing Improvement,”
North River Press, New York, 1992.
38.Hershaner, J. C., and J. Ebert, “Search and simulation selection of a job-shop scheduling rule,” Management Science, Vol. 21, pp. 53-63, 1975.
39.Hung, Y. F. and C. B. Chen, “A Study of Wafer Fab Dispatching Rules Based on Empirical Flow Time Predictions,” IEEE/CPMT Int'l Electronics Manufacturing Technology Symposium, pp. 430-438, 1997.
40.Jharkharia, S. and R. Shankar, “Selection of logistics service provider: An analytic network process (ANP) approach,” Omega, In Press, Corrected Proof, Available online 29, August, 2005.
Kiran, A. S. and Smith, M. S., 1984, Simulation studies in job shop scheduling: a survey, Computers and Industrial Engineering, 8, 46-51.
41.Koriyama, H., Y. Yazaki, Y. Kato, and T. Kisakibaru, “Virtual Manufacturing System,” International Symposium on Semiconductor Manufacturing, pp. 5-8, 1995.
42.Leachman, R. C. and D. A. Hodges, “Benchmarking Semiconductor Manufacturing,” IEEE Transaction on Semiconductor Manufacturing, Vol. 9, No.
2, 158-169, 1996.
43.Lee, J.W. and S.H. Kim, “Using analytic network process and goal programming for interdependent information system project selection,” Computers and Operations Research, 27, pp. 367-382, 2000.
44.Li, S., T. Tang, and D. W. Collins, “Minimum Inventory Variability Schedule With Applications in Semiconductor Fabrication,” IEEE Transactions on Semiconductor Manufacturing, Vol. 9, No. 1, pp. 145-149, 1996.
45.Lou, S. and P. W. Kager, “A Robust Production Control Policy for VLSI Wafer Fabrication,” IEEE Transactions on Semiconductor Manufacturing, Vol.2, No.4, pp. 159-164, 1989.
46.Lozinski C. and C. R. Glassey, “Bottleneck Starvation Indicators for Shop Floor Control,” IEEE Transactions on Semiconductor Manufacturing, Vol. 1, No. 4, pp.
147-153, 1988.
47.Lu, S. C. H. and P. R. Kumar, “Distributed Scheduling Based on Due Dates and Buffer Priorities,” IEEE Transactions On Semiconductor Manufacturing, Vol. 36, No. 12, pp. 1406-1416, 1991.
48.Lu, S. C. H., D. Ramaswamy, and P. R. kumar, “Efficient Scheduling Policies to Reduce Mean and Variance of Cycle-time in Semiconductor Manufacturing Plants,” IEEE Transactions on Semiconductor Manufacturing, Vol. 7, No. 3, pp.
374-388, 1994.
49.Maiorana, A. and G. Iuliano, “Improving Cycle Time through Managing Variability in a DRAM Production Line,” IEEE Transactions on Semiconductor Manufacturing, pp. 29-32, 1997.
50.Martin, D. P., “Total operational efficiency (TOE): the determination of capacity and cycle time components and their relationship to productivity improvements in a semiconductor manufacturing line,” IEEE/SEMI advanced Semiconductor Manufacturing Conference, pp. 37-41, 1999.
51.Meade, L.M. and J. Sarkis, “Analyzing organizational project alternatives for agile manufacturing processes: An analytical network approach,” International Journal of Production Research, Vol. 37, No. 2, pp. 241-261, 1999.
52.Meade, L.M. and A. Presley, “R&D project selection using the analytic network process,” IEEE Transactions on Engineering Management, Vol. 49 No. 1, pp.
59-66, 2002.
53.Montazeri, M. and Van Wassenhove, L. N., 1990, Analysis of scheduling rules for an FMS. International journal of production research, 28, 785-802.
54.Moodie, C. L., T. Adachi, and J. J. Talayage, “A Pattern-Regression-Based Method for controlling a Multi-Loop Production System,” International Journal Prodcution Research, Vol. 26, No. 12, pp. 1943-1957, 1988.
55.Pierreval, H. and N. Mebarki, “Dynamic Selection of Dispatching Rules for Manufacturing System Scheduling,” International Journal of Production Research, Vol. 35, No. 6, pp. 1575-1591, 1997.
56.Saaty, T.L., “The analytic hierarchy process”, New York: MeGraw-Hill, 1980.
57.Saaty, T.L. and M. Takizawa, “Dependence and independence: From linear hierarchies to nonlinear networks,” European Journal of Operational Research, 26, pp. 229-237, 1986.
58.Saaty, T. L., Decision Making with Dependence and Feedback: The Analytic Network Process, RWS Publications, 1996.
59.Saaty T. L., “Decision making in complex environments,” Super Decisions, 2003.
60.Uzsoy, R., C. Y. Lee, and A. Louis, “A Review of production and Scheduling Models in the Semiconductor Industry Part II : Shop-Floor Control,” IIE
Transactions, Vol. 26, No. 5, pp. 44-55, 1994.
61.Wang H.F., “Multicriteria Decision Making -- from Certainty to Uncertainty,”
Ting Lung Book, 2004.
62.Wein, L.M., “Scheduling Semiconductor Wafer Fabrication,” IEEE Transactions on Semiconductor Manufacturing, Vol.1, No.3, pp.115-130, 1988.
63.William J. Stevenson, “Operations Management 7th Edition,” McGraw-Hill companies, Inc, 2002.
64.Super decisions software for decision making, http://www.superdecisions.com