電磁輻射充斥著現今的科技化社會，其能利用天線將訊號做遠距離傳輸，使 人們可以做遠距離溝通以及訊息的傳遞；相反地，也會使得系統電路產生互相地 電磁干擾而毀壞電路的運作，而導致意外的發生。
本論文即針對系統電路中處於晶片-電路板之轉換階級的構裝電路進行電磁輻 射抑制以及建模研究。在輻射研究方面，將釘架式構裝及基板式構裝之兩大構裝 型態做構裝打線及結構設計，並利用經濟部標準檢驗局提供之符合 IEC61967-3 之 近場掃描儀器進行構裝電路電磁輻射分析，將離構裝頂端距離 0.5mm 處之所有電 磁場進行統計並輸出三維及二維圖形，再將得到之結果予以討論。從結果來看，
可得到無論何種型態的構裝，其可藉由降低回流電感的打線結構使構裝的電磁輻 射量更低；而從結構及布局來看，在 BGA 構裝上可利用在訊號鍍穿孔周圍設計接 地鍍穿孔，使訊號回流更優異，以降低電磁輻射干擾；甚至利用在熱傳遞上有良 好表現的 Thermal/Ground Ball 將回流電感大幅降低，以減少輻射訊號；至於模型 建立方面乃依據 IEC62433 電磁模型萃取標準為基礎，針對構裝之訊號傳遞元件進 行建模，再將所有元件模型以及傳輸線晶片進行串接且將晶片-構裝之回流不連續 進行電路元件補償，並與實際構裝線路量測做比對，得到之結果發現釘架式構裝 之模型頻寬可準確至 20GHz 而 BGA 構裝之模型頻寬則可準確至 10GHz，未來在 執行構裝預先設計時，即可利用此些模型先行判斷構裝電路設計的良莠，以減少 設計時所產生的成本及時間。
此一論文研究已完成基礎之構裝輻射效應分析及模型建立，未來可針對實際 主動晶片導入時，高頻訊號造成直流偏壓上的擾動以及瞬時切換雜訊所造成的電 磁輻射進行理論分析以及相關衍生之電源/訊號完整性研究如 IR-Drop 以及共振腔 效應；而在模型建立的部分，如能利用此模型進行電磁干擾的評估及預測，即可 在電路模擬平台上快速得到晶片-構裝-電路板之電磁輻射驗證，達成快速有效率的 電磁相容設計方案。
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參考文獻
[1] Kohyama, S., J. Matsunaga and K. Hashimoto, "Directions in CMOS technology,"Electron Devices Meeting, 1983 International, Vol. 29, 151-154, 1983.
[2] Chung-Chun Chen, Chi-Hsueh Wang, Bo-Jr Huang, Hen-Wai Tsao and Huei Wang, "A 24-GHz divide-by-4 injection-locked frequency divider in 0.13-μm CMOS technology,"Solid-State Circuits Conference, 2007 ASSCC '07 IEEE Asian, 340-343, 2007.
[3] Toifl, T., C. Menolfi, M. Ruegg, R. Reutemann, P. Buchmann, M. Kossel, T.
Morf, J. Weiss and M. L. Schmatz, "A 22-gb/s PAM-4 receiver in 90-nm CMOS SOI technology," Solid-State Circuits, IEEE Journal of, Vol. 41, No. 4, 954-965, 2006.
[4] Rennie, D. J. and M. Sachdev, "Novel Soft Error Robust Flip-Flops in 65nm CMOS," Nuclear Science, IEEE Transactions on, Vol. 58, No. 5, 2470-2476, 2011.
[5] Popp, J. D., B. Kormanyos, M. Adams, A. Hurtado, J. Braatz, C. Wolfhausen and T. McKay, "Design of millimeter-wave mixed signal circuits in 45nm SOI CMOS,"SOI Conference (SOI), 2010 IEEE International, 1-2, 2010. M. Young, The Techincal Writers Handbook. Mill Valley, CA: University Science, 1989 [6] Yulin Tan, Hongtao Xu, M. A. El-tanani, S. Taylor and H. Lakdawala, "A
flip-chip-packaged 1.8V 28dBm class-AB power amplifier with shielded concentric transformers in 32nm SoC CMOS,"Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2011 IEEE International, 426-428, 2011.
[7] Kuhn, K. J., "CMOS scaling for the 22nm node and beyond: Device physics and technology,"VLSI Technology, Systems and Applications (VLSI-TSA), 2011
63
International Symposium on, 1-2, 2011.
[8] Yuan-Chia Hsu, Hwann-Kaeo Chiou, Hsien-Ku Chen, Ta-Yeh Lin, Da-Chiang Chang and Ying-Zong Juang, "Low Phase Noise and Low Power Consumption VCOs Using CMOS and IPD Technologies," Components, Packaging and Manufacturing Technology, IEEE Transactions on, Vol. 1, No. 5, 673-680, 2011.
[9] Eshraghian, K., "SoC Emerging Technologies,"Proceedings of the IEEE, Vol. 94, No. 6, 1197-1213, 2006.
[10] Appello, D., P. Bernardi, M. Grosso and M. S. Reorda, "System-in-package testing: problems and solutions,"Design & Test of Computers, IEEE, Vol. 23, No.
3, 203-211, 2006.
[11] Tummala, R. R., "Packaging: past, present and future,"Electronic Packaging Technology, 2005 6th International Conference on, 3-7, 2005.3
[12] Jun So Pak, Joohee Kim, Jonghyun Cho, Kiyeong Kim, Taigon Song, Seungyoung Ahn, Junho Lee, Hyungdong Lee, Kunwoo Park and Joungho Kim,
"PDN Impedance Modeling and Analysis of 3D TSV IC by Using Proposed P/G TSV Array Model Based on Separated P/G TSV and Chip-PDN Models,"
Components, Packaging and Manufacturing Technology, IEEE Transactions on, Vol. 1, No. 2, 208-219, 2011.
[13] Bogation, E., “Signal Integrity—Simplified,” Prentice Hall, 2004.
[14]
Clayton R. Paul, “Introduction to electromagnetic compatibility,” New York, John Wiley & Sons, Inc., 1992.
[15] EN 55022:2006 +A1:2007 standard „Information technology equipment. Radio disturbance characteristics. Limits and methods of measurement”
[16] US Code of Federal Regulations, Volume 47, Parts 15.
[17] CNS 13438:2010 standard “Radiated Emissions above 1GHz and Conducted
64
emissions on Telecommunication Ports.”
[18] Wu, T.-L.; Buesink, F.; Canavero, F., "Overview of Signal Integrity and EMC Design Technologies on PCB: Fundamentals and Latest Progress," Electromagnetic Compatibility, IEEE Transactions on , vol.55, no.4, pp.624,638, Aug. 2013.
[19] E. Sicard, Wu Jian-fei, Li Jian-cheng, "Signal integrity and EMC performance enhancement using 3D Integrated Circuis – A Case Study", EMC Compo 2013, Nara, Japan
[20] IEC61967-2. Integrated circuits - Measurement of electromagnetic immunity, 150 kHz to 1 GHz - Part 2: Measurement of radiated emissions – TEM-cell method.
[21] IEC 62433-1：“EMC IC modelling - Part 1: General modelling framework”, Apr.
2011.
[22]
余柏輝, "系統構裝效應探討與模型建立-以整合式被動元件分析," 國立高雄 大學電機工程學系碩士班碩士論文, 民國一百零一年.
[23] Sudo, T.; Sasaki, H.; Masuda, N.; Drewniak, J.L., "Electromagnetic interference (EMI) of system-on-package (SOP)," Advanced Packaging, IEEE Transactions on , vol.27, no.2, pp.304,314, May 2004
[24] Kondo, Koichi; Takahata, O.; Ono, H.; Yoshida, Shigeyoshi; Yamaguchi, M.,
"Electromagnetic Noise Suppression of LSI Packages Using Ferrite Film-Plated Lead Frame," Magnetics, IEEE Transactions on, vol.45, no.10, pp.4250,4252, Oct. 2009
[25] D. M. Pozar, Microwave Engineering, 2nd ed. Wiley, pp. 352, 1998.
[26]
Horng, T.S.; Tseng, A.; Huang, H.H.; Wu, S.M.; Lee, J.J.; , "Comparison of advanced measurement and modeling techniques for electrical characterization
65
of ball grid array packages," Electronic Components & Technology Conference, 1998. 48th IEEE, vol., no., pp.1464-1471, 25-28 May 1998
[27] L. L. Wai, K. M. Chua, and A. C. W. Lu, “A Compact package with Integrated Patch Antenna for Single-chip 60-GHz Radios”, Progress In Electromagnetic Research C, Vol. 20, 227-238, 2011.
[28] Kaupp, H. R., "Characteristics of Microstrip Transmission Lines," Electronic Computers, IEEE Transactions on , vol.EC-16, no.2, pp.185,193, April 1967 [29] S. R. Nelatury, M. N. O. Sadiku, and V. K. Devabhaktuni., “CAD Models for
Estimating the Capacitance of a Microstrip Interconnect: Comparison and Improvisation”, PIERS Proceedings, August 27-30, Prague, Czech Republic, 2007
[30] Howard Johnson and Martin Graham, “High Speed Digital Design: A Handbook of Black Magic”, Prentice Hall, 1993
[31] 陳彥勛, "系統構裝三維互連線路技術研究與以修正 T 型等效電路實現長傳 輸線效應," 國立高雄大學電機工程學系碩士班碩士論文, 民國九十九年.
[32] 王高義, "構裝基板線路系統模組化設計與特性改善研究," 國立高雄大學電 機工程學系碩士班碩士論文, 民國一百年.
[33] 郭俊廷, "以變壓器為基礎之 IPD 及印刷電路板全差動式帶通濾波器設計,"
國立高雄大學電機工程學系碩士班碩士論文, 民國一百年.