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In order to predict the response of EUV irradiation damage in each material, the fundamental material characteristics should be fully understood. The total energy absorption, energy band gap, intrinsic trap density, radiation induce defect traps, charge capture cross-section, and interface states distribution before and after EUV irradiation, all of these factors can help us to predict the response to EUV irradiation.

Radiation hardness is an important issue in the process. As the EUV is introduced into IC process, how to provide a good way to protect device from EUV damage is also an important issue. Capping a radiation hard film on the top, using different S/D structure, using different isolation structure may be helpful on radiation hardness. It has been reported that different gate thicknesses have different responses to the radiation. The test of EUV radiation on thinner gate dielectric thickness should be performed.

After irradiation, we have tested the effect of long time storage at room

steps. If the radiation damage can be delimited by 500 oC ~ 600 oC thermal treatment, we can use the temperatures in the latter process to eliminate the radiation damage.

The radiation damage issue can be much more relieved. The annealing effect at low temperature within 600 oC should be researched.

Even the radiation damage can be annealed by some annealing step. However the device reliability is also need to be noticed after EUV irradiation. NBTI and PBTI tests should also be taken.

In this thesis we have noticed that IL plays an important role in radiation damage.

The researches of EUV irradiation on different ILs are very important for high-k/metal gate device or another advance MOSFETs.

References

[1]. Lithography in international technology roadmap for semiconductor, pp.11-12, 2009

[2]. M. D. Austin, H. Ge, W. Wu, M. Li, Z. Yu, D. Wasserman, S. A. Lyon, and S. Y.

Choub “Fabrication of 5 nm linewidth and 14 nm pitch features,” Appl. Phys.

Lett., Vol.84 pp.5299 – 5301, 2004.

[3]. O. Wooda, C. S. Koayb, K. Petrillob, H. Mizunoc, S. Raghunathana, J. Arnoldb, D. Horakb, M. Burkhardtd, G. Mcintyreb, Y. Denge, B. L. Fontainee, U.

Okoroanyanwua, A. Tchikoulaevaf, T. Wallowe, J. H. C. Chenb, M.Colburnb, S.

S.C. Fanb, B. S. Haranb, and Y. Yinb “Integration of EUV lithography in the fabrication of 22-nm node devices by nanoimprint lithography”Proc. SPIE, Vol.

7271, pp. 727104-1-727104-9, 2009

[4]. A. G. Revesz “Defect structure and irradiation behavior of noncrystalline SiO2 vitreous silica and silicon-silicon dioxide interface defect structure and behavior during ionizing or particle irradiation,” IEEE Transactions on Nuclear Science., Vol.18, pp. 113-116, 1971

[5]. C. M. Svensson, ’’The Defect Structure of the Si-SiO2 interface, a model based on trivalent silicon and its hydrogen ’compounds’,” The physics of SiO2 and Its Interface, pp. 328-332, 1978

[6]. S. K. Lai “Interface trap generation in silicon dioxide when electrons are captured by trapped holes,” J. Appl. Phys. ,Vol. 54, pp. 2540-2546,1983

[7]. S. N. Rashkeev,C. R. Cirba, D. M. Fleetwood,R. D. Schrimpf,S.C. Witczak,A.

Michez, and S. T. Pantelides “Physical model for enhanced interface-trap formation at low dose rates,” IEEE Transactions on Nuclear ScienceVol. 49, pp.

2650 – 2655, 2002

[8]. S. K Lai, “Two‐carrier nature of interface‐state generation in hole trapping and radiation damage” Appl. Phys. Lett. Vol. 39 pp. 58-61, 1981

Structure: application to amorphous SiO2 and the Si-SiO2 Interface,” Phys. Rev.

Lett., Vol. 43, pp. 1683–1686, 1979

[10]. S. Ogawa, M. Shimaya, and N. Shiono “Interface-trap generation at ultrathin Si02 (4-6 nm)-Si interfaces during negative-bias temperature aging” Journal of Applied Physics, vol. 77, no. 3, p.p 1137-1148, 1995

[11]. E. Atanassova, A. Paskaleva and N. Novkovski “Effects of radiation and charge trapping on the reliability of high-k gate dielectrics,” Microelectronics Reliability ,Vol. 48, pp. 514-525, 2008

[12]. E. P. Gusev, C. D'Emic, S. Zafar and A. Kumar, “Charge trapping and detrapping in HfO2 high-k gate stacks,” Microelectronic Engineering Vol.72, Pages 273-277, 2004

[13]. S. Zafar, A. Callegari, V. Narayanan, S. Guha, “Impact of moisture on charge trapping and flatband voltage in Al2O3 gate dielectric films”. Appl. Phys. Lett, Vol. 81, pp.2608– 2617, 2002

[14]. S. Zafar, A. Callegari, E. Gusev and M. Fischetti, “Charge trapping in high-k gate dielectric stacks,” in IEDM Tech. Dig, 2002, pp. 517-520

[15]. T. P. Ma and P. V. Dressendorfer “Ionizing radiation effects in MOS Devices and Circuits,”Wiley, New York, 1989

[16]. K. Neumeier H. P. Bruemmer,

“Radiation hard LOCOS field oxide,”

IEEE Transactions on Nuclear Science Vol. 41, pp.572-576, 1994

[17]. G. Anelli, M.Campbell, M. Delmastro, F. Faccio, S. Floria,; A. Giraldo, E.

Heijne, P. Jarron, K. Kloukinas, A. Marchioro, P. Moreira and W. Snoeys,

“Radiation tolerant VLSI circuits in standard deep submicron CMOS technologies for the LHC experiments: Practical Design Aspects,”, IEEE Transactions on Nuclear Science, Vol. 46, pp.1690-1696, 1999

[18]. F. Faccio and G. Cervelli, ”Radiation-induced edge effects in deep submicron CMOS transistors ( 0.13 um ),” IEEE Transactions on Nuclear Science, Vol.52, pp.2413-2420, 2005

[19]. S. Nakayama and T. Sakai, “The effect of nitrogen in p+ polysilicon gates on boron penetration in to silicon substrate through the gate oxide” in VLSI Symp.

Tech. Dig., 1996, pp.228-229

[20]. N.D. Arora, E. Rios and C.L. Huang “Modeling the polysilicon depletion effect and its impact on submicrometer CMOS circuit performance,” IEEE Transactions on Electron Devices, Vol.42, pp. 935-943,1995

[21]. Process Integration, Devices and Structures in International Technology Roadmap for Semiconductor, pp.11-14, 2001

[22]. E. Josse and T. Skotnicki, “Polysilicon gate with depletion-or-metallic gate with buried channel: what evil worse ?” in IEEE IEDM Tech. Dig., 1999, pp.

661–664

[23]. S. K Lai “Metal-dielectric band alignment and its implications for metal gate complementary metal-oxide-semiconductor technology” J. Appl. Phys. Vol. 54, pp. 2540-2546, 1983

[24]. M. Fischetti, D. A. Neumayer, and E. A. Cartier, “Effective electron mobility in Si inversion layers in metal–oxide-semiconductor systems with a high-k insulator: the role of remote phonon scattering,” J. Appl. Phys., Vol. 90, pp.

4587, 2001.

[25]. S. Datta, G. Dewey, M. Doczy, B.S. Doyle, B. Jin, J. Kavalieros, R. Kotlyar, M.

Metz, N. Zelick and R. Chau., “High mobility Si/SiGe strained channel MOS transistors with HfO2/TiN gate stack,” in IEDM Tech. Dig., 2003, pp. 653–656.

[26]. H. S. Momose, S. Nakamura, T. Ohguro, T. Yoshitomi, E. Morifuji, T.

Morimoto, Y. Katsumata, and H. Iwai, ”Study of the manufacturing feasibility of 1.5-nm direct-tunneling gate oxide MOSFET’s: uniformity, reliability, and dopant penetration of the gate oxide,” IEEE Transactions on Electron Devices Vol. 45, pp. 691-700, 1998

[27]. D. A. Muller, T. Sorsch, S. Moccio, F. H. Baumann, K. Evans-Lutterodt and G.

[28]. International technology roadmap for semiconductors 2007 edition ,process integration, device, and structures.

[29]. J.H. Stathis and D.J. DiMaria “Reliability projection for ultra-thin oxides at low voltage” in IEDM Tech. Dig, 1998 pp. 167-170

[30]. C. Chaneliere, J.L. Autran, R.A.B. Devine and B. Balland “Tantalum pentoxide (Ta2O5) thin films for advanced dielectric applications” Materials Science &

Engineering Vol.22, p.269-322, 1998

[31]. A. Chatterjee, R.A. Chapman, K. Joyner, M. Otobe , S. Hattangady, M. Bevan, G.A. Brown, H. Yang, Q. He, D. Rogers, S.J. Fang, R. Kraft, A.L.P. Rotondaro, M. Terry, K. Brennan, S.-W. Aur, J.C. Hu, H. L. Tsai, P. Jones, G. Wilk, M.

Aoki, M. Rodder, and I. C. Chen “CMOS Metal replacement gate transistors using tantalum pentoxide gate insulator” in IEDM Tech. Dig, 1998 , pp.777-780 [32]. R. A. McKee, F. J. Walker, and M. F. Chisholm “Crystalline oxides on silicon:

The first five monolayers” Phys. Rev. Lett. Vol.81, pp.3014–3017, 1998

[33]. M. Kawasaki, K. Takahashi, T. Maeda, R. Tsuchiya, M. Shinohara, O. Ishiyama, T. Yonezawa, M. Yoshimoto, and H. Koinuma “Atomic control of the SrTiO3 crystal surface” Science Vol. 266., pp. 1540-1542,1994

[34]. K. Eisenberg, J. M. Finder, Z. Yu, J. Ramdani, J. A. Curless, J. A. Hallmark, R. Si(100)” Appl. Phys. Lett. Vol. 75, pp.4001-4003, 1999

[36]. L. Manchanda, W. H. Lee, J. E. Bower, F. H. Baumann, W. L. BroIwn, C. J.

Case, R. C. Keller, Y. O. Kim, E. J. Laskowski, M. D. Morris, R. L. Opila, P. J.

Silverman, T. W. Sorsch and G. R. Weber. “Gate quality doped high-k films for CMOS beyond 100 nm: 3 - l0nm Al2O3 with low leakage and low interface states” in IEDM Tech. Dig .1998 , pp. 605-608

[37]. G. B. Alers, D. J. Werder, Y. Chabal, H. C. Lu, E. P. Gusev, E. Garfunkel, T.

Gustafsson, R. S. Urdahl, “Intermixing at the tantalum oxide/silicon interface in gate dielectric structures,” Appl. Phys. Lett., Vol.73, pp. 1517-1519, 1998

[38]. T. M. Klein, D. Niu, W. S. Epling, W. Li, D. M. Maher, C. C. Hobbs, R. I.

Hegde, I. J. R. Baumvol, G. N. Parsons, “Evidence of aluminum silicate formation during chemical vapor deposition of amorphous Al2O3 thin films on Si.100,” Appl. Phys. Lett., Vol.75 , pp.4001-4003, 1999

[39]. E.P. Gusev, E. Cartier, D.A. Buchanan, M. Gribelyuk, M. Copel,H.

Okorn-Schmidt and C. D Emic “Ultra thin high-k metal oxides on silicon:

processing, characterization and integration issue,” Microelectronic Engineering Vol.59, pp. 341-349, 2001

[40]. S. A. Campbell, D. C. Gilmer, X. C. Wang, M. T. Hsieh, H. S. Kim, W. L.

Gladfelter and J. Yan, “MOSFET transistors fabricated with high permitivity TiO2 dielectrics,” Electron Devices, IEEE Transactions on, Vol.44, pp. 104-109, 1997

[41]. S. A. Campbell, H. S. Kim, D. C. Gilmer, B. He,T. Ma and W. L. Gladfelter

“Titanium dioxide (TiO2) based gate insulators,” IBM Journal of Research and Development, Vol.43, pp.383-392, 1999

[42]. J. P. Chang, Y. S. Lin, S. Berger, A. Kepten, R. Bloom and S. Levy, "Ultrathin zirconium oxide films as alternative gate dielectrics," Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures , Vol.19, pp.2137-2143, 2001

[43]. M. Copel, M. Gribelyuk and E. Gusev, "Structure and stability of ultrathin zirconium oxide layers on Si(001)," Applied Physics Letters , Vol.76, pp.436-438, 2000

[44]. M. Copel, M. Gribelyuk and E. Gusev, "Structure and stability of ultrathin zirconium oxide layers on Si(001)," Applied Physics Letters , Vol.76,

electrical characteristics of ultrathin hafnium oxide gate dielectric reoxidized with rapid thermal annealing," Applied Physics Letters , Vol.76, no.14, pp.1926-1928, Apr 2000

[46]. G. D. Wilk, R. M. Wallace, J. M. Anthony,"High-κ gate dielectrics: Current status and materials properties considerations," Journal of Applied Physics , Vol.89, pp.5243-5275,2001

[47]. R. Chau, J. Brask, S. Datta, G. Dewey, M. Doczy, B. Doyle, J. Kavalieros, B. Jin, M. Metz, A. Majumdar and M. Radosavljevic, “Application of high-k gate dielectrics and metal gate electrodes to enable silicon and non-silicon logic nanotechnology,” Microelectronic Engineering, Vol. 80, pp.1-6, 2005

[48]. K. Mistry, C. Allen, C. Auth, B. Beattie, D. Bergstrom, M. Bost, M. Brazier, M.

Buehler, A. Cappellani, R. Chau, C. H. Choi, G. Ding, K. Fischer, T. Ghani, R.

Grover, W. Han, D. Hanken, M. Hattendorf, J. He, J. Hicks, R. Huessner, D.

Ingerly, P. Jain, R. James, L. Jong, S. Joshi, C. Kenyon, K. Kuhn, K. Lee, H. Liu, J. Maiz, B. Mclntyre, P. Moon, J. Neirynck, S. Pae, C. Parker, D. Parsons, C.

Prasad, L. Pipes, M. Prince, P. Ranade, T. Reynolds, J. Sandford, L. Shifren, J.

Sebastian, J. Seiple, D. Simon, S. Sivakumar, P. Smith, C. Thomas, T. Troeger, P.

Vandervoorn, S. Williams and K. Zawadzki "A 45nm Logic Technology with High-k+Metal Gate Transistors, Strained Silicon, 9 Cu Interconnect Layers, 193nm Dry Patterning, and 100% Pb-free Packaging," in IEDM Tech. Dig, 2007, pp.247-250

[49]. W. Kesternich,; , "Search for radiation-induced electrical degradation in ion irradiated sapphire and polycrystalline Al2O3," Journal of Applied Physics , Vol.85, no.2, pp.748-752, Jan 1999

[50]. B. D. Evans, “A review of the optical properties of anion lattice vacancies, and electrical conduction in [alpha]-Al2O3: their relation to radiation-induced electrical degradation,” Journal of Nuclear Materials, Volume 219, Fabrication and Properties of Ceramics for Fusion Energy, 1995, pp. 202-223

[51]. Chen, D.K., Mamouni, F.E. Zhou, X.J. Schrimpf R.D. Fleetwood, D.M.

Galloway, K.F. Lee, S. Seo, H. Lucovsky, G. Jun, B. Cressler, J.D. "Total Dose and Bias Temperature Stress Effects for HfSiON on Si MOS Capacitors,"IEEE

Transactions on Nuclear Science, Vol.54, no.6, pp.1931-1937, Dec. 2007

[52]. V. Banine, O. Frijns, G. Swinkels “Requirements and prospects of next generation Extreme Ultraviolet Sources for Lithography Applications (LPP and DPP), 2007 International EUVL Symposium, Sapporo, Japan

[53]. L.M. Terman “An investigation of surface states at a silicon/silicon oxide interface employing metal-oxide-silicon diodes, “Solid-State Electronics, Volume 5, Issue 5, 1962, pp. 285-299,

[54]. “Semiconductor Devices: Physics and Technology”, S. M. Sze. New York:

Wiley, 1985; 2nd ed., 2001

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姓 名:李勃學

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