BEOL Process flow

There are many kinds of the processes for BEOL technology, including advance dual damascene for copper (Cu) interconnector, via first, trend first, and double exposure for 20 nm technology node. In this chapter, we introduce the traditional process for aluminum (Al) interconnector.

Figure 2-2. The BEOL process flow and the sketch of BEOL profile.

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Figure 2-2 shows the process flow and the profile of BEOL. In the semiconductor fabrication, the interconnector process starts when the CMOS process is finished. First, the dielectric oxide was deposited for isolation and the via structure was defined by lithography and etching process. Second, a thin Ti/TiN was deposited for the barrier layer, followed by the thick W layer deposited for the main interconnector material.

Third, the W via was formed by using CMP process, and another Ti/TiN was deposited for trench barrier layer. Next, Al was deposited and the trench structure was defined by another lithography and etching process. Finally, the completion of interconnect circuit could be done by repeating these process.

2.1.1 Deposition

This process is often used in the semiconductor industry to produce high-purity and high-performance thin films. The useful deposition systems in the semiconductor process are physical vapor deposition (PVD) and chemical vapor deposition (CVD) systems. As for which tool should be used, it is up to the purpose of the process.

Figure 2-3 shows the sketch of PVD system. The argon (Ar) plasma was produced by a high voltage in the vacuum environment. This plasma induces high speed Ar ions and they rush to the target (cathode side) at the same time. Then, the atoms of target will be hit out by these Ar ions, and they will fly to the substrate (anode side) to coat on the substrate surface. Moreover, with the addition of oxygen gas flow, we can control the oxygen content in the thin films.

Figure 2-3. The sketch of PVD system⁹.

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Figure 2-4 shows the sketch of CVD process. In the CVD process, the substrate is exposed to the volatile precursor environment. Then, these precursors reactive on the substrate surface to produce the desired deposit. Finally, the volatile byproducts are removed by gas flow through the reactor.

Figure 2-4. The sketch of CVD process¹⁰.

In our research, the NiOx and TiOx film were prepared by the ion beam sputtering (IBS). Figure 2-5 shows the sketch of IBD. In the deposition process, the high energy ions beam was of electron cyclotron resonance (ECR) provided by microwave generator. With the controlling of electric field by microwave, the ECR produced high energy ion beam, and the ionization of gas molecule was done in the ion emission process. Then the ion beam rush to the target and the atoms of target will be hit out by this ion beam, and they will fly to the substrate to coat on the substrate surface. Moreover, with the addition of oxygen gas flow, we can prepare different oxygen content sample with different oxygen flow ratio.

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Figure 2-5. The sketch of IBD system¹¹.

2.1.2 Lithography

In the micro fabrication, photolithography is used to define the geometric pattern.

Coating, exposure, and development are three parts of lithography process. Figure 2-6 shows the process flow of lithography. First, the substrate is coated with a light sensitive chemical material, which is called the photoresist (PR). This process is also called the coating. Second, the exposure process uses light to transfer a pattern from a mask to PR on the substrate. The area with light exposure can be removed or kept on the substrate, dependent on the PR character (positive or negative PR). Moreover, this light through mask will pass several lenses and scale down the size to micro or even nano meter scale on the substrate. The minimum size of pattern on the substrate is dependent on the light source. The light with shorter wavelength can define smaller pattern size. Finally, the developer is used to remove the undesired part of PR in the development process.

E-beam lithography is another exposure technology without mask. It uses electron beam to define the pattern on the substrate. Although this technology can save the mask price, the process speed is much slower than traditional lithography technology. In our experiment, the both top metal and metal oxide pattern was prepared by JOEL6500.

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Figure 2-6. The sketch of Lithography process¹².

2.1.3 Etching

In the etching process, an aqueous chemical ("wet") or plasma ("dry") is used to remove the uppermost layer without protection. The isotropic wet etching process is used for highly selective material etching process. For example, the etching ratio between silicon oxide (SiOx) and silicon nitride (SiNx) is very high in the phosphoric acid solution. It is usually used to remove the SiNx layer. However, another anisotropic dry etching process is generally used in order to avoid the significant undercutting of profile. Due to its straight profile, most etching processes use dry etching process in the semiconductor fabrication.

Wet etching, the simplest etching technology, requires nothing but a container with a liquid solution that will dissolve the material. Because this process uses liquid solution, the isotropic etching process can’t be avoided. In this process, the protection layer becomes highly important because it can avoid the undercutting issue. Figure 2-7 shows the anisotropic and isotropic etching process. The isotropic etching process inevitably induces the undercutting issue.

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Figure 2-7. The sketch of etching process¹³.

Dry etching, the anisotropic etching process, is usually used for general semiconductor fabrications. The dry etching process uses the plasma with chemical gas to remove the part without protection. Figure 2-8 depicts the dry etching process.

Because the plasma has one way direction, the dry etching can avoid the undercutting issue. The anisotropic dry etching profile was shown in figure 2-7.

Figure 2-8. The sketch of dry etching process¹⁴.

2.1.4 Chemical mechanical Polishing (CMP)

Figure 2-9 delineates the CMP process. In this process, the top material on wafer surface will react with the chemical solution, and then the mechanical polish is used to remove the material on wafer surface. Another purpose of this process is to make the wafer surface smooth. In the Cu interconnector process, the CMP process is used for the Cu material removal because Cu can’t be removed by etching process.

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Figure 2-9. The sketch of CMP process¹⁵.