一、 Introduction
1.4 Resistance Random Access Memory (RRAM)
1.4.2 Metal-Oxide RRAM
According to table 1-2, even though there are five types of RRAM materials, the suitable material of RRAM applications is the metal-oxide based RRAM. Due to its simple fabrication process, better performance, multiple application, and full CMOS compatibility, many studies have been involved in the metal-oxide material research in recent years. Moreover, binary metal oxides show potential in the RRAM applications.
Those binary metal oxides include TiOx, NiOx, CuOx, et al., which is shown in figure 1-18. In this figure, the metal oxides of elements with both solid and dash marked shows the bipolar resistance switching characteristics. Moreover, the metal oxides of elements with dash marked show both bipolar and unipolar resistance switching characteristics.
Figure 1-18. The elements (red marked) that their metal-oxide were found to exhibit resistance switching characteristics. The metal oxides with solid line can be switched by bipolar operation. The metal oxide with dash line can be switched by both bipolar and unipolar operation.
In non-volatile memory application, the unipolar operation RRAM shows higher capacity than bipolar operation due to its one-diode-one-resistor (1D1R) circuit.
Moreover, the full CMOS compatible process also needs to be considered in device application. According to these factors, TiOx, NiOx, and WOx show their promising RRAM application. Many companies (MXIC, Samsung etc.) focus their researches on these materials and file the patent to claim their inventions in RRAM for the next generation non-volatile memory applications.
14
Chapter 2 : Experiments
Semiconductor fabrication can be divided into two processes, one is the front-end-of-line (FEOL), and the other is back-end-of-line (BEOL). The process prior to contact process belongs to FEOL, and the process posterior to tungsten (W) deposition belong to BEOL. The sketch of semiconductor profile is shown in figure 2-1.
Our memory cell process belongs to BEOL because the memory cell is located on the W plug. For the BEOL process, we introduce the main processes which are divided as deposition, lithography, etching, and chemical mechanical polishing (CMP).
Figure 2-1. The sketch of semiconductor process8.
2.1 BEOL Process Flow
There are many kinds of the processes for BEOL technology, including advance dual damascene for copper (Cu) interconnector, via first, trend first, and double exposure for 20 nm technology node. In this chapter, we introduce the traditional process for aluminum (Al) interconnector.
Figure 2-2. The BEOL process flow and the sketch of BEOL profile.
8 http://www.almaden.ibm.com/st/chemistry/dm/
15
Figure 2-2 shows the process flow and the profile of BEOL. In the semiconductor fabrication, the interconnector process starts when the CMOS process is finished. First, the dielectric oxide was deposited for isolation and the via structure was defined by lithography and etching process. Second, a thin Ti/TiN was deposited for the barrier layer, followed by the thick W layer deposited for the main interconnector material.
Third, the W via was formed by using CMP process, and another Ti/TiN was deposited for trench barrier layer. Next, Al was deposited and the trench structure was defined by another lithography and etching process. Finally, the completion of interconnect circuit could be done by repeating these process.
2.1.1 Deposition
This process is often used in the semiconductor industry to produce high-purity and high-performance thin films. The useful deposition systems in the semiconductor process are physical vapor deposition (PVD) and chemical vapor deposition (CVD) systems. As for which tool should be used, it is up to the purpose of the process.
Figure 2-3 shows the sketch of PVD system. The argon (Ar) plasma was produced by a high voltage in the vacuum environment. This plasma induces high speed Ar ions and they rush to the target (cathode side) at the same time. Then, the atoms of target will be hit out by these Ar ions, and they will fly to the substrate (anode side) to coat on the substrate surface. Moreover, with the addition of oxygen gas flow, we can control the oxygen content in the thin films.
Figure 2-3. The sketch of PVD system9.
9 http://en.wikibooks.org/wiki/Microtechnology/Additive_Processes
16
Figure 2-4 shows the sketch of CVD process. In the CVD process, the substrate is exposed to the volatile precursor environment. Then, these precursors reactive on the substrate surface to produce the desired deposit. Finally, the volatile byproducts are removed by gas flow through the reactor.
Figure 2-4. The sketch of CVD process10.
In our research, the NiOx and TiOx film were prepared by the ion beam sputtering (IBS). Figure 2-5 shows the sketch of IBD. In the deposition process, the high energy ions beam was of electron cyclotron resonance (ECR) provided by microwave generator. With the controlling of electric field by microwave, the ECR produced high energy ion beam, and the ionization of gas molecule was done in the ion emission process. Then the ion beam rush to the target and the atoms of target will be hit out by this ion beam, and they will fly to the substrate to coat on the substrate surface. Moreover, with the addition of oxygen gas flow, we can prepare different oxygen content sample with different oxygen flow ratio.
10 http://accessscience.com/content.aspx?id=800560
17
Figure 2-5. The sketch of IBD system11.
2.1.2 Lithography
In the micro fabrication, photolithography is used to define the geometric pattern.
Coating, exposure, and development are three parts of lithography process. Figure 2-6 shows the process flow of lithography. First, the substrate is coated with a light sensitive chemical material, which is called the photoresist (PR). This process is also called the coating. Second, the exposure process uses light to transfer a pattern from a mask to PR on the substrate. The area with light exposure can be removed or kept on the substrate, dependent on the PR character (positive or negative PR). Moreover, this light through mask will pass several lenses and scale down the size to micro or even nano meter scale on the substrate. The minimum size of pattern on the substrate is dependent on the light source. The light with shorter wavelength can define smaller pattern size. Finally, the developer is used to remove the undesired part of PR in the development process.
E-beam lithography is another exposure technology without mask. It uses electron beam to define the pattern on the substrate. Although this technology can save the mask price, the process speed is much slower than traditional lithography technology. In our experiment, the both top metal and metal oxide pattern was prepared by JOEL6500.
11 http://www.laseroptik.de/?Coating_Guide:Prod._Methods:Ion_Beam_Sputtering
18
Figure 2-6. The sketch of Lithography process12.
2.1.3 Etching
In the etching process, an aqueous chemical ("wet") or plasma ("dry") is used to remove the uppermost layer without protection. The isotropic wet etching process is used for highly selective material etching process. For example, the etching ratio between silicon oxide (SiOx) and silicon nitride (SiNx) is very high in the phosphoric acid solution. It is usually used to remove the SiNx layer. However, another anisotropic dry etching process is generally used in order to avoid the significant undercutting of profile. Due to its straight profile, most etching processes use dry etching process in the semiconductor fabrication.
Wet etching, the simplest etching technology, requires nothing but a container with a liquid solution that will dissolve the material. Because this process uses liquid solution, the isotropic etching process can’t be avoided. In this process, the protection layer becomes highly important because it can avoid the undercutting issue. Figure 2-7 shows the anisotropic and isotropic etching process. The isotropic etching process inevitably induces the undercutting issue.
12 http://www.ncnanotechnology.com/public/features/TNLC.asp
19
Figure 2-7. The sketch of etching process13.
Dry etching, the anisotropic etching process, is usually used for general semiconductor fabrications. The dry etching process uses the plasma with chemical gas to remove the part without protection. Figure 2-8 depicts the dry etching process.
Because the plasma has one way direction, the dry etching can avoid the undercutting issue. The anisotropic dry etching profile was shown in figure 2-7.
Figure 2-8. The sketch of dry etching process14.
2.1.4 Chemical mechanical Polishing (CMP)
Figure 2-9 delineates the CMP process. In this process, the top material on wafer surface will react with the chemical solution, and then the mechanical polish is used to remove the material on wafer surface. Another purpose of this process is to make the wafer surface smooth. In the Cu interconnector process, the CMP process is used for the Cu material removal because Cu can’t be removed by etching process.
13 http://www.el-cat.com/silicon-properties.htm
14 http://ngpdlab.engin.umich.edu/completed-projects/plasma-etching
20
Figure 2-9. The sketch of CMP process15.
2.2 Layout
In our experiment, the mushroom structure of NiOx and TiOx were deposited by IBS. Before these metal oxide deposition, the W plug structure was form by 0.18 um technology node BEOL fabrication. The metal oxide and top metal pattern was prepared by JOEL6500 E-beam lithography system. The real active area of RRAM was placed on the top of W plug. Figure 2-10 shows the top-view and the profile sketch of NiOx and TiOx RRAM.
Figure 2-10. The top-view and cross-section of NiOx and TiOx RRAMs.
15 http://www.ceramic.hanyang.ac.kr/paik/cmp.htm
21
However, the WOx RRAM was formed on the top of tungsten plug by using plasma oxidation process. After this oxidation, the E-beam lithography was used to define the area of top electrode, and then we remove the other part to form the top electrode. The top-view and cross-section of W-based RRAM were shown in figure 2-11.
Figure 2-11. The top-view and cross-section of nickel oxide and WOx RRAM.
2.3 Analysis
In the analysis process, the pulse generator (HP81110A) and semiconductor parameter analyzer (HP4156) were used for the electrical characteristic analysis. In the electrical analysis, the switching box (Keithley707) was also used for changing the measurement channel. There were several tests, including cycle endurance, thermal stability, stress analysis, data retention, and read disturb in the electrical analysis. The purposes of those measurements were for the reliability performance check.
For material analysis, the x-ray photoelectron spectroscopy (XPS) was used for the compositional analysis and profile analysis. The transmission electron microscopy (TEM) was used for the microstructure observation. Moreover, physical property measurement system (PPMS) was used for the temperature dependence electric character measurement.
22
2.3.1.1 Cycle Endurance Measurement
This cycle endurance measurement is one of the reliability performance tests. The better cycle endurance performance sample indicates the more programming operation times in the cycling process. Figure 2-12 shows the typical cycle endurance test. And the test steps are as follows. First, the initial resistance of memory cell was measured by HP4156. Second, the switching box (Keithley707) changes the channel to pulse generator (HP81110A) and then gives a pulse voltage to switch the resistance state.
Third, return the channel to read the resistance state again. Finally, switch the channel to pulse generator again and apply a pulse voltage to switch back the resistance state.
Repeating these previous processes is the cycle endurance test.
Figure 2-12. The 2 bits/cell cycle endurance test of RRAM[36]. 2.3.1.2 Thermal Stability Measurement
The thermal stability test is another measurement of reliability performance test. In our thermal stability test, we program the resistance state to both high and low resistance state and then put those two resistance state samples in high-temperature (above 85℃) oven for long time baking. In the baking process, those samples was take out from oven to confirm the resistance state at room temperature for a period then put back to oven for long time baking. With this repeatedly and period test, we can observed the thermal stability performance. Figure 2-13 shows the typical thermal stability test.
The memory cell exhibits better thermal stability performance with the higher baking temperature or long baking time test.
23
Figure 2-13. The typical thermal stability test[37].
2.3.1.3 Stress Test
In the stress test, we use the pulse generator to prove a long time stress, and the resistance is measured by HP4156 after the stress-applied bias. In this stress process, the direction of stress voltage is opposite to the switching voltage. For example, if the switching bias is positive voltage, the stress bias is the negative voltage. If the switching bias is negative voltage, the stress bias is the positive voltage. Figure 2-14 shows the typical stress test of RRAM. It shows the influence of applying a stress voltage on the resistance state.
Figure 2-14. The typical stress test of RRAM[20].
24
2.3.1.4 Data retention Measurement
Before this data retention test, the switching voltage formed all resistance states.
After the resistance switching process, HP4156 was used to detect the resistance of memory cell for a period of time. By means of this periodicity reading and waiting process, we can observe the data retention performance in this test. Moreover, the reading voltage of this data retention test must be small because the memory cell may be damaged by large voltages in the reading process. With this long time resistance reading process, we can obverse the data retention performance. Figure 2-15 shows a typical data retention test of 2bits/cell RRAM device. In this figure, all four-resistance states keep the same resistance value more than 104 src.
Figure 2-15. The data retention test of 2 bits/cell RRAM device[29]. 2.3.1.5 Read Disturb Measurement
In the read-disturb performance test, it is similar to the data retention test. Before the read-disturb test, the switching voltage formed all resistance states. The different part with the data retention test is the waiting time. In this test, there are only reading processes in this measurement. With these repeating resistance reading process, we can observe the read-disturb performance of memory cell. Moreover, the small reading voltage is used to avoid damaging the memory cell in the test process. Figure 4-16 shows the typical read-disturb performance test. In this figure, The “On” state is influence by the reading voltage, and the “Off” state keeps the same value in the read-disturb process.
25
Figure 2-16. The typical read disturb test of RRAM device[37].
2.3.2.1 XPS Analysis
X-ray photoelectron spectroscopy (XPS) is a quantitative spectroscopy technology to determine the elemental composition, empirical formula, and electronic state of elements. It is the use of low-energy X-ray source as the excitation source and through the analysis of samples with a characteristic energy of emitted electrons to achieve the purpose of analyzing the chemical composition; that is an ample surface analysis technology. Figure 2-17 shows the construction of XPS. XPS analysis is made into the X-ray beam; the atoms interact with the sample surface after the electronic excitation of atomic inner-shell ionization to detect the sample composition and structure. This is the characteristic X-ray excitation, and the electron here is called ionization photoelectron.
Because of the specific wavelength of the X-ray, its energy is known, and the electron binding energy can be calculated by Eq.(2-1).
)
Here, Ebinding is the binding energy of electron, Ephoton is the energy of the X-ray photon, Ekinetic is the kinetic energy of the electron as measured by the instrument, and ψis the work function of the spectrometer. The XPS spectrum can be observed by using binding energy as X-axis and relative intensity as Y-axis. With this spectrum, we can get the informant of samples with elemental composition and chemical state. XPS is the most useful for chemical analysis, and it is also call “electron spectroscopy for chemical analysis” (ESCA).
26
Figure 2-17. The sketch of XPS16.
2.3.2.2 TEM Analysis
Transmission electron microscope (TEM) uses high-energy electron beam (about 100keV ~ 1MeV) through the thin samples (below 100nm), and various structure within the thin samples have different degrees of scattering. Scattering of electrons by means of different routes goes through the subsequent combination of lens aperture lens, forming the contrast images of light and dark, and the microstructure of these images is shown with the fluorescent plate. Therefore, transmission electron microscopy analysis of thin samples is acquired through transmitted electron or elastic scattering electron, or diffraction pattern microstructure, and thus resolves the structure of the thin samples and the crystal structure. Figure 2-18 shows the construction of TEM.
Moreover, the selected area electron diffraction (SAED) in TEM instrument is also can be used to check the sample structure. The SAED principle is in that thin crystal sample, the high-energy parallel ray electron beam can go through this thin sample. In this case, electron is the corresponding volatility, rather than the particle nature. As the energy of the electron wavelength is nanometers in length, and the wavelength is relatively much larger than the spacing between atoms, the atoms are arranged in this electron diffraction grating. This means that a portion of the wavelength will be scattered out of a particular point of view (different parallel surfaces) and will decide the crystal of the sample.
16 http://wiki.utep.edu/display/~vrrangel/X-ray+Photoelectron+Spectroscopy+(XPS)
27
Figure 2-18. The sketch of TEM17. 2.3.2.3 PPMS Measurement
The temperature dependent electric character data was analyzed by the PPMS system PPMS. The cooling system uses the liquid helium (He) to cool the measurement system, and the minimum temperature is about 4K. The temperature range is between the room temperature and 4K. In the cooling process from room temperature to 4K, we can observe the resistance change in this cooling process.
17 http://universe-review.ca/R11-13-microscopes.htm
28
Chapter 3 : Principles
In recent years, many researches study the resistive switching mechanisms of novel RRAM. According to the result of these studies, we discuss several important physics parameters which influence the performance of RRAM. These physics parameters including cell thickness[38], cell size[39], doping material[40] , electrode[41], density of oxygen vacancies, and electric field[38,42]. Moreover, the RRAM performance can also be improved with modified operation process[36,43,44]. By applying suitable device structure and modified operation to potential materials, the RRAM device performance shows much improvement in the last ten years.
For the electric characteristics analysis of RRAM, many researches on different materials elucidate the electron transport mechanisms of both high and low resistance states follow various conduction mechanisms, such as metallic transportation[20], Schottky emission[45], tunneling, space-charge-limited-current (SCLC)[46], Frenkel-Poole emission[47-49], Trap-assisted-Tunneling (TAT)[50], electron hopping transportation[20], and so on.
Moreover, for the resistive switching mechanism studies, most of the literatures indicate the conducting filament[51-53] mechanism related to oxygen-vacancy[54,55]. Also, various models, such as stochastic model[56], two-variable resistor model[46,57], compact model[58], thermal dissolution model[48,59], rupture ball model[38], etc., were proposed to explain the resistive switching phenomenon in their researches.
In order to show a specific RRAM profile for readers, we introduce the basic resistance switching characteristics and nomenclature, electron transportation mechanism, resistance switching mechanism and model, key physics parameters and modified operation process in this chapter.
3.1 Resistance Switching Characteristics and Nomenclature
Before the introduction of RRAM principle, we describe the basic resistance switching characteristics including bipolar, unipolar, and nonpolar operations. Also, we discuss the basic resistance switching nomenclature, including forming process, set (programming) process, reset (erasing) process, forming voltage , set voltage (current), reset voltage, HRS (reset state), LRS (set state), resistance window (on/off ratio), dc voltage (current) sweep, and pulse switching in this section.
3.1.1 Bipolar, Unipolar, and Nonpolar Operations
3.1.1 Bipolar, Unipolar, and Nonpolar Operations