5.1 Summary
Thermal accumulation effects during bias stress operation may damage to PI substrate of flexible a-Si:H TFT. Therefore, we report to design to interpose a thermal conduction layer between the buffer oxide layer and PI substrate to dissipate the accumulated heat during operation and calculate the temperature distribution by TCAD simulation. The materials, such as Cu, Al and Mo have the higher thermal conductivity can used for thermal conduction layer, and result the significant effect to heat dissipation during the flexible electronics operation for AMOLED or other current stress bias applications.
On the other hand, we propose one structure that has a thermal conduction layer such as Cu in ILD oxide layer with LEG technology for 3D-ICs manufacturing. To reduce the Via depth and ILD oxide thickness can improve the re-crystallization quality for upper Si layer, but more heat generated by the irradiation of the laser beam conducts toward the 1st layer of device. The thermal conduction layer can protect 1st layer of device since the metal layer having higher thermal conductivity is provided between the ILD oxide layer and device, heat stored in the upper Si layer and ILD oxide layer can dissipate through the lateral direction in the metal layer.
We have manufactured the one mask MOSFET device successfully. The TEOS deposition was used for buried oxide layer and Al-Si-Cu alloy used for metal gate in MOSFET. With B.O.E wet etching, buried oxide layer shown a step profile due to isotropic etching. We can improve the fabrication process of one mask MOSFET with lift-off process in future works.
Otherwise, we have designed one mask pattern with different parameters of Via hole arrays.
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