(100)-oriented p-Ge substrates and (100)-oriented n-Ge substrates with resistivity ca. 0.1
·cm ~ 0.6 ·cm and ca. 0.6 ·cm ~ 0.94 ·cm were used to fabricate Ge n-MOSFETs and Ge p-MOSFETs. In order to fabricate Ge MOSFETs, Ge wafer were cleaned by diluted Hydrofluoric acid (DHF) and deionized water to remove native oxide. Then we deposited 4200
o
A SiO2 for field oxide by Plasma-enhanced chemical vapor deposition (PECVD). The active area (AA) region was defined by first photolithography. And then 80 cycles ZrO2 was deposited at 250°C using PE-ALD. After ZrO2 deposited, the samples were annealed using high- RTA at 600°C for 60 second in N2 ambient. Followed, 500
o photoresist, so we capped 500
o
A SiO2 on TiN for hard mask. Also, the solution to etch TiN will etch germanium, so we must cap 5000
o
A SiO2 to protect bulk germanium. Then gate was defined by second photolithography. Followed phosphorous for Ge n-MOSFETs and BF2 for Ge p-MOSFETs were implanted. Both phosphorous and BF2 dopant concentration are 1x15 cm-2 and implant energy are 20 keV. Due to gate first process the source/drain region will be self-align. After implantation, we deposited 1000
o
A SiO2 for capping layer by PECVD to prevent dopant out-diffuses during dopant activation. Then, we activated dopant by rapid thermal annealing (RTA) system 600°C 30 second for both Ge n-MOSFET and Ge p-MOSFET. Next, contact hole was defined by third photolithography, followed dry etching the contact hole on source/drain and gate region. 4000
o
A Al was deposited by thermal
40
coater and then defined metal pads through fourth photolithography. Finally, 4000
o
A Al was deposited as backside contact. The process flow and device structure are shown in Fig. 4.1 and Fig. 4.2.
4.3 Electrical Characteristic of Ge MOSFETs
Fig. 4.3 shows the junction characteristics of Ge p-MOSFET and Ge n-MOSFET. For p+/n junction, the current density at forward bias and reverse bias are 3.37x102 A/cm2 at 1 V and 3.87x10-2 A/cm2 at -1 V, respectively. Also, the on/off ratio is about 8.61x104, the ideality factor is 1.255 and the series resistance is 16.2 for p+/n junction. For n+/p junction, the current density at forward bias and reverse bias are 1.64x102 A/cm2 at -1 V and 1.00x10-2 A/cm2 at 1 V, respectively. Also, the on/off ratio is about 1.66x104, the ideality factor is 1.527 and the series is 21.7 for n+/p junction. The higher current density at reverse bias of germanium device compare to silicon devices is due to smaller bandgap of germanium.
Fig. 4.4 shows ID-VG and IS-VG characteristics of Ge p-MOSFET and Ge n-MOSFET.
For Ge p-MOSFET, the on/off ratio is about 3.98x104 for IS and 5.32x103 for ID. For Ge n-MOSFET, the on/off ratio is about 9.33x104 for IS and 3.02x103 for ID. The reason why on/off ratio of ID is always lower than that of IS is due to small bandgap energy of germanium causes junction leakage. The subthreshold swing of p-MOSFET and n-MOSFET is about 125.8 mV/dec and 130.5 mV/dec, respectively.
Fig. 4.5 shows ID-VD characteristics of Ge p-MOSFET and Ge n-MOSFET. At the same overdrive voltage, we can see that p-MOSFET exhibits much larger driving current than n-MOSFET, due to n-MOSFET reveals much larger source/drain resistance than p-MOSFET.
As we know, activation of n-type dopant in germanium is a problem which active level of
41
n-type dopant in germanium is much lower than p-type dopant in germanium.
Fig. 4.6 shows the plot of measured resistance versus channel length on mask for Ge p-MOSFET and Ge n-MOSFET. We extract source/drain series resistance (RSD) by Terada and Muta method which we discussed in detail in Chapter 3. By our measurement, the source/drain series resistance is about 50.3 for p-MOSFET and 460.4 for n-MOSFET.
Also, ΔL=0.52 m for p-MOSFET and ΔL=0.93 m for n-MOSFET.
We use split-CV method which has been discussed in chapter 3 to extract effective mobility. Fig. 4.7 shows hole mobility as a function inversion charge density for Ge p-MOSFET. The peak hole mobility of p-MOSFET is about 227.4 cm2/V-s. Here we do not show the electron mobility for Ge n-MOSFET because of the large source/drain series resistance of Ge n-MOSFET. The voltage drop across the source/drain resistance IDRSD causes a reduction in drain current. Hence, the measured mobility by split C-V method appears to be lower than the real value.
4.4 Conclusion
In Chapter 4, we investigate fabrication and electric characteristics of Ge MOSFETs. For Ge p-MOSFET (the channel width is 200 m, the channel length is 5 m), the on /off ratio of p+/n junction, ID-VG and IS-VG are about 8.61x104, 5.32x103, and 3.98x104, respectively, while the substhreshold swing is about 125.8 mV/dec. For Ge n-MOSFET (the channel width is 200 m, the channel length is 5 m), the on /off ratio of n+/p junction, ID-VG and IS-VG are about 1.66x104, 3.02x103, and 9.33x104, respectively, while the substhreshold swing is about 130.5 mV/dec.
From ID-VD curve we can see that Ge n-MOSFET reveals poor driving current than Ge p-MOSFET at the same overdrive voltage due to n-type dopant in germanium is much easier
42
diffuse than p-type dopant in germanium. Also, the activation level of n-type dopant in germanium is lower than p-type dopant in germanium. Because of these problems, Ge n-MOSFETs always exhibit poor performance than Ge p-MOSFETs.
43
Fig. 4.1 Process flow of Ge MOSFETs.
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Fig. 4.2 Device structure of Ge MOSFETs.
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46
47
Fig. 4.5 ID-VD characteristics of Ge MOSFETs; (a) Ge p-MOSFET, and (b) Ge n-MOSFET.
48
Fig. 4.6 Rm versus L as a function of gate voltage to extract series resistance; (a) Ge p-MOSFET, and (b) Ge n-MOSFET.
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0.5 1.0 1.5 2.0 2.5 3.0
100 150 200 250 300
H o le M o b il it y ( c m
2/V -s )
N
inv(10
12cm
-2)
Fig. 4.7 Hole mobility as a function of inversion charge density for Ge p-MOSFET.
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