The LDMOS is functional in circular and elliptic layout style. Hence, the deeper investigation on the LDMOS is feasible. For LDMOS in circular layout style, the multiple DMOS in waffle type and the insertion of SCR are worth to try. For LDMOS in elliptic layout style, the multiple finger layout arrangement is challenging.
It is discovered that a LDMOS has better ability to withstand the UIS stress when it has a higher trigger current. Engineering the trigger current of LDMOS accordingly can be a direction of future UIS studies.
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VITA
姓 名：黃筱晴 學 歷：
台北市立中山女子高級中學 (91 年 9 月~94 年 6 月) 國立清華大學工程與系統科學系 (94 年 9 月~98 年 6 月) 國立交通大學電子研究所碩士班 (98 年 9 月~100 年 7 月)
研究所修習課程：
積體電路之靜電放電防護設計特論 柯明道教授
半導體物理及元件（一） 汪大暉教授
積體電路技術（一） 張國明教授
積體電路技術（二） 林鴻志教授
固態物理 顏順通教授
數值半導體元件模式 李義明教授
精密儀器概論(一) 陳衛國教授
材料分析 鄭晃忠教授
永久地址：新北市汐止區民族五街二十二號一樓 Email：m9811517.ee98g@nctu.edu.tw
m9811517@alab.ee.nctu.edu.tw