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Chapter 6 Prototype

6.4 FPGA Architecture

6.4.4 Hardware Cost

The hardware usage is shown in Table 6-1. The power consumption of the FPGA chip was analyzed with the software, Xpower. The total power consumption is 63mW. The total memory usage of the FPGA chip is 133208 kilobytes and the most serious delay time which is from source pad to destination pad is 14.939 ns.

Table 6-1. The FPGA chip usage.

Logic Utilization Used Available Utilization

Total Number Slice Registers 126 15,360 1%

Number used as Flip Flops 120

Number used as Latches 6

Number of 4 input LUTs 1,648 15,360 10%

Logic Distribution

Number of occupied Slices 1,058 7,680 13%

Number of Slices containing only related logic 1,058 1,058 100%

Number of Slices containing unrelated logic 0 1,058 0%

Total Number 4 input LUTs 1,735 15,360 11%

Number used as logic 1,648

Number used as a route-thru 87

Number of bonded IOBs 109 333 32%

Number of Block RAMs 3 24 12%

Number of GCLKs 6 8 75%

6.5 Summary

If the optical design for this panel can be implemented to our experimental platform, this

prototype design will be more complete. Unfortunately, the mechanism of the panel is fixed, to implement the optical design methodologies and technique is very difficult. However, the luminance uniformity of the panel is acceptable. The LED backlights possess larger color gamut. The color saturation of LED backlights is better than CCFL backlights.

In addition, the high resolution LCD such as the VX912, there are many considerations for programming the HDL code due to the pixel clock has higher frequency. Moreover, we don’t have any information for the AUO ASIC; it also increases the difficulty for the FPGA design. Whatever, we overcome these design difficulties and finish the simple experimental platform.

The experimental setup is shown in Figure 6-28. As mentioned before, we introduce our experimental system. Our algorithm has been used by related projects to compute the necessary compensation of the image. However, the results are simply validated through our experimental system. We can control the image data from the PC and the LED backlights. The LED backlight intensity is dimmed with CLS algorithm. On the other hand, the image brightness is compensated with luminance transfer function. The two scaling are implemented with using the CPT FPAG board. The total experimental platform design can be applied to small size panel system.

Figure 6-28. Experimental setup.

Chapter 7

Measuremental Results

In this chapter, we performed the power measurement on the panel of VX912 and our LED backlights. First, we measured the LCD component power consumption characteristics, and then we measured the power consumption while the algorithm of backlight scaling was applied to our LCD platform.

7.1 Hardware characterization

7.1.1 Panel

The hydrogenated amorphous silicon (a-Si:H) is commonly used to fabricate the TFT in display applications. For a TFT-LCD panel, the a-Si:H TFT power consumption can be modeled by a quadratic function of pixel value x∈[0,1]

c bx ax x

PTFTPanel( )= 2 + + (7-1)

The VX912 is a normally-white TFT-LCD panel, which consumes less power while displaying brighter image. Thus, this type of panel adds additional power savings to the backlight scaling techniques because it generally enhances the luminance of the image that is displayed on the panel to compensate for the loss of the brightness after backlight dimming.

In contrast, power consumption of a normally-black TFT-LCD panel increases slightly as its global transmittance increases, which increases power savings of a backlight dimming approach. However, in either type, the change in power consumption as a function of the transmittance is so small that it can be ignored.

We performed the current and power measurements on the LCD panel of VX912. The measured data are shown in Figure 7-1. The regression coefficients are thus determined as:

a=0.4737, b=-1.2046, and c=4.9492.

0.0 0.2 0.4 0.6 0.8 1.0

Figure 7-1. Pixel transmittance versus power consumption of a pixel in the normally white TFT-LCD panel.

7.1.2 LED backlights

We set the color temperature at 6500°K after the LED backlight was mounted onto the TFT-LCD panel, and then performed luminance and power characterization. The colorimetric data were measured by a Konica-Minolta CS-200 chroma meter. The power consumption vs.

PWM duty cycle characteristics of LEDs are shown in Figure 7-2. The luminance vs. PWM duty cycle characteristics of the whole panel system are shown in Figure 7-3.

0 20 40 60 80 100

Figure 7-2. Power consumption vs. PWM duty cycle.

0 20 40 60 80 100

Figure 7-3. Luminance vs. PWM duty cycle.

Based on the measurement data, the luminance vs. power relation of LEDs can be modeled by polynomial functions as follows.

0951

where bR, bG, and bB are luminances of red, green, and blue backlight, respectively.

7.2 Results and discussion

Our algorithm was implemented through programming VHDL on an FPGA board, the CPT FPGA Board. This prototype receives DVI or VGA signal, performs the proposed backlight scaling image processing, and then outputs the signal to drive the 19” TFT-LCD monitor. At the same time, the FPGA board also generates the pulse width modulators (PWM) to control the backlight intensity of RGB channels. The photographs in Figure 7-4 show the side-by-side comparison between the prototype LED backlight and the original CCFL backlight monitor. After chromaticity scaling, the red, green, and blue channels are scaled down to 0.9, 0.8, and 0.7, respectively. The results of luminance scaled to 1.0 (unchanged), 0.8 (degraded), and 0.6 (unacceptable) are shown.

(a)

(b)

(c)

Figure 7-4. Photos of prototype LED backlit (left) and CCFL-lit (right) system, where bR=0.9, bG=0.8, andbB=0.7. From top to bottom: bL=1.0, 0.8, and 0.6.

The power consumption of the CCFL backlights and the LED backlight are 22.3 Watt and 16.57 Watt, respectively. In Figure 7-4(a), the image of the CCFL backlight and the LED backlight are the same. In Figure 7-4 (b), the two images still resemble to each other. But in Figure 7-4(c), the pixels are saturated.

7.2.1 Power Savings

We applied our algorithm when various benchmark images were displayed on our platform. The benchmark images and power measurement results are shown in Table 7-1 and Table 7-2. The full power consumption of the LED backlights is 23.06 Watt. When the color difference constraint of ∆Eab* ≤1 and ∆Eab* ≤2 were given respectively, the LED backlight power savings of range from 19% to 48% at the color difference constraint ∆Eab* ≤1 and 30% to 55% at the color difference constraint ∆Eab* ≤2.

Table 7-1. Benchmark images.

Image1 Image2 Image3 Image4

Image5 Image6 Image7 Image8

Image9 Image10 Image11 Image12

Table 7-2. Optimal solutions for benchmark images subject to ∆Eab* ≤1 and ∆Eab* ≤2.

R-Power (W) G-Power (W) B-Power (W)

Image

* 1

Eab Eab* 2 E*ab1 Eab* 2 Eab* 1 Eab* 2

Power Saving (%)

1 4.92 3.72 6.93 5.99 5.51 5.32 24.72 34.84

2 3.84 3.36 7.25 5.99 5.32 4.18 28.86 41.35

3 4.68 5.64 8.82 6.62 5.32 2.28 35.32 36.97

4 2.64 4.32 7.25 7.25 1.9 4.56 23.55 30.07

5 5.28 5.4 5.99 6.3 5.32 4.18 19.97 31.14

6 5.52 5.52 7.25 6.62 2.47 2.09 33.93 38.31

7 4.56 4.92 7.56 5.99 5.51 4.94 28.08 31.29

8 4.32 2.4 7.25 6.93 5.51 0.95 48.89 55.42

9 5.28 3.96 7.25 6.93 4.56 5.13 25.95 30.53

10 5.04 4.92 8.82 6.62 6.08 4.56 25.91 30.2

11 4.2 3.48 5.99 5.04 2.28 1.71 45.95 55.44

12 5.64 4.56 6.62 6.93 2.66 4.37 21.78 31.22

7.2.2 Performance

Figure 7-5 shows the performance of the original images and backlight scaling images while giving the constraint of ∆Eab* ≤2. The power savings of these images can be found in Table 7-2. The image quality can be preserved with our backlight scaling algorithm.

Simultaneously, the purpose of reducing the power consumption of the LED backlights can be

achieved.

Original images Scaling images

Figure 7-5. Comparison between the original images and the scaling images.

7.2.3 Viewing Angle Enhancement for Visual Effect

For TN mode LCDs, the refraction ratio of liquid crystals depends on the applied voltage and wavelength, which usually have serious color shift in the vertical viewing angle. The LCD color shift degrades the image quality and detains purchase decision of consumers, caused by the phase retardation variance of the liquid crystals. The LCD color shift is dependent on a number of variables including transmittance, chroma, and viewing angle.

Figure 7-6 shows the color shift of VX912 at different viewing angles. From Figure 7-6(a), (b), and (c) we observe that the luminance reduces from the normal angle to the outside angle.

It is the most obvious in the vertical angle. The luminance variations will cause the contrast degradation.

(a) (b) (c)

(d) (e) (f)

Figure 7-6. Color shift of the panel of VX912 at different viewing angles.

Base on our backlight scaling algorithm, the image contrast can be enhanced while the viewing angle is not normal. The contrast degradation of the image on the TN mode LCDs can be improved. We can get better visual effect at different viewing angles. Figure 7-6 shows

the image without using backlight scaling algorithm and with backlight scaling algorithm while we tilted the two panels vertically. We can perceive the better image contrast of the right-side panel in Figure 7-7(b).

(a) Image without using backlight scaling algorithm

(b) Image with using backlight scaling algorithm

Figure 7-7. The panels were tilted about 30° vertical viewing angle.

7.3 Summary

We have implemented the backlight scaling algorithm for minimizing power consumption of RGB LED-backlight TFT-LCDs. The proposed algorithm was implemented by an FPGA board. The image quality can be preserved as the backlight intensity is dimmed.

For the benchmark images, up to 55% of power consumption can be reduced when the color difference constraint of ∆Eab* ≤2 was given. Moreover, the backlight scaling algorithm enhances the image contrast of TN-mode LCD at different viewing angles.

Chapter 8

Conclusion and Future Direction

8.1 Conclusion

Today, TFT-LCD is the most common display in the mobile electronic devices. It is also one of the components which contribute the most power consumption in the mobile electronics. The TFT-LCD backlight dominates the power consumption of the whole system.

For prolonging the battery lifetime of the mobile electronic devices, the power consumption have to be reduced.

Our goal is to reduce the power consumption of TFT-LCD backlight. The technique of backlight scaling is used to achieve the purpose. The technique of backlight scaling decreases the backlight intensity to conserve power consumption while preserving the visual quality.

The technique need to employ algorithm for implementing the backlight dimming and image processing. We proposed the Chromaticity and Luminance Scaling algorithm based on visual perception for minimizing power consumption of LED backlight TFT-LCDs. The CLS algorithm consists of two phases. The chromaticity scaling is guided by the CIELAB color difference to scale the red, green and blue backlight individually. The luminance scaling is based on the prior Concurrent Brightness and Contrast Scaling algorithm, which was solidified by a series psychophysical vision experiments. We also conducted a psychophysical experiment, in which the interaction between perceived brightness and contrast was validated.

Another psychophysical experiment gave luminance algorithm a strong persuasion to adopt the CBCS algorithm.

Finally, we prototyped an experimental LED backlight platform for characterizing its power consumption in red, green, and blue. The proposed algorithm was implemented by an

FPGA board. For the benchmark images, up to 55% of power consumption can be reduced.

At the same time, reducing the power consumption of LED backlights can prolong the LED lifetime and reduce the LED color shift due to thermal effects. Moreover, the light leakage of TFT-LCD results in angular-dependent luminance reduction and color shift. The backlight scaling algorithm increasing panel transmittance can avoid the light leakage of normally-white TFT-LCDs. This process can reduce the angular-dependent color shift of TFT-LCDs. In addition, our algorithm can increase the dynamic contrast ratio, and the image quality can be preserve.

8.2 Future Direction

The core in the technique of backlight scaling is the algorithm. Although the interaction between perceived brightness and contrast has been validated, the psychophysical experiments will be continued. The psychophysical experiments require to be improved, and then the consideration of Bartleson-Breneman effect also will be included. The model of perceived image brightness and contrast will be created by the psychophysical experiments.

The psychophysical experimental results will be utilized to refine our algorithm. However, the surrounding-aware LCD is not commercially available yet. For implementation, the ambient light can be quantified by installing a photo sensor. Moreover, the experimental platform will be transfer to small-sized panels. The final goal is develop an Application Specific Integrated Circuit (ASIC) to replace the FPGA board. It can be fabricated as an adapter between a laptop computer and a TFT-LCD or built into the internal circuit of a TFT-LCD.

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