I-V measurement

In addition to analyze the junction forming behavior, I-V measurement are adapted.

The N⁺/P diode I-V measurement results are summarized as Jon (at VA = -1V) and Joff

(at VA = 2V) exhibited in Fig. 3.6. The sample with 2^nd RTA 550℃ 60s treatment has the lowest Joff value among all samples. The high Joff current densities presented at 2^nd RTA temperature below 500℃ are explained as that there may exist high defect densities at the P/N junction interface. The defects may originate from the remained amorphous region where is still not recrystallized due to the short activation time or the low activation temperature. As the result, with increasing 2^nd RTA temperatures, the SPER process continuous going, and the J_off currents decreased. At 2^nd RTA 550

℃ 60s, the SPER process seen to be completed (this can be observed by the relative consistent resistances measured in FPP method, see Fig. 3.3), the sample exhibits the maximum on/off ratio. However, the on/off ratios (Fig. 3.6) and Neff (Fig. 3.2) diminish at 2^nd RTA higher than 550℃ 60s. Since the SPER process looks like completed above 2^nd RTA 550℃ 60s, the facts described above may originated by defect (dislocations start to form at the temperature range from 500 to 600℃ [13]) itself or by some defect induced dopant deactivation at the P⁺/N interface. In addition, deactivation from phosphorous super-saturated solubility to thermal equilibrium solubility in silicon [14] might also play an important role when the thermal budget is higher than which required for SPER process completion. (The experiments of thermal stability about dopant super-saturated will be given in future publication.)

26

3.4 Conclusions

With the starting ideas that SPER and metal enhanced crystallization are the main responses to the high activation ability with IIS method in low activation temperature, we combine the SIMS, C-V, FPP, and I-V measurements to construct the doping activation behavior of the IIS method. All experiment results suggested that SPER process is starting from the M/S interface and extend into the silicon substrate. The best N⁺/P interface is formed when SPER process is complete. After SPER process finished, samples with additional thermal budget treatment above 550℃ cause the defect formation at the bulk silicon and the dopant deactivation phenomenon may occur, both factors will decay the N⁺/P junction’s performance. Sample treated with 2^nd RTA 550 ℃ 60s forms the best N⁺/P junction among all controls in this study.

References

[1] K.M. Chang, J.H. Lin, and C.Y. Sun: Applied Surface Science, Vol. 154, pp. 6151, (2008).

[2] B.S Chen and M.C. Chen: Electron Devices, IEEE Transactions on, Vol. 43, Issue. 2, pp. 258, (1996).

[3] D.L. Kwong, T.H. Ku, S.K. Lee, E. Louis, N.S. Alvi, and P. Chou: J. Appl. Phys. Vol. 61, pp. 5084, (1987).

[4] J. Kedzierski, D.Boyd, C. Cabral, Jr., P. Ronsheim, S. Zafar, P.M. Kozlowski, J.A. Ott, and M.

Ieong: Electron Devices, IEEE Transactions on, Vol. 52, Issue 1, pp. 220, (2005).

[5] J. Foggiato, W.S. Yoo, M. Ouaknine, T. Murakami, and T. Fukada: Materials Science and Engineering B, Vol. 114–115, pp. 56, (2004).

[6] A. Steegen, and I. De Wolf, K. Maex: J. Appl. Phys., Vo1.86, No. 8, pp. 4290, (1999).

[7] B.J. Pawlak, R. Lindsay, R. Surdeanu, P.A. Stolk, K. Maex: Proceedings of the 14th International Conference on Ion Implantation Technology, pages X, (2002).

[8] R. Lindsay, K. Henson, W. Vandervorst, K. Maex, B.J. Pawlak, R. Duffy, R. Surdeanu, P. Stolk, J.A. Kittl, S. Giangrandi, X. Pages and K. van der Jeugd: J. Vac. Sci. Technol. B, Vol. 22, No. 1, pp. 306 (2004).

[9] Dieter K. Schroder: “Semiconductor material and device characterization”, second edition, John Wiley & Sons, Inc. Chapter 2, 1998.

[10] K.M. Chang, J.H. Lin, and C.Y. Sun: Applied Surface Science, Vol. 154, pp. 6155, (2008).

[11] T.E. Seidel and A.U. MacRae: First Intl. Conf. on Ion Implantation, (1971).

[12] K. Larsen, V. Privitera, S. Coffa, F. Priolo, S. U. Campisano, and A. Carnera: Physical Review Letters, Vol. 76, No.9, pp.1493, (1996).

[13] S. Wolf, and R.N. Tauber: “Silicon processing for the VLSI era”, second edition, Lattice press, Vol. 1, Chapter 10, 2000.

[14] Y. Takamura, S.H. Jain, P.B. Griffin, and J.D. Plummer: J. Appl. Phys., Vo1. 86, No. 1, pp. 230, (2002)

28

Fig. 3.1. An example of the measured1/C²–V curve, the sample was treated with 2^nd RTA 650℃ 60s.

Fig. 3.2. Phos. doping density estimated from C-V measurement with different 2^nd RTA temperatures.

30

400 450 500 550 600 650 0

5 10 15 20 25

R trend (ohm/ohm) (Normalized with P60 650 o C)

2nd RTA Temperature (oC) 2^nd RTA 30s (P30) 2^nd RTA 60s (P60)

Fig. 3.3. Relative resistance ratio measured with FPP test structures at different 2^nd RTA conditions

Fig. 3.4. SIMS profile of phosphorous doped sample treated with 2^nd RTA 650℃ 60s.

32

Lower 2

^nd

RTA

Fig. 3.5. The behavior of phosphorous activation is shown schematically. The P/N junction interface becomes deeper away from M/S interface with higher 2^nd RTA temperature.

Fig. 3.6. Absolute Jon, Joff, current density and on/off ratio measured at different 2^nd RTA temperatures.

34

Chapter 4 P

⁺

/N J UNCTION

4.1 Brief Introduction and Design Idea

For the purpose to confirm the ideas made in chapter 2 (SPER and metal assisted metallization construct the low temperature dopant activation ability of IIS technique) and in chapter 3 (The SPER is starting from silicide/silicon interface and then extended into the silicon substrate) are valid, we designed an experiment similar to that in chapter 3 but differs in the implantation projection range design and the junction type. Boron was adapted as the implanted dopant in this study, due to its fast diffusion ability, and as a result the junction now we were treated was changed to silicide/P⁺/N type. The projection range of this study was changed from in silicide (as in chapter 2 and chapter 3 did) to in the silicon. Since the peak dopant densities was located in the silicon region, we expected to see that with the C-V measurement, we could observe the “moving junction” behavior suggested in chapter 3.

4.2 Experiments

4.2.1 Device fabrication for I-V, C-V, SIMS measurements

Starting material was (100) n-type silicon wafer, after thermal oxidation and active regions definition, backside of the wafer was implanted with phosphorous 5x10¹⁵ cm^-2 and annealed with furnace at 1000℃ 30 min. TaN 100 nm was sputtered on as the back contact. After dipped dilute HF to remove the native oxide at the active region, 20nm nickel was deposited by e-gun system. All samples were treated with 1^st

RTA at 350℃ 30s, after unreacted Ni removed, all samples were ion implanted with BF2 5x10¹⁵ cm^-2. Then, samples were treated at 2^nd RTA 60s with different temperatures from 400℃ to 650℃, 50℃ per step.

4.2.2 Device fabrication for FPP measurements

For four points probe test structure, starting material was (100) n-type silicon wafer, too. After thermal oxidation and active regions definition, 20nm nickel was deposited by e-gun system. Following processes were the same as described in section 4.2.1. However, for FPP test structure, after 2^nd RTA, NiSi was removed using silicide etch solution (the etch selectivity of NiSi to bare Si is larger than 50). At the final step, Al was thermally coated as back contact. No post metal annealing was treated for thermal budget control consideration.

4.3. Results and Discussion 4.3.1 SIMS and C-V measurements

In comparison with N⁺/P junction behavior studied in our previous work (reference 5, where the projected range is in the nickel silicide), a different doping profile is adapted in this study. As shown in Fig. 4.1, there are two peaks presented in SIMS profile (after 2^nd RTA 650℃ 60s). Peak 1 is formed due to dopant segregation [6] phenomena (NiSi film is about 23nm thick determined by SEM inspection), and Peak 2 is the projection range of this implantation.

From previous understanding [5], the effective boron concentration (N_eff) presented at the P/N interface estimated from C-V measurement in this study would not decrease monochromatically with the increasing 2^nd RTA temperatures, instead,

36

N_eff measured from increase 2^nd RTA temperatures should have the trend such like some part of the SIMS profile. The C-V measurement result is demonstrated in Fig.

4.2, boron has the similar doping profile (but lower density due to not fully activated) to which obtained in SIMS measurement. This result supports our previous observation in chapter 3 that doping activation of the IIS method is starting from silicide/silicon interface toward the silicon substrate. Substrate doping densities extracted from C-V measurements are also shown in the Fig. 4.2 as a reference. It shows that phosphorous have a bit higher concentrations below 500℃ 2^nd RTA. This behaviour might be due to samples treated at lower 2^nd RTA temperatures have narrower activated region from the edge of NiSi/Si (M/S) interface, and there are some doping segregation phenomena of phosphorous at the M/S interface. As a result, samples with lower 2^nd RTA temperatures, the P/N interface are closer to M/S interface than samples with higher 2^nd RTA temperatures, and have a higher substrate concentration due to the doping segregation affect. This double confirms our previous observation in chapter 3.

4.3.2 I-V and FPP measurements

Fig. 4.3 shows the I-V measurement results of samples fabricated in section 4.2.1. The forward current (IF) is defined at sample with 1V forward bias voltage, and the reverse (I_R) current is defined at sample with 2V reverse voltage. From the I_F/I_R ratio, it seems that the sample with 2^nd RTA 550℃ 60s has the best performance at this measurement. The better performance of 2^nd RTA 550℃ 60s than those samples with lower 2^nd RTA temperatures can be contributed to two reasons. First, the activation process will also re-crystallize the amorphous layer at silicide/silicon interface caused by silicide formation process. With higher thermal budget, the better

re-crystallization interface can be formed. Secondly, as shown in Fig. 4.1 and Fig. 4.2, the P⁺/N junction position of 2^nd RTA 550℃ 60s sample might be beyond the point 2 appeared in Fig. 4.1, where less doping defects (unactivated dopant and silicon interstitials) are present. However, the I-V behaviour above 550℃is different to those observed about N⁺/P junction in Fig 3.6, in N⁺/P case, above 550℃, I_F/I_R ratios decreased with increasing 2^nd RTA temperature.

To explain the I-V behaviour above 550℃, some other information about the junction formation should be measured as the reference. In Fig. 4.4, the relative resistance of these samples (after NiSi removed) measured with FPP test structure is displayed. The resistance reflects the combination interactions of the doping activation level and the junction depth. All resistances are normalized to the lowest measured value (2^nd RTA 650 ℃ 60s). It exhibits that the resistance decreases gradually but has an abrupt decrease at 650℃ for N30 samples (treated with 2^nd RTA 30s) and at 600℃ for N60 samples (treated with 2^nd RTA 60s). In addition, the lowest resistance values measured in N30 and N60 samples are almost the same at the original data. This implies that above 2^nd RTA 650℃ 30s or 2^nd RTA 600℃ 60s, the bulk activation of boron is higher than the substrate doping density, and the p-type junction extended far into the substrate. As a result, the resistances measured under this bulk activation [7] condition are very similar. Bulk activation behaviour dominates the P⁺/N junction formation at high thermal budget conditions. This explains the difference of the N⁺/P and P⁺/N junction’s I-V behaviours above 550℃.

In N⁺/P case, the performance of junction formed at high thermal budget condition is dominated by defect formation or dopant deactivation, but for P⁺/N case, bulk activation behaviour dominates.

38

The low IF/IR ratio of 600℃ 2^nd RTA sample (N600) in this study is due to the low forward current density measured at VA = 1V. Fig. 4.5 shows the J-V curve of some samples treated at 2^nd RTA 550℃ 60s (N550-1), 600℃ 60 s (N600-1), and 650

℃ 60 s (N650-1). The ideality factors of these three samples are all round 1.02. The low J_A of 1 is explained as follows: the law of junction is violated first of N600-1, which implies the voltage drop in the bulk regions occurring at lowest forward voltage in N600-1 sample. This means that the built-in voltage (Vbi) of the N600-1 sample is lowest among these samples. This observation confirmed the measured C-V data in Fig. 4.2, the N_eff is lowest at 2^nd RTA 600℃ 60s sample.

Besides, from Fig. 4.5, it is showed that J-V behaviour of N550-1 sample is different to the others. This doubly verified that higher than 2^nd RTA 550℃ 60s activation condition, the junction formation mechanism is much different. The N600 and N650 samples have lower leakage current at low reverse biased voltage due to lower defect densities presented at the junction depletion region. Bulk activation behavior extended the P/N junction far from the implantation caused defect region (i.e.

Peak 2 in Fig. 4.1). Although the N600 and N650 samples take the advantage of the good electrical properties, they are not met the shallow junction requirement.

For more comprehensive understanding the P⁺/N junction formation process, comparing with N⁺/P junction formation in chapter 3 and the silicide/silicon interface formation processes in chapter 2 is needed. First, the boron activation densities are about 10¹⁷ to 10¹⁸ cm^-3 in this study, however, for the N⁺/P case, phosphorous could achieve 10¹⁹ to 10²¹ cm^-3 doping activation level depending on different process conditions (Fig. 3.2). On the other side, boron activation densities near the silicide/silicon surface could also achieve 10¹⁹ to 10²¹ cm^-3 doping activation level as shown in Fig 2.2 [8]. These two observations suggested that the activation abilities for

boron and phosphorous are similar in metal assisted re-crystallize region (near the silicide/silicon interface). But a distance from the M/S interface, near the projection range located in silicon side in this study, where activation mainly correspond to the SPER [9] technique only, the dopant activation ability (10¹⁷ to 10¹⁸ cm^-3) is much lower than which with the metal assisted activation region (10¹⁹ to 10²¹ cm^-3). In short, metal assisted activation is more effective than SPER region at the temperatures below 600℃.

4.4 Conclusions

From the experiment results discussed in section 4.3.1 and 4.3.2, the activation of P⁺/N junction formed with IIS method could be divided into three different mechanisms. First, near the silicide/silicon interface, metal assisted activation is presented, and secondly, at the heavily doped region where SPER caused activation behavior is observed. Finally, with higher activation temperature, above 600℃ in this study, bulk activation dominates the junction’s position and its behavior. Boron could be activated at an effective doping density about 7x10¹⁷ cm^-3 extracted from C-V measurement under 2^nd RTA 450℃ 60s with the SPER caused activation mechanism.

Among all process conditions in this work, samples treated at 2^nd RTA 550℃ 60s have the best junction electrical characteristics before the bulk activation behavior dominates the device’s properties.

40

References

[1] C.S. Kang, H.J. Cho, R. Choi, Y.H. Kim, C.Y. Kang, S.J. Rhee, C. Choi, M.S. Akbar, and J.C. Lee:

Electron Devices, IEEE Transactions on, Vol. 51, issue 2, pp. 220, (2004).

[2] F.C. Shone, K.C. Saraswat, and J.D. Plummer, IEDM Tech. Dig., pp. 407, (1985).

[3] C.C Wang, Y.K Wu, W.H Wu and M.C Chen: Jpn. J. Appl. Phys. Vol.44, pp. 108, (2005).

[4] C.P Lin; Y.H Hsiao, and B.Y Tsui: Electron Devices, IEEE Transactions on, Vol. 53, issue 12, pp.

3086, (2006).

[5] K.M. Chang, J.H. Lin, and C.H. Yang: Applied Surface Science, Vol. 154, pp. 6155, (2008).

[6] C. Y. Ting and S.S Iyer: Proc. 5^th IEEE Int. VLSI Multilevel Interconnection Conf., pp.307, (1995).

[7] R. Lindsay, K. Henson, W. Vandervorst, and K. Maex, B. J. Pawlak, R. Duffy, R. Surdeanu, and P.

Stolk, J. A. Kittl, S. Giangrandi, X. Pages and K. van der Jeugd: J. Vac. Sci. Technol. B, Vol. 22, issue 1, pp. 306-311, (2004).

[8] K.M. Chang, J.H. Lin, and C.Y. Sun: Applied Surface Science, Vol. 154, pp. 6151, (2008).

[9] M.J.P. Hopstakena, Y. Tamminga, M.A. Verheijen, R. Duffy, V.C. Venezia, A. Heringa: Applied Surface Science, Vol. 231-232, pp. 688, (2004)

0 20 40 60 80 100 1E19

1E20 1E21 1E22

Boron Concentration (cm-3 )

Depth (nm) 1

2

With 2^nd RTA 650^oC 60s

Fig. 4.1. SIMS profile of boron concentration with 2^nd RTA 650℃ 60s

42

400 450 500 550 600 650 10¹⁶

10¹⁷ 10¹⁸

7x10¹⁴ 8x10¹⁴ 9x10¹⁴ 1x10¹⁵

Boron Concentration (cm-3 )

Temperature (^oC) Boron Concentration

Substrate Concentration (cm-3 ) Substrate Concentration

Fig. 4.2. Boron and substrate concentrations extracted with C-V measurement

400 450 500 550 600 650 10⁵

10⁶ 10⁷ 10⁸

I F/I R Ratio (A/A)

2^nd RTA Temperature (^oC) IF / I

R Ratio where I

F is measured at V

F=1V and I_R is measured at V_R= 2V

Fig. 4.3. IF/IR ratio with 2^nd RTA 60s at different temperatures

44

Fig. 4.4. Relative resistance ratio measured with FPP test structures at different 2^nd RTA conditions

400 450 500 550 600 650

1 10 100

R trend (ohm/ohm) (normalized with N60 650 C)

2^nd RTA Temperature (^oC) 2^nd RTA 30s (N30)

2^nd RTA 60s (N60)

-2 -1 0 1 2 10^-10

10^-9 10^-8 10^-7 10^-6 10^-5 10^-4 10^-3 10^-2 10^-1 10⁰ 10¹

N550-1 N600-1 N650-1

J A (A/cm2 )

VA (V)

Fig. 4.5. The J-V characteristics of N550-1, N600-1, and N650-1 samples

46

Chapter 5

E LECTRICAL P ROPERTIES OF S HALLOW J UNCTION

5.1 Brief Introduction and Design Idea

Schottky-liked PN junction is adapted to some of the next generation devices, such as DSSMOSFET reported by Toshiba [1], IBM [2], TSMC [3] and ASM [4].

The devices reported from reference 1 to reference 3 were fabricated with DSS method, and ASM adopted the IIS technology. Although each device processed with different conditions, all of these devices showed interesting electrical properties. Most devices had special junction behaviors characterized between traditional PN junction and MS junction. In this chapter, we want to devote our effort to study the shallow junction behavior.

Based on the understanding of the junction formation mechanisms described in previous chapters, we know that if we want to fabricate a shallow junction using IIS method, we must activate the junction in the metal assist activation region [5].

And if we want to optimize the junction’s electrical properties, to lower the defect density near the junction position is required. There are some defects might be generated in the junction formation process, like implantation defects and metal pollution. Some people wondered if there exist deep level defects by metal pollution originated from the implantation process: implanted dosage collides with the metal atom in the silicide and let the metal ion penetrate into the junction region. There are some reports showed that the second doubt listed above is not observed using the DLTS (Deep-Level Transient Spectroscopy) measurement [6,7] after two-step RTA.

The best way to reduce the implantation defect is to lower the implantation energy.

Also, same as in chapter 2 and chapter 3, in this chapter we choose the low implantation energy to let the projection range falls in the silicide to minimize the implantation defects. In addition, since the un-activated dopant and the silicon interstitial replaced by the activated dopant are all playing the roles as the impurities in the junction, we lower the implantation dosages in order to lower the potential defects in the junction to improve the junction’s performance.

5.2 Experiments

Two-port vertical diode structure was adopted in this study. Two different junction types were studied, M/N⁺/P, and M/P⁺/N. The starting material was (100) n-type and p-n-type silicon wafers, after thermal oxidation and active regions definition, backside of the n-type wafer was implanted with phosphorous 5x10¹⁵ cm^-2 and backside of the p-type wafer was implanted with BF₂ 5x10¹⁵ cm^-2. All samples were then be annealed in furnace at 1000℃ for 30 minutes. TaN 100 nm was sputtered on as the back contact. After dipped dilute HF to remove the native oxide at the active region, 20nm nickel was deposited by e-gun system. All samples were then treated with 1^st RTA at 400℃ for 30s. After un-reacted Ni removed, n-type substrate samples were ion implanted with BF₂ 5x10¹³ cm^-2, and p-type substrate samples were ion implanted with phosphorous 5x10¹³ cm^-2. Finally, samples were treated with 2^nd RTA 60s at different temperatures from 450℃ to 600℃, 50℃ per step.

The major measurement methods used in this study were C-V, I-V, and I-V-T (I-V measurement in different temperatures is used to discuss the activation energy [6,8]) measurements. C-V measurements were processed with HP4284 at 50 kHz, and I-V measurements were measured with HP4156C.

48

5.3 Experiment Results

5.3.1 C-V measurement for M/P⁺/N and M/N⁺/P junctions

At this study, the implanted doses were one hundredth of that in chapter 3 and chapter 4. According to the previous knowledge, there are two possible results that might turn up in this study instinctively. First, since the implanted dose was lowered, the measured N_eff from the C-V data should not be higher than that obtained in chapter 3 and 4. On the other hand, from chapter 2, it was shown that even at very low implanted dosage (1x10¹³ cm^-2), dopant activation at the silicide/silicon interface was high and compatible to the measured data with high implant dosage case (5x10¹⁵ cm^-2, Chapter 3 and 4). Since junction fabricated in this study is supposed to have very shallow junction, as the result, the measured N_eff at this study should not be lower than what measured in chapter 2. Interestingly, the measured results in this study, as illustrated in Table 5.1, did not meet both intuitions just stated above.

Table 5.1 illustrates the N_eff extracted from C-V measurement results without considering bandgap narrowing effect. It seems that the Neff obtained by C-V method with different implanted dosages activated at the same thermal budget does not relate to their implanted dosages. This phenomenon could be explained by the junction activation behavior discussed in previous chapters. The Neff is not only represented the dosages but also the information of the junction position. The N_eff extracted from C-V measurement results adjusted with bandgap narrowing effect [9] is present in Table 5.2. It is interesting that for heavily boron doped samples, the higher the implanted dosages, the lower the Neff concentrations near the P⁺/N interface that we obtained. Since Boron has relative higher diffusion coefficient than phosphorous does [10,11] at the temperature lower than 600℃. The schematic graphs of boron and phosphorous with different implanted dosages diffused from silicide interface at same

thermal budget are shown in Fig. 5.1. At the same thermal treatment, heavily doped sample diffused deeper than lightly doped sample, and at the same thermal treatment and same doping density, boron doped sample has almost double diffused region than phosphorous doped sample. For samples implanted with phosphorous 5x10¹³ (5E13) and 5x10¹⁵ (5E15) cm^-2, it could be found, in table 5.1, the highest activation level of these two different implanted samples was both occurred when treated at 500℃. It means that under this thermal treatment, devices are at their own best doping activation ability. Since these two samples were treated at the same temperature and had the same thermal budget, if we assume that the activated regions were the same

thermal budget are shown in Fig. 5.1. At the same thermal treatment, heavily doped sample diffused deeper than lightly doped sample, and at the same thermal treatment and same doping density, boron doped sample has almost double diffused region than phosphorous doped sample. For samples implanted with phosphorous 5x10¹³ (5E13) and 5x10¹⁵ (5E15) cm^-2, it could be found, in table 5.1, the highest activation level of these two different implanted samples was both occurred when treated at 500℃. It means that under this thermal treatment, devices are at their own best doping activation ability. Since these two samples were treated at the same temperature and had the same thermal budget, if we assume that the activated regions were the same

在文檔中 藉由離子佈植進入矽合金法在低溫活化下形成的接面研究 (頁 38-0)