MIS Capacitors Fabrication Process

In this thesis, Al/Ti/HfO2/Si capacitor were fabricated to study ultra thin HfO2

gate dielectrics. Figure 2-3 shows the fabrication flow of this experiment. The starting wafer was four inch <100> orientated p-type wafer. It was one side polished and its resistivity was 5~10 ohm-cm.

After standard initial RCA cleaning, wafers were put into chamber and grew HfO2 layer with atomic layer deposition system. After the thin films were prepared, some samples were annealed after deposition (post-deposition anneal) and then subjected to an additional plasma treatment at the substrate temperature of 300℃

while the pressure was 100 mTorr and the plasma power was 200W. The plasma treatment conditions were in pure N2 , NH3 and N2O for 30 sec, 60 sec, 90 sec and 120 sec respectively and the flow rate were 100 sccm. After nitridation, we also annealed these samples to reduce the plasma damage. Finally, pure aluminum films were thermally evaporated on the top side of wafers. Mask defined the top electrode.

Then, we used wet etching to etch undefined Al and HfO2 films. After patterning, backside native oxide was stripped with diluted HF solution, and Al was deposited as bottom electrode. The detailed fabrication process flow was listed as follows.

1. Initial RCA cleaning.

2. MOCVD(metal-organic CVD) deposition 60Å HfO2 thin film.

3. Post-deposition anneal with 600 for HfO℃ 2.

4. Plasma treatment with N2，NH3，N2O plasma for 30 sec, 60 sec, 90 sec, 120 sec respectively.

5. Post-nitridation annealing with 600℃-30sec.

6. Thermally evaporate 400 Å titanium above the HfO2 films.

7. Thermally evaporate 4000 Å aluminum as the top electrode.

8. Mask: define top electrode and then wet etch undefined Ti,Al and HfO2 films.

9. Strip backside native oxide and coat 4000 Å aluminum as bottom electrode.

After the Al/ Ti/ HfO2 /Si MIS capacitors were prepared, we used semiconductor parameter analyzer (HP4156A) and C-V measurement (HP4284) to analysis electric characteristics (i.e. I-V, C-V, EOT, leakage current density etc.). Then we tested their reliability, including stress induced leakage current (SILC), constant current stress(CCS), constant voltage stress (CVS), Hysteresis effect.

Chapter 3

Electrical Characteristics of Al/Ti/HfO ₂ MIS Capacitors

3.1 Electrical Characteristics with different post-deposition annealing (PDA) temperature

3.1.1 Capacitance-Voltage Characteristics for HfO ₂

In order to measure the C-V characteristics of our MIS capacitors, we used HP 4284A precision LCR meter in our experiments. We swept the gate bias from accumulation region to inversion region to obtain the curve at the frequency of 50 kHz from -2V to 1V. There are three kinds of plasma treatment with different source gas ( i.e. N

2

, NH

3

and N

2

O ) and they were treated for different process time ( i.e. 30 sec, 60sec, 90sec, and 120sec). Primarily, the effects of different PDA (post deposition annealing) will be discussed.

Fig. 3-1 exhibits the capacitance-voltage (C-V) characteristics of HfO2 gate dielectric anneal with different temperature for 30 sec. The capacitors of PDA (600 , ℃ 800℃) show higher capacitance than the original sample. In addition, the capacitor of PDA (800 ) ℃ exhibits the worse C-V curve, because HfO2 could not sustain the high temperature anneal over 600 . The best PDA temperature is about 600 .℃ ℃

3.1.2 Current-Voltage Characteristics for HfO 2

The leakage current of our MIS capacitors were analyzed from the current -voltage (I-V) characteristics measured by an HP4156A semiconductor parameter

analyzer.

Fig. 3-2 exhibits the J-V characteristics of HfO2 gate dielectrics anneal with different temperature for 30 sec from 0V to -2V. We observed that with suitable temperature annealing, the leakage current density can be decreased, because PDA could make the thin film dense. The leakage current density of the sample (PDA-800 ) is larger owing to the crystallization℃ -induced leakage current.

.

3.2 Electrical Characteristics with different plasma treatment for different process time

There are three kinds of plasma treatment with different source gas (i.e. N2, NH3, N2O) and they were treated for different process time (i.e. 30 sec, 60 sec, 90 sec and 120 sec). First, the relationship of difference process time in one kind of plasma treatment will be discussed. Then we compare the effect of different source gas.

3.2.1 Capacitance-Voltage Characteristics for HfO 2

Fig 3-3 shows the capacitance-voltage (C-V) characteristics of HfO2 gate dielectrics treated with N2 plasma treatment for different process time. The capacitor treated for 60 sec shows the maximum capacitance among these conditions of process time. Furthermore, the capacitor treated for 60 sec and 90 sec both show the good capacitance values which are larger than the capacitor which was not treated by N2

plasma.

Fig. 3-4 shows the capacitance-voltage (C-V) characteristics of HfO2 gate dielectrics treated with NH plasma treatment for different process time. Just like the

samples of NH3 plasma treatment. The improvement of capacitance could be seen. At this condition, the capacitance treated with NH3 plasma for 90 sec shows the largest value. By the way, all the samples which use NH3 plasma have larger capacitance than the sample without treatment. It is indicated that NH3 plasma treatment is also a practicable method to improve the capacitance-voltage characteristics of HfO2 gate dielectrics.

Fig. 3-5 shows the capacitance-voltage (C-V) characteristics of HfO2 gate dielectrics treated with N2O plasma treatment for different process time. Just like the samples of N2 plasma treatment. The improvement of capacitance could be seen. At this condition, the capacitance treated with N2O plasma for 90 sec shows the largest value. By the way, all the samples which use N2O plasma have larger capacitance than the sample without treatment. It is indicated that N2O plasma treatment is also a practicable method to improve the capacitance-voltage characteristics of HfO2 gate dielectrics.

3.2.2 Current-Voltage Characteristics for HfO ₂

Fig. 3-6 shows the J-V characteristics of p-type HfO2 capacitors treated by N2

plasma with different process time from 0 V to -2 V. We observed that the gate leakage current density is suppressed while treatment conditions are 60 sec and 120 sec. It is indicated that N2 plasma treatment supply an effective barrier against the leakage current. The film after N2 plasma treatment became dense and strong, so the leakage current could be effectively decreased, especially for capacitor which treated with N2 plasma 60 sec and it also has the lowest leakage and largest capacitance value from Fig. 3-3. Gate leakage current density of no treatment insulator at VG = -1 V is

about 1×10^-5 A/cm². From Fig.3-3, however, gate leakage current density of the capacitor treated for 60 sec N2 plasma at VG = -1 V is about 1×10^-5 A/cm². It has less gate leakage than no treatment insulator about 1 order. Furthermore, we notices that the capacitor treated with N2 plasma for 30 sec has high leakage current, it is might be that the N2 plasma is too little time to react with the film and caused by plasma damage.

Fig. 3-7 shows the J-V characteristics of p-type HfO2 capacitors treated by NH3 plasma with different process time from 0V to -2V. After NH3 plasma treatment, we could see the reduction of leakage current in contrast of no treatment samples.

However, the sample of plasma treated for 90 sec got the small gate leakage current and a good C-V curve from Fig 3-4. Relative to the case of N2 plasma, we could see that the level of leakage current increasing obviously mitigate. It is possibly due to the additional oxidation layer formed by oxygen radical. The interfacial oxidation layer will let the dielectric thicker to prevent from gate leakage.

Fig. 3-8 shows the J-V characteristics of p-type HfO2 capacitors treated by N2O plasma with different process time from 0V to -2V. After N2O plasma treatment, we could see the reduction of leakage current in contrast of no treatment samples.

However, the sample of plasma treated for 90 sec got the small gate leakage current and a good C-V curve from Fig 3-5. Relative to the case of N2 plasma, we could see that the level of leakage current increasing obviously mitigate. It is possibly due to the additional oxidation layer formed by oxygen radical. The interfacial oxidation layer will let the dielectric thicker to prevent from gate leakage.

Fig.3-9 and Fig.3-10 shows the capacitance-voltage (C-V) and J-V characteristics of HfO2 gate dielectrics treated with N2 plasma treatment for 60 sec,

that the capacitance treated with NH3 plasma treatment for 90 sec shows the most excellent value (i.e. 42% increasing about capacitance). Among these samples, the reason why the sample treated with N2O plasma has lower capacitance than N2

plasma treatment is complex. It is may be the growing of interfacial oxide made the capacitance value smaller and this interfacial layer also made the gate leakage current smaller.

3.3 Electrical Characteristics with different steps for PDA and post-plasma treatment anneal

3.3.1 Capacitance-Voltage and Current-Voltage Characteristics for HfO 2

Fig 3-11, Fig 3-12 shows the the C-V and J-V characteristics of HfO2 gate dielectrics treated with the same PDA temperature annealing and different PDA temperature annealing. As show in Fig. 3-11, the sample without nitridation can not sustain the high temperature annealing, so nitridation can improve the thermal stability of high-k film. In addition, we observe that the C-V curve of the sample without PDA and treated by N2 plasma directly is distorted at high negative bias voltages owing to the crystallization, we could see that after post deposition anneal, nitridation could effectively improve the thermal stability of the thin film. From Fig.

3-12, we can find the same result, the sample with nitridation after PDA can effectively decrease gate leakage current. It is good evidence to show that the thin

film treated by N2 plasma after post-deposition anneal can make the thin film sustain high thermal stress.

The sample with PDA 600℃ 30sec and PNA 600℃ 60sec has the better C-V curve and lower leakage current. Fig 3-13, Fig 3-14 shows the capacitance-voltage (C-V) and J-V characteristics of HfO2 gate dielectrics after the same PDA temperature and the same PNA temperature. After N

2

plasma nitridation and 800℃, 850℃, 900℃

30 sec thermal treatment. We can find the better C-V curve and lower leakage current.

The best condition is “PDA 600℃ 30sec + N

2

plasma treatment + PNA 600℃ 60sec + 800℃ 30 sec thermal treatment.”

Fig 3-15, Fig 3-16 shows the capacitance-voltage (C-V) and J-V characteristics of HfO2 gate dielectrics after NH3 plasma nitridation and 800℃, 850℃, 900℃ 30 sec thermal treatment. The capacitor with PDA 600℃ and after plasma treatment annealing 600℃ certainly has the better C-V curve and lower leakage current. But, the capacitance value decreased at negative bias, this was caused by the additional interfacial layer during the thermal process. However, it is particularly noteworthy that nitridatuon can let the HfO2 gate dielectric sustain high temperature (800℃) thermal treatment. The best condition is “PDA 600℃ 30sec + NH3 plasma treatment + PNA 600℃ 60sec + 800℃ 30 sec thermal treatment.” Compare to Fig 3-1, the film without nitridation will breakdown after high temperature (over 800℃) thermal treatment.

Fig 3-17, Fig 3-18 shows the capacitance-voltage (C-V) and J-V characteristics of HfO2 gate dielectrics after N2O plasma nitridation and 800℃, 850℃, 900℃ 30 sec thermal treatment. The capacitor with PDA 600℃ and after plasma treatment annealing 600℃ certainly has the better C-V curve and lower leakage current. But, the capacitance value decreased at negative bias, this was caused by the additional

that nitridatuon can let the HfO2 gate dielectric sustain high temperature (800℃) thermal treatment. The best condition is “PDA 600℃ 30sec + N2O plasma treatment + PNA 600℃ 60sec + 800℃ 30 sec thermal treatment.” Compare to Fig 3-1, the film without nitridation will breakdown after high temperature (over 800℃) thermal treatment.

Chapter 4

Reliability of Al /Ti /HfO ₂ /S i MIS Capacitors

4.1 Hysteresis

When a ferromagnetic material is magnetized in one direction, it will not relax back to zero magnetization when the applied magnetizing field is removed. It must be driven back to zero by the additional opposite direction magnetic field. If an alternating magnetic field is applied to the material, its magnetization will trace out a loop called a hysteresis loop. The lack of retrace ability of the magnetization curve is the property called hysteresis and it is related to the existence of magnetic domains in the material. Once the magnetic domains are reoriented, it takes some energy to turn them back again [38]. The hysteresis phenomenon is similar in the C-V curve of the MIS capacitor device. When we apply a voltage in opposite direction, it will not fit the original C-V curve measured previously. It is due to the traps of interface which would trap charges to influence the flat band voltage and C-V curve. [39]

Fig. 4-1 shows the hysteresis of p-type HfO2 gate dielectric which was deposited by sputter system without plasma treatment. Fig. 4-2 shows the hysteresis of p-type HfO2 gate dielectric which was deposited by metal-organic deposition system without plasma treatment. We see that, the hysteresis of the thin film deposited by MOCVD is smaller than the thin film deposited by sputter system. It is a good way to use MOCVD to deposit HfO dielectric, because its interfacial trap density is smaller than

the sample deposited by sputter system.

Fig. 4-3 shows the hysteresis of p-type HfO2 gate dielectrics (MOCVD) with PDA 600℃-30 sec、 N2 plasma treatment 60 sec 、PNA 600℃-60 sec and 800℃-30 sec. The hysteresis is also small after 800℃ annealing, so nitridation could decrease the trap density and let the thin film sustain high thermal stress.

Fig. 4-4 shows the hysteresis of p-type HfO2 gate dielectrics (MOCVD) with PDA 600℃-30 sec、 NH3 plasma treatment 90 sec 、PNA 600℃-60 sec and 800℃

-30 sec. The hysteresis is also small after 800℃ annealing, so nitridation could decrease the trap density and let the thin film sustain high thermal stress.

Fig. 4-5 shows the hysteresis of p-type HfO2 gate dielectrics (MOCVD) with PDA 600℃-30 sec、 N2O plasma treatment 90 sec 、PNA 600℃-60 sec and 800℃

-30 sec. The hysteresis is also small after 800℃ annealing, so nitridation could decrease the trap density and let the thin film sustain high thermal stress.

As a consequence, the plasma treatment can improve the reliability of gate oxide. The limit of hysteresis for transistor in the future generation is about 10 mV or less than it under high frequency C-V measurement. It seems we could use metal-organic deposition to deposit the HfO2 thin film to decrease hysteresis of HfO2

device.

4.2 Stress Induced Leakage Current (SILC)

In order to investigate the reliability of MIS capacitor device, the stress induced leakage current (SILC) is a common and simple experiment. The additional stress would induced trap density in the bulk or interfacial layer. The trap density would introduce another leakage path. Fig. 4-6 shows the SILC curve of p-type HfO2 gate dielectrics treated with N2 plasma for PDA 600℃-30 sec and PNA 600℃-60 sec.

First, we used constant voltage (2V) for 60 sec, but SILC did not increase. Therefore, we use constant voltage (3V) for 180 sec to stress the thin film. After the stress of constant voltage (3V) for 180 sec, the gate leakage current become larger then before.

The degree of leakage current degradation can be judged for the reliability of MIS capacitor. From Fig. 4-6, it shows the film after high temperature treatment, the quality would become worse, but it was better than the sample without nitridation.

Second, it is considered that the SILC of sample (600 ℃-30 sec + N2 plasma treatment 60 sec + 600℃-60 sec + 800℃-30 sec) which has the best C-V curve and the lowest leakage shows a small degradation. On the other hand, it is also can be noticed that the SILC of other samples is large.

Fig. 4-7 display the SILC curve of p-type HfO2 gate dielectrics treated with NH3

plasma treatment for PDA 600℃-30 sec and PNA 600℃-60 sec. First，we use constant voltage (2V) for 60 sec to stress the thin film, but we found that the thin film could not sustain the gate voltage stress, the SILC of all the samples were very large, so we use (3V) for 180 sec to replace the original ones. In Fig. 4-7, it was indicated that the SILC of the sample (600 ℃- 30 sec + NH3 plasma treatment 90sec+ 600℃

-60 sec + 800℃- 30 sec) was the smallest. The leakage current of other samples after stress were larger than original ones. So, nitridation can decrease the SILC degradation effectively.

Fig. 4-8 display the SILC curve of p-type HfO2 gate dielectrics treated with N2O plasma treatment for PDA 600℃-30 sec and PNA 600℃-60 sec. First，we use constant voltage (2V) for 60 sec to stress the thin film, but we found that the thin film could not sustain the gate voltage stress, the SILC of all the samples were very large, so we use (3V) for 180 sec to replace the original ones. In Fig. 4-8, it was indicated that the SILC of the sample (600 ℃- 30 sec + N2O plasma treatment 90sec+ 600℃

stress were larger than original ones. So, nitridation can decrease the SILC degradation effectively.

4.3 Constant Voltage Stress (CVS)

To study the reliability of thin films, we can stress the samples with a constant voltage or a constant current, which are useful methods. The mechanism of CVS is the charge trapped by the interfacial trap density which is caused by stress for a long time. In addition, the increasing interface trap density would cause new leakage path to add leakage current. In our experiments, we use constant voltage stress (CVS) to test the reliability of the thin film. Fig. 4-9 shows gate current shift of p-type HfO2

gate dielectrics treated with N2 plasma treatment 60 sec for different annealing process during CVS with Vg = 3 V. It indicated that the thin film with N2 plasma treatment 60 sec which current shift was smaller than the original one. The sample with N2 plasma treatment 60 sec after the 800℃ annealing also had smaller current shift.

Fig. 4-10 shows gate current shift of p-type HfO2 gate dielectrics treated with NH3 plasma treatment 90 sec for different annealing process during CVS with Vg = 3 V. It indicated that the thin film with NH3 plasma treatment 90 sec which current shift was smaller than the original one. The sample with NH3 plasma treatment 90 sec after the 800℃ annealing also had smaller current shift.

Fig. 4-11 shows gate current shift of p-type HfO2 gate dielectrics treated with N2O plasma treatment 90 sec for different annealing process during CVS with Vg = 3 V. It indicated that the thin film with N2O plasma treatment 90 sec which current shift was smaller than the original one. The sample with N2O plasma treatment 90 sec after

the 800℃ annealing also had smaller current shift. It had similar behavior like the previous experiment. The gate leakage shift level of the samples with or not nitridation different about 2 orders, so nitridation process could decrease the trap density effectively. It might be a good way to incorporate N atoms in the thin film to improve the reliability of the gate dielectrics.

4.4 Measured at High Temperature

As shown in fig 4-12 shows J-V characteristics of p-type HfO2 with origin sample, origin + 600℃ 30 sec + N

2

200W 60 sec + 600℃ 30 sec two condition measured at 25℃, and 125 ℃from -2 V to 0 V. At higher measurement temperature, HfO2 capacitor has larger gate leakage current due to the higher energy of electrons.

Besides, gate leakage current at VG = -1V has smaller increase from 25 ℃ than from 125℃. This hints that gate leakage current becomes to saturate at high measurement temperature.

Fig 4-13 shows J-V characteristics of p-type HfO2 with origin sample, origin + 600℃ 30 sec + NH

3

200W 90 sec + 600℃ 30 sec two condition measured at 25℃, and 125 ℃from -2 V to 0 V. At higher measurement temperature, HfO2 capacitor has larger gate leakage current due to the higher energy of electrons. Besides, gate leakage current at VG = -1V has smaller increase from 25℃ than from 125℃.

Fig 4-14 shows J-V characteristics of p-type HfO2 with origin sample, origin + 600℃ 30sec + N

2

O 200W 90sec + 600℃ 30s two condition measured at 25℃, and 125 ℃ from -2 V to 0 V. At higher measurement temperature, HfO2 capacitor has larger gate leakage current due to the higher energy of electrons. Besides, gate leakage current at VG = -1V has smaller increase from 25 ℃than from 125℃.

Fig 4-14 shows J-V characteristics of p-type HfO2 with N

2

60sec ,NH

3

90 sec

and N

2

O 90 sec for the same annealing process time and temperature for two condition measured at 25℃, and 125 ℃from -2 V to 0 V.

This hints that gate leakage current becomes to saturate at high measurement temperature. This hints that gate leakage current becomes to saturate at high measurement temperature. We find that HfO2 capacitor generates breakdown more easily at higher measurement temperature. This is attributed to electrons have higher energy at higher temperature and result in harder damage in HfO2 film.

Chapter 5

Conclusions and Future work

5.1 Conclusions

In this thesis, characteristics and reliability of HfO2 gate dielectrics with the post-deposition annealing (PDA) and the post plasma treatment (PNA) have been investigated. These methods could be improved that the quality of HfO2 thin film. The

In this thesis, characteristics and reliability of HfO2 gate dielectrics with the post-deposition annealing (PDA) and the post plasma treatment (PNA) have been investigated. These methods could be improved that the quality of HfO2 thin film. The

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