Chapter 3 Electrical Characteristics of Al/HfO 2 or HfAlO x /Si MIS
4.4 Measured at High Temperature
As shown in fig 4-12 shows J-V characteristics of p-type HfO2 with origin sample, origin + 600℃ 30 sec + N
2
200W 60 sec + 600℃ 30 sec two condition measured at 25℃, and 125 ℃from -2 V to 0 V. At higher measurement temperature, HfO2 capacitor has larger gate leakage current due to the higher energy of electrons.Besides, gate leakage current at VG = -1V has smaller increase from 25 ℃ than from 125℃. This hints that gate leakage current becomes to saturate at high measurement temperature.
Fig 4-13 shows J-V characteristics of p-type HfO2 with origin sample, origin + 600℃ 30 sec + NH
3
200W 90 sec + 600℃ 30 sec two condition measured at 25℃, and 125 ℃from -2 V to 0 V. At higher measurement temperature, HfO2 capacitor has larger gate leakage current due to the higher energy of electrons. Besides, gate leakage current at VG = -1V has smaller increase from 25℃ than from 125℃.Fig 4-14 shows J-V characteristics of p-type HfO2 with origin sample, origin + 600℃ 30sec + N
2
O 200W 90sec + 600℃ 30s two condition measured at 25℃, and 125 ℃ from -2 V to 0 V. At higher measurement temperature, HfO2 capacitor has larger gate leakage current due to the higher energy of electrons. Besides, gate leakage current at VG = -1V has smaller increase from 25 ℃than from 125℃.Fig 4-14 shows J-V characteristics of p-type HfO2 with N
2
60sec ,NH3
90 secand N
2
O 90 sec for the same annealing process time and temperature for two condition measured at 25℃, and 125 ℃from -2 V to 0 V.This hints that gate leakage current becomes to saturate at high measurement temperature. This hints that gate leakage current becomes to saturate at high measurement temperature. We find that HfO2 capacitor generates breakdown more easily at higher measurement temperature. This is attributed to electrons have higher energy at higher temperature and result in harder damage in HfO2 film.
Chapter 5
Conclusions and Future work
5.1 Conclusions
In this thesis, characteristics and reliability of HfO2 gate dielectrics with the post-deposition annealing (PDA) and the post plasma treatment (PNA) have been investigated. These methods could be improved that the quality of HfO2 thin film. The plasma treatment conditions are N2, NH
3
and N2O plasma for 30 sec, 60 sec, 90 sec and 120 sec individually. After the post-deposition annealing (PDA), the plasma treatment and the post plasma treatment (PNA), our experimental data revealed low leakage current density and good thermal stability. We find several important phenomena and they would be summarized as follows.First, improvement in the electrical characteristics of Al/Ti/ HfO2 /Si MIS capacitors after post-deposition-annealing has been demonstrated in this work. The HfO2 thin film after PDA would become dense and we could find their capacitance would increase and gate leakage current would decrease.
Second, all of the samples after plasma treatment can promote the electrical characteristics and reliability until the plasma damage happened. Among these treatments, the sample treated by N2 plasma treatment for 60 sec, NH3 plasma treatment for 90 sec and N2O plasma treatment for 90 sec for HfO2 represented a fairly great improvement, such as good capacitance ( 40% increasing for HfO2 ),
that the interfacial layer could be suppressed and the weak structure of interface has been repaired by N2 plasma respectively. The sample treated by N2 plasma also showed excellence promotion about reliability issues, such as smaller hysteresis ( <
10 mV ), smaller SILC, better CVS curve, and larger VBD. However, N2O plasma treatment also can provide good effects on electrical characteristics. The samples treated N2O plasma treatment would introduce oxygen bonding to form additional interfacial layer, so the capacitance would be decreased. In addition, we compare the HfO2 thin films, one was deposited by sputter and the other was deposited by MOCVD. The sample deposited by MOCVD had better C-V curve.
Finally, in this thesis, it has been indicated that the post-deposition annealing and three kind of N2, NH3 and N2O plasma could improve thermal stability of HfO2 thin film. Simultaneously, the reliability of the film after nitridation also represented better electronic characteristics. The most suitable way for post-deposition treatment by plasma to improve electrical characteristics on MIS structure has been observed.
5.2 Future work
In this experiment, the HfO2 film was deposited by MOCVD system. In the future, the ALCVD ( Atomic Layer CVD ) system will become another important deposition technology. Further experiment and analysis are required to clarify if the same treatment condition is also suitable for ALCVD film. On the other hand, the MOSFET will be fabricated by the same treatment condition to verify the effect on device characteristics, such as mobility, subthreshold swing, and transonductance.
The interfacial layer between high-k/ Si would be increased by increasing post-deposition-annealing temperature. In order to deeply realize the effect of the plasma treatment, we could use some methods to analysis the interfacial layer by
SIMS ( Secondary Ion Mass Spectrometer ) and TEM ( Transmission Electron Microscope ) analysis to verify the phenomenon observed from CV and JV curve.
Furthermore, we might have to understand the mechanism of leakage current of thin film and thick film individually. Finally, the mechanism of the generation of the defects in the high-k bulk or interface still needs to be solved.
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Table
Table 1-1 High-performance Logic Technology Requirements Roadmap.
( ITRS：2006 updae )
Table 1-2 Characteristics of various high-k materials.
Figure-chapter 1
Fig. 1-1 Conduction mechanism in oxide for the MOS structure.
Fig1-2 Roadmap of the gate dielectric
.
Fig. 1-3 With the marching of technology nodes, gate dielectric has to be shrunk and five silicon atoms thick of gate dielectric is predicted for 2012.[9]
Fig. 1-4 Measured and simulated Ig-Vg characteristics under inversion condition for nMOSFETs. The dotted line indicates the 1A/cm2 limit for the leakage current. [10]
Fig. 1-5 Jg, limit versus Jg, simulated for High-Performance Logic ( ITRS: 2005 update )
Fig. 1-6 Jg,limit versus Jg,simulated for Low Operating Power ( ITRS: 2005 update )
Fig. 1-7 Jg,limit versus Jg,simulated for Low Standby Power ( ITRS: 2005 update )
Figure-chapter 2
Fig. 2-1 Scaling limits of MOCVD HfO2 and ZrO2.
(International SEMATECH Confidential and Supplier Sensitive, 2002)
Fig 2-2 The ICP plasma system that was used in this experiment.
1. Standard RCA cleaning.
P-type silicon wafer
2. MOCVD HfO
250Å.
4. Plasma treatment with N
2,NH
3or N
2O (30sec, 60 sec, 90 sec,120 sec)
HDP-CVD ICP Power
N O
N N
O N
O O
5. Post-Nitridation-Annealing (600℃-60sec)
6. Thermally evaporate 40 nm titanium.
7. Thermally evaporate 400 nm aluminum as top electrode.
8. Lithography：Define top electrode Æ Wet etch undefined Ti and Al.
9. Thermally evaporate 400 nm aluminum as bottom electrode
Fig. 2-3 The fabrication flow of the experiment.
Figure-chapter 3
Fig. 3-1 The capacitance-voltage (C-V) characteristics of HfO2 gate
dielectrics anneal with different temperature for 30 sec from -2 V to 1 V
Fig. 3-2 The J-V characteristics of HfO2 gate dielectrics anneal with different temperature for 30 sec from 0 V to -2 V
Fig. 3-3 The capacitance-voltage (C-V) characteristics of HfO2 gate dielectrics treated with N2 plasma treatment for different process time.
Fig. 3-4 The capacitance-voltage (C-V) characteristics of HfO2 gate dielectrics treated with NH3 plasma treatment for different process time.
Fig. 3-5 The capacitance-voltage (C-V) characteristics of HfO2 gate dielectrics treated with N2O plasma treatment for different process time.
Fig. 3-6 The J-V characteristics of p-type HfO2 capacitors treated by N2 plasma with different process time from 0V to -2V.
Fig. 3-7 The J-V characteristics of p-type HfO2 capacitors treated by NH3 plasma with different process time from 0 V to -2 V.
Fig. 3-8 The J-V characteristics of p-type HfO2 capacitors treated by N2O plasma with different process time from 0 V to -2 V.
Fig. 3-9 The capacitance-voltage (C-V) characteristics of HfO2 gate dielectrics treated with N2 plasma treatment for 60sec, NH3
plasma treatment for 90 sec and N2O plasma treatment for 90 sec.
Fig. 3-10 The J-V characteristics of HfO2 gate dielectrics treated with N2 plasma treatment for 90 sec, NH3 plasma treatment for 90 sec and N2O plasma treatment for 90 sec.
Fig. 3-11 The capacitance-voltage (C-V) characteristics of HfO2 gate dielectrics treated with the same PDA temperature annealing and different PDA temperature annealing.
Fig. 3-12 The J-V characteristics of HfO2 gate dielectrics treated with the same PDA temperature annealing and different PDA temperature annealing.
Fig. 3-13 The capacitance-voltage (C-V) characteristics of HfO2 gate dielectrics after N
2
nitridation and 800 ℃, 850 ℃, 900 ℃ 30 sec thermal treatment.Fig. 3-14 The J-V characteristics of HfO2 gate dielectrics after N
2
nitridation and 800 ℃, 850 ℃, 900 ℃ 30 sec thermal treatment.Fig. 3-15 The capacitance-voltage (C-V) characteristics of HfO2 gate dielectrics after NH3 nitridation and 800 ℃, 850 ℃, 900 ℃ 30 sec thermal treatment.
Fig. 3-16 The J-V characteristics of HfO2 gate dielectrics after NH3 nitridation and 800 ℃, 850 ℃, 900 ℃ 30 sec thermal treatment
Fig. 3-17 The capacitance-voltage (C-V) characteristics of HfO2 gate dielectrics after N2O nitridation and 800 ℃, 850 ℃, 900 ℃ 30 sec thermal treatment.
Fig. 3-18 The J-V characteristics of HfO2 gate dielectrics after N2O nitridation and 800 ℃, 850 ℃, 900 ℃ 30 sec thermal treatment
Figure-chapter 4
Fig. 4-1 The hysteresis of p-type HfO2 gate dielectrics (sputter) without plasma treatment.
Fig. 4-2 The hysteresis of p-type HfO2 gate dielectrics (MOCVD) without
Fig. 4-3 The hysteresis of p-type HfO2 gate dielectrics (MOCVD) with PDA 600℃-30 sec, N2 nitridation 60sec, PNA 600℃-60 sec and 800℃-30 sec
Fig. 4-4 The hysteresis of p-type HfO2 gate dielectrics (MOCVD) with PDA 600℃-30 sec, NH3 nitridation 90sec, PNA 600℃-60 sec and 800℃-30 sec
Fig. 4-5 The hysteresis of p-type HfO2 gate dielectrics (MOCVD) with PDA 600℃-30 sec, N2O nitridation 90sec, PNA 600℃-60 sec and 800℃-30 sec
Fig. 4-6 The SILC curve of p-type HfO2 gate dielectrics treated with N2 plasma 60sec for PDA 600℃-30 sec and PNA 600℃-60 sec
Fig. 4-7 The SILC curve of p-type HfO2 gate dielectrics treated with NH3 plasma 90sec for PDA 600℃-30 sec and PNA 600℃-60 sec
Fig. 4-8 The SILC curve of p-type HfO2 gate dielectrics treated with N2O plasma 90sec for PDA 600℃-30 sec and PNA 600℃-60 sec
Fig. 4-9 Gate current shift of p-type HfO2 gate dielectrics treated with N2 plasma treatment for the same annealing process during Vg = 3V CVS for 180sec
.
Fig. 4-10 Gate current shift of p-type HfO2 gate dielectrics treated with NH3 plasma treatment for the same annealing process during Vg = 3V CVS for 180sec
.
Fig. 4-11 Gate current shift of p-type HfO2 gate dielectrics treated with N2O plasma treatment for the same annealing process during Vg = 3V CVS for 180sec
.
Fig. 4-12 The J-V curve of p-type HfO2 gate dielectrics treated with N2 plasma 60sec for PDA 600℃-30 sec and PNA 600℃-60 sec at 25℃, and 125 ℃from -2 V to 0 V.
Fig. 4-13 The J-V curve of p-type HfO2 gate dielectrics treated with NH
3
plasma 90sec for PDA 600℃-30 sec and PNA 600℃-60 sec at 25℃, and 125 ℃from -2 V to 0 V.Fig. 4-14 The J-V curve of p-type HfO2 gate dielectrics treated with N
2
O plasma 90sec for PDA 600℃-30 sec and PNA 600℃-60 sec at 25℃, and 125 ℃from -2 V to 0 V.Fig. 4-15 The J-V curve of p-type HfO2 gate dielectrics treated with N