Chapter 1 Introduction
1.2 Motivation
Recently, GaAs technology has been extensively implemented in many RF/microwave switch modules. However, the rapid technology evolution of Si MOSFET is beneficial for IC design with higher device speed and cost reduction. Besides the advantages on digital performance, the scaling of CMOS technology has largely improvement along with CMOS technology scaling is the large RF gain, higher cut-off frequency (ft) and maximum oscillation frequency (fmax). This has made CMOS device technology the prime choice for Mixed-Signal/RF system-on-chip (SoC) application such as WCDMA, W-LAN, and UWB wireless communication. The advantages of silicon CMOS technology over GaAs for RF and microwave control functions are low cost and integration potential.
To consider the cost down and system integration, it is desirable to use standard CMOS process for implementation of high-performance wide band T/R switch. CMOS processes are considered as the most suitable technologies for UWB transceivers. Several T/R switches using CMOS technology have been developed. Compared with the GaAs switches, CMOS switches can not operate in very high frequency, but it can provide good solution for integration of all RF, digital and analog functions in a single chip.
A high-quality microwave switch is a key building block of a RF front end for time-division duplexing (TDD) communication systems. The simplest case of multiple access is the problem of two-way communication by a transceiver, a function called “duplexing.＂
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In old walkie-talkies, for example, the user would press the“talk＂button to transmit while disabling the receive path and release the button to listen while disabling the transmit path.
This can be considered a simple form of TDD, whereby the same frequency band is utilized for both transmit (TX) and receive (RX) paths, but the system transmits for half of the time and receives for the other half. Illustrated in Fig.1.1, TDD is usually performed fast enough to be transparent to the user. Transmit/receive (T/R) switches are the components directly connected witch the low noise amplifiers (LNA) and power amplifiers (PA) in the T/R modules, see Fig1.2.
Owing to low mobility, high substrate conductivity, low breakdown voltage, and various parasitic parameters of CMOS processes, it has many challenges to design CMOS switch to achieve high power-handling capability, low insertion loss, high isolation, and wide bandwidth.
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Fig. 1.1 Time-division duplexing.
Fig. 1.2 A typical RF-front end block diagram.
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Chapter 2
Basic Concept in Switch Design 2.1 Effects of Nonlinearity
2.1.1 Intermodulation
While many analog and RF circuits can be approximated with a linear model to obtain their response to small signals, nonlinearities often lead to interesting and important phenomena. For simplicity, we limit our analysis to memoryless, time-variant systems and assume If a sinusoid is applied to a nonlinear system, the output generally exhibits frequency components that are integer multiples of the input frequency. Ifx(t)= Acosωt, then
The term with the input frequency is called the “fundamental＂and the higher-order terms the “harmonics＂. We can observe that the amplitude of the nth harmonic consists of a term proportional to An.
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In Eq. (2.3) this occurs ifα3＜0.Written as
4 3 3 2
1
α A
α + , the gain is therefore a decreasing function of A. In RF circuits, this effect is quantified by the “1-dB compression point,＂defined as the input signal level that causes the small-signal gain to drop by 1 dB. If plotted on a log-log scale as a function of the input level, the output level falls below its ideal value by 1 dB at the 1-dB compression point, shown in Fig. 2.1.
Fig. 2.1 Definition of the 1-dB compression point.
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When two signals with different frequencies are applied to a nonlinear system, the output in general exhibits some components that are not harmonics of the input frequencies. Called intermodulation (IM), this phenomenon arises from multiplication of the two signals when
their sum is raised to a power greater than unity. It can assume that
Expanding the left side and discarding DC terms and harmonics, it can obtain the intermodulation products: of the amplitude of the output third-order products to α1A defines the IM distortion.
Intermodulation is a troublesome effect in RF systems. As shown in Fig. 2.2, if a weak signal
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accompanied by two strong interferes experiences third-order nonlinearity, then one of the IM products falls in the band of desired output if ω1 is close in frequency toω2 and therefore cannot be easily filtered out. The effect is that third-order nonlinearity can change the gain, which is seen as gain compression. And the two-tone (2ω1-ω2, 2ω2-ω1) are usually referred to as three-order intermodulation terms (IM3 products). [1]
Fig. 2.2 Corruption of a signal due to intermodulation between two interferes.
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2.1.2
The 1-dB Compression Point and Third-Order Intercept PointIf an amplifier is driven hard enough the output power will begin to roll off resulting in a drop of gain known as gain compression, and the phenomenon is showed as Fig. 2.3. The measurement of gain compression is given by the 1-dB gain compression point.
The 1-dB Compression Point：
As shown in Fig. 2.1, this parameter in one measure of the linearity of a device and is defined as the input power that causes a 1dB drop in the linear gain due to power compression.
When operating within the linear region of a component, gain through that component is constant for a given frequency. As the input signal is increased in power, a point is reached where the power of the signal at the output is not amplified by the same amount as the smaller signal. At the point where the input signal is amplified by an amount 1 dB less than the small signal gain, the 1 dB Compression Point has been reached. A rapid decrease in gain will be experienced after the 1 dB compression point is reached. If the input power is increased to an extreme value, the component will be destroyed.
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Third-Order Intercept Point：
A third-order intercept point is another measure for weakly nonlinear systems and devices, for example receivers, linear amplifiers and mixers. It is based on the idea that the device nonlinearity can be modeled using a low order polynomial, derived by means of Taylor series expansion. The third order intercept point relates nonlinear products caused by the third order term in the nonlinearity to the linearly amplified signal.
The third-order intercept point is a theoretical point where the amplitudes of the fundamental tones at 2ω1－ω2 and 2ω2－ω1 are equal to the amplitudes of the fundamental tones at ω1 and ω2.
From (2.5), when ω1 = ω 2 → x1(t ) = x2(t) = xin ，the fundamental (F) of the third-order terms can be written as：
3 3
1 4
F = α xin + 9 α xin (2.10)
The linear component con be written as：
xin
F = α 1 (2.11) Compared to the third-order intermodulation term ( 3 3
4
IM3 = 3 α xin ), since the IM3
terms rises three times as the fundamental (60dB/decade to 20dB/decade) if xin is small, it can define a theoretical voltage (xin = vIP3 ) when these two tones will be equal：
4 1
11
Therefore
3 1
3 2 3
α
= α
vIP (2.13)
As shown in Fig. 2.3, the intercept point is obtained by plotting the output power versus the input power on dB scale. The input power at this point is called the input third-order intercept point (IIP3). If IP3 is specified at the output, it is called the output third-order intercept point (OIP3). [2]
Fig. 2.3 The third-order intercept point
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Two curves are drawn, one for the linearly amplified signal at an input tone frequency, one for a nonlinear product. On a logarithmic scale, “x to the power of n＂translates into a straight line with slope of n. Therefore, the linearly amplified signal will exhibit a slope of 1.
A third order nonlinear product will increase by 3 dB in power, when the input power is raised by 1 dB. [2]
For instance, it has an output power called P1 at the fundamental frequency and an input power Pi called P3 at the IM3 frequency, and we know the IM3 terms have a slope 3 times as the fundamental terms (60dB/decade to 20dB/decade). Thus, when the units of X-axis and Y-axis are dBm,
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2.2 Impedance Matching
Consider the RF system shown in Figure 2.4. Here the source and load are 50Ω (a very popular impedance), as are the transmission lines leading up to the IC. For optimum power transfer, prevention of ringing and radiation, and good noise behavior, we need the circuit input and output impedances matched to the system. In general, some matching circuit must almost always be added to the circuit, as shown in Fig. 2.5. Figure 2.6 illustrates a typical situation in which a transistor, in order to deliver maximum power to 50Ω load, must have the terminations Zs and ZL. The input matching network is designed to transform the generator impedance (show as 50Ω) to the source impedance Zs, and the output matching network transforms the 50Ω termination to the load impedance ZL.
Fig. 2.4 Circuit embedded in a 50-Ω system.
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Fig. 2.5 Circuit embedded in a 50-Ω system with matching circuit.
Fig.2.6 Circuit embedded in a 50-Ω system with matching circuit.
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Typically, reactive matching circuits are used because they are lossless and because they do not add noise to the circuit. However, using reactive matching components means that the circuit will only be matched over a range of frequencies and not at others. If a broadband match is required, then other techniques may need to be used. An example of matching a transistor amplifier with a capacitive input is shown in Figure 2.7. The series inductance adds an impedance of jωL to cancel the input capacitive impedance. Note that, in general, when an impedance is complex (R+jX), then to match it, the impedance must be driven from its complex conjugate (R-jX).
A more general matching circuit is required if the real part is not 50Ω. For example, if the real part of Zin is less than 50Ω, then the circuit can be matched using the circuit in Figure 2.8.
Series components will move the impedance along a constant resistance circle on the Smith chart. Parallel components will move the admittance along a constant conductance circle on the Smith chart. The input impedance of a circuit can be any values. In order to have the best power transfer into the circuit, it is necessary to match this impedance to the impedance of the source driving the circuit. The output impedance must be similarly matched.
It is very common to use reactive components to achieve this impedance transformation, because they do not absorb any power or add noise. Thus, series or parallel inductance or capacitance can be added to the circuit to provide an impedance transformation.
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With the proper choice of two reactive components, any impedance can be moved to a desired point on the Smith chart. There are eight possible two-component matching networks, also known as ell networks, as shown in Figure 2.9. Each will have a region in which a match is possible and a region in which a match is not possible.
In any particular region on the Smith chart, several matching circuits will work and others will not. This is illustrated in Figure 2.10, which shows what matching networks will work in which regions. Since more than one matching network will work in any given region, how does one choose? There are a number of popular reasons for choosing one over another.
1. Sometimes matching components can be used as dc blocks (capacitors) or to provide bias currents (inductors).
2. Some circuits may result in more reasonable component values.
3. Personal preference. Not to be underestimated, sometimes when all paths look equal, you just have to shoot from the hip and pick one.
4. Stability. Since transistor gain is higher at lower frequencies, there may be a low-frequency stability problem. In such a case, sometimes a high-pass network (series capacitor, parallel inductor) at the input may be more stable.
5. Harmonic filtering can be done with a lowpass matching network (series inductor, parallel capacitor). This may be important, for example, for power amplifiers. [2]
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Fig.2.7 Example of a very simple matching network.
Fig.2.8 A possible impedance matching network.
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Fig.2.9 The eight possible impedance-matching networks with two reactive components.
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Fig. 2.10 Which ell matching networks will work in which regions.
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Chapter 3
How to Design Basic Switch 3.1 Introduction
In recent years, wireless communication systems have undergone explosive growth that is largely unanticipated. In time-division duplexing (TDD) communication systems, transmit-receive (T/R) switch plays an important role to control the RF signal flow to transmitter (TX) or receiver (RX). In the receive mode, T/R switch will receive the signal from antenna. Because the switch is in front of the low noise amplifier, insertion loss will influence noise figure of receive path directly. In the transmit mode, T/R switch need to handle the great power signal from transmitter in order to avoid signal distortion.
Simultaneously, isolation can determine whether both signals may influence each other or not.
Therefore, the key parameters of single pole double throw (SPDT) switch are insertion loss, power-handling capability and isolation.
Silicon-based CMOS technology has fast become one of the most favorable processes for RFICs due to its low cost and highly integrative capacity. Owing to low mobility, high substrate conductivity, low breakdown voltage, and various parasitic parameters of CMOS processes, it has many challenges to design CMOS switches to achieve low insertion loss, high isolation, wide bandwidth, and high power-handling capability.
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3.2 Basic Concept
Some basic circuits of switch will introduce in this chapter. Traditional typology of T/R switch is a series type, see Fig.3.1. The equivalent circuit model of an on-state transistor is a small resistor. For the off-state transistor, it is represented as a small capacitor. When operating frequency increases, equivalent impedance will become smaller, see eq.3.1.
Isolation will become worse between transmit and receive end.
C Z j
ω
= 1
（3.1）There are many references to improve isolation of switch such as resonant with shunt inductor [5], series-shunt type [6], T-shaped R-C-R circuit [7]. When resonant type operates in the center frequency, inductor and“off-state＂transistor, which equivalent circuit is capacitor, become resonant circuit, see Fig3.2. This structure needs to use inductor as the same number as transistor. It will use large layout area to realize this circuit. Therefore, it is unsuitable to be realized.
Series–shunt type is shown in Fig.3.3, the function of shunt transistor is insert signal to ground. For this reason, it can improve isolation definitely. Therefore, this structure is used widely in designing T/R switch. When operating frequency increases, series-shunt type has the same problem with traditional series type. Signal loss on off-state path will become worse as frequency increasing.
To consider power-handling capability, series-shunt type is limited to characteristic of
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shunt transistor. There are many ways to solve the power-handling capability issue. From the paper [8], it used stacked series transistors to share power, so power-handling capability can be improved.
The switch uses an LC-tuned substrate biasing technique to dramatically improve the power-handling capability [9]. The body of transistor is series a resonant circuit with capacitance shunt inductance, see Fig. 3.4. It can improve power-handling capability in the specific frequency range. On the other hand, it can be used only on narrow band.
Body-floating technique is body series a large resistor about 5kΩ, see Fig.3.5. It has the same operating mode with LC-tuned substrate biasing technique, but it can improve power-handling capability in a wide band. Besides, it can also decrease insertion loss for on-state switch [10][11].
A 15-GHz T/R switch is reported in [13], the impedance matching network was employed to improve the linearity, while the isolation performance is degraded. The linearity can also be improved by using differential architectures [17], 3-dB linearity improvement can be obtained.
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Fig.3.1 The series type of switch.
Fig.3.2 The resonant type with transistor shunt inductance.
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Fig. 3.3 The series-shunt type of switch.
Fig. 3.4 The resonant type of body-floating.
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Fig. 3.5 The body series large resistor type
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3.3 Body-Floating Technique
The goals of SPDT performance are low insertion loss, high isolation and high power-handling capability.To improve the insertion loss, the substrate resistance RB should be either extremely large or close to zero. However, it is impossible to make RB zero due to the parasitic effect. Therefore, it is important to let RB be large enough. By using body-floating technique can reduce the parasitic effect.
In order to improve the power-handling capability of the CMOS switch, it can use the body-floating technique [10]. The circuit schematic of a shunt transistor is shown as Fig.
3.6(a). For the off-state transistor, it is represented as a small capacitor. Body to source and body to drain can be equivalent to the two back-to-back parasitic diodes. The equivalent circuit model on off-state is shown in Fig. 3.6(b).
In general, body connect to source type, the high input power signal will turn on the diode between body and drain. The diode can be equivalent to a small resistor. A small resistor will cause the current from ground to drain increasing quickly. The high current will change the input impedance of the transistor, and degrade the power-handling capability as shown in Fig. 3.6(c).
The equivalent circuit model of the off-state transistor with the body-floating technique , is shown in Fig. 3.6(d). The body of the transistor is connected to ground with a large resistor by using body-floating technique. The high input power signal will still turn on the diode
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between body and drain. The diode also can be equivalent to a small resistor. But the resistor between body and ground is very large, the current from ground to drain will increase smoothly. For this reason, power-handling capability can be improved by using body-floating technique.
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(a) (b)
(c) (d)
Fig.3.6. (a) Circuit schematic of shunt transistor, (b) the equivalent model in the off-state, (c) without body-floating technique, (d) with body-floating technique
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3.4 Asymmetric-LDD MOS transistor for RF Circuit Design
The rapid technology evolution of Si MOSFET is beneficial for IC design with higher device speed and cost reduction. However, the low drain breakdown voltage of CMOS transistors restricts the use of CMOS for power amplifiers. This limitation for high voltage operation significantly reduces the maximum output power and efficiency for CMOS devices.
To overcome the low breakdown voltage issue and improve the RF power performance, we use asymmetric-lightly-doped-drain (LDD) MOS transistor for high frequency RF power application.
This new asymmetric MOSFET is fully embedded in the conventional foundry logic process without any additional process step or extra cost. As technology evolution and down-scaling the Si MOSFET into sub-100 nm region, the performance of RF gain, cut-off frequency (ft), maximum oscillation frequency (fmax) and RF noise figure improve continuously but not the RF output power. This is originated from the lower source-drain breakdown voltage than that GaAs MESFET due to the smaller bandgap of 1.1eV than that of GaAs (1.42eV). The asymmetric-LDD MOS transistor that has higher drain breakdown voltage but also preserve high RF gain, ft and fmax for high frequency operation.
The structure comparison of (a) the new asymmetric-LDD MOS transistor and (b) conventional MOS transistor are shown schematically in Fig. 3.7. The LDD region at the drain size was removed that is the major difference to conventional MOS. This large
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improvement of breakdown voltage is due to the designed wide depletion region beneath the spacer region and between the drain and substrate. In contrast the existing n+-LDD in conventional CMOS transistor just provides an electrically short path between inversion channel and drain. Such wide depletion region in the new design can support significantly
improvement of breakdown voltage is due to the designed wide depletion region beneath the spacer region and between the drain and substrate. In contrast the existing n+-LDD in conventional CMOS transistor just provides an electrically short path between inversion channel and drain. Such wide depletion region in the new design can support significantly