Chapter I Introduction
1.2 Motivation
With the development of the third-generation (3G) wideband code-division multiple-access (WCDMA) wireless cellular networks, the need for low-cost, low power consumption, and high integration is becoming important for the commercial development of 3G mobile handsets. A direct-conversion receiver IC was designed for the WCDMA mobile systems. By using the WCDMA systems, the speed of the transmission of data would be promoted substantially. The direct-conversion receiver architecture with the proper use of silicon process, circuit design techniques and architecture implementation represents a promising system solution for high integration platforms for 3G handsets. Figure 1.1 shows the architecture of the WCDAM direct-conversion receiver system[14,15], and we will put emphasis on the channel select filter in the thesis. In past days, the channel select filter wasn’t included in the entire chip, but now, in a IF receiver IC, channel selectivity is achieved at baseband by on-chip low-pass filters. In order to achieve the integration of the system-on-chip(SOC), the development of the active filter have become the key point of the research.
Figure 1.1 Direct-conversion WCDMA receiver system.
Chapter II
Design of Operational
Transconductance Amplifier(OTA)
In this thesis, the design of a low-voltage CMOS fifth-order elliptic low-pass Gm-C filter with large differential input swings and wide common-mode ranges is presented. This filter consists of seven identical differential-input operational transconductance amplifiers (OTAs) and seven capacitors, and we will introduce the design of the OTA circuits with large differential input swings and wide common-mode ranges in this chapter.
2.1 Linear Tunable OTA
Figure 2.1 Basic cell of linear transconductor.
composite n-channel MOSFET[6] which is composed of matched transistors M1, M2 and M3. Figure 2.1 shows a basic cell of the linear OTA. The currents I1, I2, I3, and I4
can be expressed as
1 2 and Vt is the threshold voltage.
The transistor sizes of M1-M6 are all matched and equal to W1/L1, so the transconductance parameters of M1-M6 are all the same, too. The gate voltage of M2 is equal to (V1+Vss)/2 because the transistor size of M1 is the same to M3 and the source of each transistor is connected to the bulk. The differential output current of the basic transconductance cell is given by
1 2 ( 3 4
a b
I − = + −I I I I +I ) (2.5)
By substituting equations (2.1), (2.2), (2.3), and (2.4) into (2.5), we can obtain
1 2 by Vc. One disadvantage of this OTA circuit is that the linear input range is limited by
ss tn 1,2 dd tn
With the reduction of the power supply voltage, the input range and common-mode voltage ranges will be also decreased. Another disadvantage is that the control voltage is connected in the source terminal of the transistors M2 and M5, so that the control voltage is hard to control.
2.2 Modified Linear Tunable OTA
In order to increase the linear input range and change the connection of control voltage from source to gate terminal at the same time, the basic OTA circuit is modified by replacing transistors M2 and M5 with CMOS composite transistors[19]
as shown in Figure 2.3.
2.2.1 CMOS Composite Transistors
Figure 2.2 shows a single transistors and a CMOS pair consisting of an n-channel and a p-channel transistors. For each NMOS transistor, we have
2
GS tn
I = (V -V ) 2
K (2.8)
so we can obtain the gate-to-source voltage in the form
GS
V =Vtn 2I
+ K (2.9) For the CMOS composite transistors, the gate-to-source voltage of the transistors, Mn and Mp, can be expressed as:
GSn
We can define an equivalent gate-to-source voltage , which can, with the aid of (2.9), (2.10), and (2.11), be expressed as follows:
GSeq GSn SGp
Equation (2.12) can be written in the same form as (2.9):
GSeq teq
eq
V = V + 2I
K
where the equivalent parameters are given by
(2.14) Figure 2.2 (a) a single transistor (b) a CMOS composite transistors
Thus it is istor and
.2.2 Modified Tunable OTA
In Figure 2.3, the basic circuit of linear transconductor is modified by replacing tran
shown that a CMOS composite transistors acts as a single trans
with equivalent threshold voltage and transconductance parameter given by equation (2.14) and (2.15).
2
sistors M2 and M5 with CMOS composite transistors M21, M22, M51 and M52[6], where the equivalent transconductance parameter and threshold voltage are given by equation (2.14) and (2.15), respectively. By using the same way to the basic cell of linear transconductor, the currents I1, I2, I3, and I4 can be expressed as
If we choose W/L of the PMOS transistors M22 & M52 to be much larger than that of the NMOS transistors M21 & M51, the equivalent transconductance parameter Keq
will be very close to Kn and then we can obtain
The linear input range of this modified circuit is limited by
ss tn 1,2 dd tn
1,2
V + 2V V V + V V 2(Vc V ) Vteq ss
≤ ≤
⎧⎪⎨ ≤ − −
⎪⎩ (2.21)
which is much better than equation (2.7).
Figure 2.3 Modified linear transconductor and its symbol N-gm
2.3 An equivalent Single-ended Input OTA with Large Differential Input Signal and Wide Common-Mode Voltage Ranges
Although we have modified the linear transconductor to increase the linear input range, the input signal and common-mode voltage ranges are still too low. The NMOS input transistors in Figure 2.3 can only be maintained in the saturation region when the input common-mode voltage is larger than Vss+2Vtn. Figure 2.4 shows the V-I curve of the basic V-I converter circuit. The linearity of the V-I curve could not be maintained when the input voltage V1 is too low.
In order to improve the drawback, we use a current mirror[4], as illustrated in
Figure 2.5, to cancel the left-half plane of the V-I curve shown in Figure 2.4. Figure 2.6 shows the V-I curve of the N-OTA circuit, and the current flows into the transistor MN9 will become zero when V1<V2.
Figure 2.4 V-I curve of the basic V-I converter circuit with V2=0V.
Figure 2.5 Circuit diagram of the N-OTA composed by the basic N-type V-I converter and an NMOS current mirror.
Figure 2.6 V-I curve of the transistor MN9 of the N-OTA circuit
The V-I equation of the new N-OTA can then be expressed as:
1 2 1
When V1>V2, the output current flows into the N-OTA. When V1≤V2, the output current becomes zero.
In addition to the N-OTA, with which we have to use a complementary circuit P-OTA to combine, so that we can obtain a highly linear and high input voltage range converter. In order to design the complementary circuit P-OTA, we must design a basic P-gm cell first. Figure 2.7 shows the circuit of the basic P-gm cell, and the V/I equation can be expressed as follow:
1 2
Figure 2.7 the circuit of the basic P-gm cell.
The circuit diagram of the P-OTA is presented in Figure 2.8. For the same reason, the P-gm cell and a PMOS current mirror link together. Figure 2.9 shows the V-I curve of the P-OTA circuit, and the current flows into the transistor MP9 will become zero when V1>V2.
Figure 2.8 Circuit diagram of the P-OTA composed by the basic P-type V-I converter and a PMOS current mirror.
The voltage-to-current relationship of the P-OTA is shown in Equation (2.24).
Figure 2.9 V-I curve of the transistor MP9 of the P-OTA circuit
Combine the complementary circuit P-OTA with the N-OTA, we can obtain a V-I converter with large input signal and wide common-mode voltage ranges. Figure 2.5 shows that an N-OTA cell and its complementary P-OTA cell are connected in parallel.
According to Equations (2.22) and (2.24), the output current is always negative when V1>V2 and always positive when V1<V2. Therefore, the parallel connection of N-OTA and P-OTA cells works like an equivalent single-ended OTA, as illustrated in Figure 2.5, by grounding the positive input terminal and setting the negative input terminal to be Vi=V1-V2. The output current Io of the equivalent OTA can be simplified as
The V-I curve of the single-ended OTA is shown in Figure 2.11. The left-half plane (the positive current) of the V-I curve is the current flowing out of P-OTA and the right-half plane (the negative current) of the V-I curve is the current flowing into N-OTA.
Figure 2.10 Equivalent single-ended OTA composed by the parallel connection of N-OTA and P-OTA
Figure 2.11 V-I curve of the single-ended OTA.
It can be seen from Equation (2.25) that in order to ensure linearity over the entire range of Vi, the transconductance of the N-OTA and P-OTA must be equal. Hence
( ) (
In this way, an OTA with a high input voltage range can be achieved and the dynamic input range can be increased as well. Nevertheless the Gm value of this single-ended input OTA also can be tuned by the two control voltage, Vcn and Vcp, appropriately.
2.4 An Equivalent Differential-Input OTA with Large Differential Input Signals and Common-Mode Ranges
The OTA described in section 2.23 is single-ended input. However, it can be extended to a differential-input operational transconductance amplifier, as shown in Figure 2.12.
The differential-input OTA consists of two N-gm cells, two P-gm cells, two N-type current mirrors, and two P-type current mirrors, and the currents of Ion1, Ion2, Iop1 and Iop2 can be expressed as:
1 1
Figure 2.12 Differential-input OTA architecture.
The total output current of the differential-input OTA is
2 1 1 2 ( 1 2)
By using this differential-input OTA architecture, no matter how the input voltages, V1 and V2, vary from 0.8v to -0.8v, the transistors will always operate in the normal situation.
Figure 2.13 shows the symbol of the differential-input OTA, and the V-I equation can
be expressed as follow:
2 1
( - )
Iout = GM⋅ V V (2.32)
Figure 2.13 differential-input OTA’s symbol.
2.5 Simulation Results
The DC response of the differential-input OTA is shown in Figure 2.14 and 2.15.
In Figure 2.14, the dc transfer curve of the OTA was measured at V2=0v with three corners, tt, ff and ss, and the input common mode voltage, V1, swept from -0.8v to 0.8v. Figure 2.15 shows the dc response with V1 fixed at 0v with three corners, tt,ff and ss, and the input common mode voltage, V2, varied from -0.8v to 0.8v which is the same as Figure 2.14. In the corner “tt”, the Gm values are all about 37.5uA/V.
Figure 2.14 V-I curve of the differential-input OTA with V2 = 0V.
Figure 2.15 V-I curve of the differential-input OTA with V1 = 0V
-0.2 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8
-4 -2 0 2 4
error(%)
input common mode voltage(V)
Figure 2.16 The linearity error of Gm value at different input common-mode voltages.
The linearity errors of the Gm value are defined as follow:
( ) (0) (0)
= 100%
(0)
o in o in
in
I V I Gm V
Gm V
ε − − ⋅ (2.33)
The error is seen to be less than ±4% in the 1.6v input common-mode range.
Chapter III
Design of Tuning Circuit
3.1 Overview
As mentioned at Chapter I, one disadvantage of continuous-time filters is the requirement of additional tuning circuitry. This requirement is a result of large time-constant fluctuations due mainly to process variations. This section will present a brief overview of tuning.
3.1.1 Why Use Tuning Circuits
Analog filters must be designed with accurate component values. The resulting RC or Gm/C time-constant products are accurate to only around 30 percent with these process variations. Temperature variations worsen the situation except the process variations because resistance and transconductance values vary with temperature substantially. Thus, we need tuning circuitry to modify transconductance values such that the resulting overall time constants are set to known values[]. On chip automatic tuning of filters is a very challenging task. This chapter will present a technique to realize tuning circuitry for the integrated continuous-time filter which consists of several differential-input OTAs with large differential input signals and common-mode ranges.
3.1.2 General Concepts in Tuning
Although the transconductance value, Gmi, have large variations in their absolute value, relative transconductance values can also be set reasonably accurately.
For example, if the transconductors are realized as bipolar differential pairs with an emitter degeneration resistor, then the relative transconductance values of two transconductors is set by the ratio of their respective emitter degeneration resistor.
The most common way to tune a continuous-time integrated filter is to build an extra transconductor that is tuned and to use the resulting tuning signal to control the filter transconductors[22], as shown in Figure 3.1. Such an approach is commonly referred to as indirect frequency tuning. This tuning is indirect because one relies on matching between the filter transconductors and the extra transconductor. In other word, the filter is not directly tuned by looking at its output signal.
Figure 3.1 Indirect frequency tuning architecture.
3.2 Introduction of Practicable Tuning Circuits
In this thesis, we use a feedback circuit to set a transconductance value equal to the inverse of an external resistance. There are several feedback circuits which can be used. Figure 3.2 and 3.3 shows two examples of constant transconductance tuning circuitry—one is voltage controlled and the other is current controlled which are assumed that the transconductor’s transconductance increases as the level of the control signal is increased. In Figure 3.2, if Gm is too small, the current through the resistor Rext is larger than the current supplied by the transconductor, and the difference between these two currents is integrated with the opamp and capacitor. As a result, the control voltage, Vc, is increase until these two currents are equal and Gm = 1/Rext. On the contrary, if Gm is too large, the control voltage is decrease until these two currents are equal.
Figure 3.2 Constant transconductance tuning circuit with voltage controlled
In Figure 3.3, the circuit shows two voltage-to-current converters (one is the transconductor being tuned, and the other is a fixed voltage-to-current converter that simply needs a large transconductance and is not necessarily linear. This circuit operates as follows: If Gm is too small, then the voltage at the top of Rext will be less than Vb and the fixed voltage-to-current converter will increase Icntl. At steady state, the differential voltage into the fixed voltage-to-current converter will be zero, resulting in Gm = 1/Rext. In both circuits of Figure 3.2 and Figure 3.3, Vb is an arbitrary voltage level, while C1 is an integrating capacitor used to maintain loop stability.
Figure 3.3 Constant transconductance tuning circuit with current controlled.
In Figure 3.2, we can replace the resistor Rext by a switch-capacitor resistor as shown in Figure 3.4. If an accurate time period is available, a precise tuning of Gm/CA ratio can be achieved. Here, the operation of the tuning circuit shown in Figure 3.4 is similar to the constant transconductance approaches of Figure 3.2. In addition to the external resistance which is replaced with a switched-capacitor resistance, both of them operate alike. The equivalent resistance of the switched-capacitor circuit is given by Req = 1/(fclkC), hence the transconductance value, Gm, is set to fclkC. By using this way, the Gm/CA ratio can be expressed as
(fclk/C)/CA and then we can achieve the precise frequency tuning by just controlling the clock signal. A disadvantage of this switched-capacitor tuning approach is that it needs large transconductance ratios between the filter’s transconductors and the tuning circuitry’s transconductor or the high frequency of the clock of the tuning circuitry.
Figure 3.4 frequency tuning circuit
For example, consider the case of a 50-MHz filter, where the Gm/CA ratio should be set to 2π·50MHz. We assume that the value of C and Cm is 1pF, and then Gm = π·10-4V/A. Thus, we would require a impractical clock frequency of the switched-capacitor circuitry. In this example, fclk should be set to
-4
According to this value of the clock frequency, we might consider reducing this clock frequency by increasing the value of the capacitor Cm , but although the clock frequency fclk is reduced, settling-time requirements remain difficult since the
capacitance, Cm, is large. Another way to reduce the clock frequency is to set a smaller transconductance value for the tuning circuit. For example, the transconductance value is assumed to be 0.1Gm. In this way, the clock frequency fclk is reduced by 10, Nevertheless, the filter’s transconductance values must be 10 times greater than the tuning circuitry’s transconductance value. Although the clock frequency is reduced, poorer matching occurs between the tuning circuitry and the filter. It would cause inaccurate frequency setting for the filter.
Another approach to lower the clock frequency of this switched-capacitor tuning circuitry is by using two scaled current sources, as shown in Figure 3.5. The switched-capacitor resistor is a negative equivalent resistor, and the value of the resistance can be expressed as
_
- 1
eq negative
clk
R = f C (3.2)
.
Figure 3.5 A frequency tuning circuit that operate at a lower clock frequency.
The diode-connected transconductor is equivalent to a resistor of value 1/Gm. When the average current into the integrator is zero, Kirchhoff’s current law at the node 1 gives the equation
( )
1 0
B clk B
NI f C I
×Gm× + = (3.3) And we obtain the transconductance value as follows:
clk
Gm = Nf C (3.4)
Considering the clock frequency fclk, the equation (2.34) can be rewritten
clk f Gm
= NC (3.5)
Therefore, the clock frequency of this circuit is N times lower than the circuit shown in Figure 3.4.
Another approach to achieving frequency tuning is to use a phase-locked loop(PLL) as shown in Figure 3.6
Figure 3.6 Frequency tuning circuit using a phase-locked loop.
The voltage-controlled oscillator(VCO) is realized by using transconductor-based integrators that are tuned to adjust the VCO’s frequency. After the circuit is powered up, the negative feedback of the PLL causes the VCO frequency and phase to lock to the external reference clock. Once the VCO output is locked to an external reference signal, the Gm/C ratio of the VCO is set to a desired value, and the control voltage, Vcntl, can be used to tune the integrated filter. It should be noted that choosing the external reference clock is a trade-off because it affects both the tuning accuracy as well as the tuning signal leak into the main filter. Specifically, for best matching between the tuning circuitry and the main filter, it is best to choose the reference frequency that is equal to the filter’s upper passband edge. However, noise gains for the main filter are typically the largest at the filter’s upper passband edge, and therefore the reference-signal leak into the main filter’s output might be too severe. As one moves away from the upper passband edge, the matching will be poorer, but an improved immunity to the reference signal results, Another problem with this approach is that, unless some kind of power-supply-insensitive voltage control is added to the VCO, any power-supply noise will inject jitter into the control signal, Vcntl.
3.3 Implementation of the Tuning Circuit
It was realized that a special tuning scheme need to be implemented because the differential-input OTA designed in Chapter 2 includes two different control voltages, Vcn and Vcp. In this research, we use a N-type frequency tuning circuit shown in Figure 3.7 to control the voltage[22], Vcntl, and a complementary P-type frequency tuning circuit shown in Figure 3.8 to control the voltage, Vcptl. The integrated
high frequency filter. Obviously the disadvantage (it needs large transconductance ratios between the filter’s transconductors and the tuning circuitry’s transconductor or the high frequency of the clock of the tuning circuitry) of this switched-capacitor tuning approach in this integrated continuous-time filter would not exist. The entire architecture of the frequency tuning circuitry is shown in Figure 3.9. The control voltages of the N-tuning and P-tuning circuits, Vcntl and Vcptl, are connected with the control voltages of the N-gm cell and P-gm cell, Vcn and Vcp, respectively.
In Figure 3.7, the bias voltage, Vb, is a negative voltage, and the output current flowing out of the transconductor increases as the control voltage increases. If Gm
In Figure 3.7, the bias voltage, Vb, is a negative voltage, and the output current flowing out of the transconductor increases as the control voltage increases. If Gm