Organization

Chapter 2 begins with introduction of conventional voltage reference, and three bandgap references are shown and discussed. Then bandgap reference and CMOS voltage reference are compared. Finally, we assort five voltage references of MOS and advance that voltage mode of VPTAT and VCTAT is as our excogitative architecture.

Chapter 3 shows that VCTAT is produced by MOS transistor which works in subthreshold region and VPTAT is produced by VCTAT. Then proposed design architectures are implemented and described in detail. Comparison with proposed design architectures and researches is presented finally.

In Chapter 4, measured method and measurement environment are presented.

Experimental results for the voltage references fabricated in a standard 0.18-μm CMOS technology are reported and discussed in this chapter.

The conclusions of this work are given in Chapter 5.

CHAPTER

2

Review of Voltage Reference

First, this chapter introduces general method of voltage reference. Conventional bandgap references are presented and illustrated. Comparison with bandgap reference and CMOS (Complementary MOS) voltage reference is shown after understanding conventional bandgap references. Then CMOS voltage reference is chosen because it is better than bandgap reference at our design goal. And, CMOS voltage reference is assorted five types at many researches. Finally, choosing voltage mode of VPTAT and VCTAT is the better adaptable design architecture of voltage reference.

2.1 Background

Nowadays, voltage reference has developed maturely. We can know how to produce voltage reference in many books and researches. And Figure 2.2.1 is block diagram of voltage reference which shows that a stable voltage is produced by two different voltages. In Figure 2.1.2, a traditional VREF which does not change with temperature is added by VPTAT and VCTAT. If VPTAT and VCTAT are high linearity, VREF

will be a stable voltage. The method is suitable for voltage reference of BJT (Bipolar transistor) or MOS because VCTAT can be produced easily by characteristic of BJT or MOS, and VPTAT is produced by VCTAT. Underside will show what VPTAT and VCTAT

are?

Figure 2.1.1: Block Diagram of Conventional Voltage Reference

V^PTAT

V^CTAT V^REF

Temperature

Voltage

Figure 2.1.2: The Curvature of VREF Formed by VPTAT and VCTAT

If analog circuits want to have a stable voltage reference, two important elements which are VPTAT and VCTAT are needed. CTAT is complementary to absolute temperature. It means that a voltage decreases with temperature. VCTAT is used to compensate VPTAT, so VREF will not change with temperature. It is always produced by VBE of BJT or VGS of MOS which work in subthreshold region. In addition, VCTAT is also used to produce VPTAT by two different VCTAT which subtract each other.

Therefore, the linearity of VCTAT is important at circuits of voltage reference.

PTAT is proportional to absolute temperature. It means that a voltage increases with temperature. The above paragraph has said that VPTAT is always produced by two different VCTAT. This is a significant issue how to reach high linearity of VPTAT in circuits of voltage reference, because it will affect VREF directly. VPTAT is always used to another purpose which is as a compared voltage in smart temperature sensor. First stage of smart temperature sensor needs two voltages to compare, and the result is an authority of temperature difference which delivers to second stage of smart temperature sensor. Usually, VPTAT is compared with VREF. By this, smart temperature sensor can have an accurate temperature difference. But, premise is that smart temperature sensor needs high precise VREF and VPTAT.

After knowing the produced method of voltage reference, we need to notice three issues which relate very much to voltage reference. There are supply voltage variation, temperature variation, and process variation. If we can overcome the three issues, a stable voltage reference is produced.

The above principle is often used to produce voltage references, but the principle can derive many different circuits of voltage reference. The traditional voltage reference is designed by BJT, and it is called bandgap reference. In the next section, bandgap reference will be introduced and illustrated.

2.2 Conventional Bandgap Reference

This section will illustrate bandgap reference and show bandgap reference’s architectures. Then a comparison with BJT and MOS is shown and explained.

Finally, we choose MOS to design voltage reference because MOS is more suitable to apply in battery-operated system.

2.2.1 Bandgap Reference

Figure 2.2.1: Conventional Bandgap Reference

In Figure 2.2.1, bandgap reference has been shown. M1~M2, Q1~Q2, and operational amplifier is used to produce IPTAT. By mirroring from M2 to M3, we have the function which is shown as follows,

BE BE CTAT

PTAT V V V

V + =Δ +

bg =

V (2-12)

And V

( )

n

R V_BE R _T ln

1

= 2

Δ (2-13)

△VBE is a voltage of positive TC, and VBE is a voltage of negative TC. Then, VREF

will be independent of temperature by adding △VBE and VBE.

After bandgap reference has been illustrated, we will be curious that the difference of voltage reference which use MOS or BJT to design. Why are researches of CMOS voltage reference more and more? What are they advantages and disadvantages? In the next section, we will compare CMOS voltage reference and

bandgap reference. Finding out the advantages and disadvantages of voltage references which are designed by MOS and BJT is very important. Why do we use MOS to design voltage reference, not BJT? The answer will explain afterward.

2.2.2 BJT and MOS comparison

We have understood bandgap reference how to produce in the above section.

Now, the focus is that bandgap reference compares with CMOS voltage reference. We list some key points which more important when designing voltage reference. The comparison of voltage references which use MOS or BJT to design is shown in Table 2.1.

Table 2.1: The Comparison between MOS and BJT

MOS BJT

Advantages 1. VTH=0.45V 2. Small area

3. VREF<1.21V, low-voltage

1. Low process variation

2. Low supply voltage variation Disadvantages 1. Process variation

2. Supply voltage variation

1. VBE=0.6V 2. Large area 3. Vbg=1.21V

Let’s see the advantages of MOS which are also the disadvantages of BJT. First, VTH of MOS is lower than VBE of BJT. We know that MOS operates in subthreshold region is like VBE which is a voltage of negative TC. It means that VGS has the inverse ratio with the temperature when VGS < VTH(about 0.45V in TSMC 0.18um process).

Therefore, the same circuit architecture of voltage reference, MOS’s supply voltage is lower than BJT’s supply voltage. In the recent years, a lot of architectures are demanded for low-power, low-voltage, and small-area. The trend is ineluctability and more and more attention, and voltage reference is also following the trend. Therefore, CMOS voltage reference is more ascendant than bandgap reference in low-power architectures.

Second, area of MOS is smaller than area of BJT in the standard CMOS process and the same conditions. So area of voltage reference will decrease when using MOS to design it. The excellence is very useful to design in battery-operated system,

because battery-operated systems usually have some characteristics which are light, small, and portable. Therefore, MOS is easy to reach system integration and decrease the area.

Third, curvature compensation techniques are often used at bandgap reference.

Because the linearity of VBE is not very good at overall temperature range, it needs additional circuit which means curvature compensation techniques to compensate the linearity of Vbg. On the other hand, VTH of MOS has superior linearity, and MOS does not need curvature compensation technique at wide temperature range. Therefore, the area of voltage reference circuit can be reduced. But, the performance is still good or even better.

Even if MOS has a lot of advantages which is very adaptable in battery-operated system, we still need to attend to process variation when we want to design CMOS voltage reference. Process variation of MOS is more serious than that of BJT, but it can be got over by every corner simulation. We need to run every corner and limit corners at an acceptive range when we simulate voltage reference.

In the above comparison, we know that MOS is better than BJT when designing voltage reference in battery-operated system, so we decide that using MOS to design voltage reference. Before design, we should review researches of MOS voltage reference in the recent six years. Because we can understand how to design CMOS voltage reference by reviewing researches. And it is important to find out advantages and disadvantages from every circuit architectures of voltage reference in researches.

The introduction of CMOS voltage reference will be presented in the next section. In addition, we will compare five circuit architectures of voltage reference and choose the best adaptable architecture to discuss in depth.

2.3 CMOS Voltage References

Bandgap reference is a traditional voltage reference. It is formed by VBE of BJT.

VBE is a voltage of negative temperature coefficient, and two different VBE subtract to produce VPTAT which is a voltage of positive temperature coefficient. So, a stable voltage reference which is not change with temperature, supply voltage, and process is produced by VPTAT and VCTAT. As the process advances, voltage references request more and more seriously for low power and small area. But, BJT is hard to accord

with the goal at the present age. Therefore, BJT was replaced by MOS when designing voltage reference. The source had been illustrated them in the above sections.

Near present year, someone discover MOS work in subthreshold region has a characteristic which is analogous to BJT. It means that VGS of MOS which works in subthreshold region is a voltage of negative temperature coefficient. So voltage reference starts to use MOS. In the above sections, we know that MOS has two main advantages. First, it is low voltage, because VGS is lower than VBE. Second, MOS’s area is small. Because having the two advantages, researches of CMOS voltage references are increasing in the recent six years.

In the recent six years, a lot of researches of CMOS voltage references are designed. CMOS can be assorted five types by those researches. The classified basis is produced method of voltage reference. All types have advantages and disadvantages by themselves. In the following sections, we will illustrate and discuss. Now, the five types are shown below.

1. Voltage Mode of VPTAT and VCTAT:

CMOS voltage reference is produced by IPTAT and VCTAT(VGS).

2. Current Mode of VPTAT and VCTAT:

CMOS voltage reference is produced that IPTAT and ICTAT. IREF multiplies resistor to produce VREF.

3. Voltage Reference Uses Parallel Voltages:

The circuit uses that two VGS which have the same slope to subtract, then CMOS voltage reference is produced.

4. Zero Temperature Coefficient Point (ZTC):

When MOS work at a fixed point, the VGS and ID will not change with temperature. The point is called zero temperature coefficient point. So VGS can be designed as voltage reference.

5. Voltage Reference Uses Non-standard Process:

CMOS voltage reference which does not use standard CMOS process technique is designed.

The five types will be showed in the below sections. In addition, I choose five researches to illustrate the five types and list the performance of five types. Then the comparison of researches will be shown and discussed. We will illustrate that voltage mode of VPTAT and VCTAT is more suitable than other architectures to design voltage reference in battery-operated system.

2.3.1 Voltage Mode of V

PTAT

and V

CTAT

Figure 2.3.1: Circuit Architecture for Voltage Mode of VPTAT and VCTAT (REF[2])

In the last few years, CMOS voltage reference’s circuits can work under 1V. But, those circuits present a high level of complexity. It may cause undesirable behavior and a high quiescent current. Consequently, efforts have been made to develop a simple circuit of voltage reference which has a power supply lower than the bandgap voltage.

The circuit refers to Ref [2]: A CMOS Voltage Reference Based on Threshold Voltage for Ultra Low-Voltage and Ultra Low-Power. It is assorted to voltage mode of VPTAT

and VCTAT. Voltage reference uses only resistors and transistors working in weak inversion, without any bipolar transistors. The circuit was implemented in a standard

0.35μm TSMC CMOS process. VREF is 514mV for a power supply of 900mV, and temperature coefficient is 39 ppm/℃ for temperature range from 0℃ to 100℃. (Ref:

[2])

The derivative is as follows:

All MOS operate in subthreshold region, and the function is (2-14) (2-15),

( ) ( ) ( )

Using two VGS to produce △VGS which is proportional to absolute temperature (PTAT), see (2-16),

Deciding the slope of △VGS is feasible by adjusting (W/L). And, we can know IPTAT is

△VGS / R1, see (2-17),

IQ5 is M*IPTAT, beside VGS is complementary to absolute temperature (CTAT). So, voltage reference (VREF) is the function of (2-18),

( ) ( )

The architecture of CMOS voltage reference has some advantages:

1. Low power and low supply voltage: All MOS operate in subthreshold region.

The power and voltage will be very low.

2. Small area: Resistors of the above architecture occupies a half above area. If the resistors can be decreased or deleted, area will be very small. It is conform to design in battery-operated system.

3. Simple: It uses no curvature compensation technique, but it has high performance. The circuit has only three current paths, so the power can scale down.

Those advantages are very powerful help for designing voltage reference in battery-operated system. In Table 2.2, it shows researches for voltage mode of VPTAT

and VCTAT. The power can scale down to several dozens nano-Amp and the area can reach μm². Under comparison, the performance certainly does not lose to bandgap reference.

Table 2.2: Researches for Voltage Mode of VPTAT and VCTAT

2.3.2 Current Mode of V

PTAT

and V

CTAT

The circuit refers to Ref [10]: A Simple Subthreshold CMOS Voltage Reference Circuit With Channel-Length Modulation Compensation. It is assorted to current mode of VPTAT and VCTAT. The circuit uses MOS works in subthreshold region to produce a reference voltage of 221mV at supply voltage of 0.85V. The power consumption has only 3.3μW at room temperature uses TSMC 0.18μm technology.

The area of proposed circuit is less than 0.0238 mm², and the reference voltage variation is 2mV/V for supply voltage from 0.9 to 2.5V. Beside, the temperature variation is 6mV in the range from -20℃~120℃. (Ref: [10])

Figure 2.3.2: Circuit Architecture for Current Mode of VPTAT and VCTAT (REF[10]) The circuit is a typical current mode of VPTAT and VCTAT, and it is divided into three parts.

1. CTAT part: It is made of transistors M1 to M5 and resistor R1. To analyze the circuit, M3 operates in subthreshold region. VGS3 is negative-temperature voltage.

So, we can know that (2-19).

C GS

B I

R

I =V −

1

3 (2-19)

IC is used to compensate channel-length modulation. IB is a current of negative-temperature coefficient, so ICTAT is produced in this part.

2. PTAT part: A general IPTAT generator is made of transistors M6 to M9 and resistor R2. Transistors M8 and M9 operate in subthreshold region, and the function is as follows : (2-20)

( )

2 2

9 8

R V R

V

I_A V^{GS GS} Δ ^GS

− =

= (2-20)

ΔVGS is positive-temperature voltage, so IA is positive-temperature current. Therefore IPTAT is produced in the part.

3. VREF part: Using transistors M10 to M11 and resistor R3, we can get VREF. The function of VREF is as follows : (2-21)

( ) ( ) ( )

( )

¹¹₂ ³

7

10 I * R

W L WL I WL WL

V_{REF A B}

⎟⎟

⎟

⎠

⎞

⎜⎜

⎜

⎝

⎛ +

= (2-21)

Although, those circuit can be designed in low voltage architecture, but they always need resistors. It must cause big area, so it is not easy to accord with our goal which is design in battery-operated system. Besides, resistors have more variation in standard CMOS process. It may decrease the accuracy of voltage reference. Further, voltage reference is the currents to multiply the resistor. If VREF needs a higher value, the currents and resistor must be large enough to reach the value. Therefore, power is hard to decrease.

In Table 2.3, it shows researches for current mode of VPTAT and VCTAT. We can discover that temperature coefficient of current mode is not better than voltage mode.

Because current mode of VPTAT and VCTAT needs current mirror and resistors, they will cause deviation of voltage reference. Therefore, temperature coefficient is difficult to scale down. The power is hard to scale down, too. Those issues have been illustrated in the above section.

Table 2.3: Researches for Current Mode of VPTAT and VCTAT PAPER

(year)

VDD (V)

Temperature Range

(℃)

Temperature Coefficient

(ppm/℃)

VREF (mV)

Tech.

(μm)

AREA (mm²)

PSRR (dB)

POWER (W)

Current Mode of VPTAT and VCTAT

*[9] 2003 1.2 -25~125 119 295 1.2 0.23 40 4.32u

*[10]2006 0.85 -20~120 194 221 0.18 0.0238 3.3u [11] 2003 0.6 -40~100 93 400 0.13

[12] 2003 1.5 -40~125 37.88 800 0.13 120u

[13] 2003 0.6~1.8 0~80 80 405 0.18 0.1 82 25u

[14] 2004 3~5 -60~100 4 1165.4 1.2 0.18 30u

[15] 2004 1 -20~80 200 400 0.35 3u

[16] 2004 0.8 0~100 33 592 0.6 0.05 50 0.88u

[17] 2005 1 -40~125 66.7 225 0.5 4u

[18] 2005 1.8 0~70 32.5 615.1 0.18 0.1 35 1.6u

[19] 2006 1.2 -20~90 61.64 718 0.09 1.6u

[20] 2006 0.8~2.6 -20~120 64.2 278 0.18 0.04 5.4u

2.3.3 Voltage Reference Uses Parallel Voltages

Figure 2.3.3: Circuit Architecture of Parallel Voltages (REF[21])

A voltage reference is necessary for LDO design, and it provides a low-supply-dependence and low-temperature-drift reference voltage to define the LDO output voltage. The circuit refers to Ref[21]: A CMOS Voltage Reference Based On Weighted △Vgs For CMOS Low-Dropout Linear Regulators. It is assorted to parallel voltages. A CMOS voltage reference been implemented in a standard 0.6μm CNOS technology. The area is 0.055mm², and the lowest supply voltage is 1.4V. A typical temperature coefficient is 36.9 ppm/℃. (Ref: [21])

The proposed CMOS voltage reference is based on the different temperature dependencies of the threshold voltages of an NMOS and a PMOS. See Fig 2.3.3, it can be divided into three parts.

1. Start-up circuit: It is formed by MS1-MS3. It uses to trigger this circuit, when the circuit operates in wrong state.

2. Low-voltage bias circuit: It is formed by M1-M4 and RB. It provides a stable bias current.

3. Reference core circuit: It is formed by M5, MP, MN, R1 and R2. Its function of VREF is showed as follows: (2-22)

GSp GSn

REF V V

R

V R ⎟⎟ −

⎠

⎜⎜ ⎞

⎝

⎛ +

=

2

1 1 (2-22)

Using two parallel voltages which mean two VGS to subtract is a method to produce voltage reference. But, the architecture has two disadvantages. First, two slopes of VGS is not parallel, because the two MOS is not in the same situation which means different VBS and different MOS type. This will cause inexactitude voltage reference. See Table 2.4, we discover temperature coefficient of the architecture is not bad, but they almost do not have good temperature range. Second, these circuits have a disadvantage which is resistors. Because we need most current (M*IB) run through MP and MN, resistors R1 and R2 must be large enough. This causes the resistor derivation to increase.

Table 2.4: Researches of Voltage Reference of Parallel Voltages PAPER

(year)

VDD (V)

Temperature Range

(℃)

Temperature Coefficient

(ppm/℃)

VREF (mV)

Tech.

(μm)

AREA (mm²)

PSRR (dB)

POWER (W)

Voltage Reference Uses Parallel Voltages

*[21]2003 1.4 0~100 36.9 309 0.6 0.055 20 13.58u

*[22]2004 5 -10~80 32 2670 0.5 0.0936 970u

*[23]2005 1.5 0~80 25 168 0.35 0.08 59 3.6u

*[24]2006 1.5~4.3 0~80 12 891.1 0.35 0.015 59 300n [25] 2005 0.6~1.8 0~75 70 332 0.18

[26] 2006 0.9~3.3 -40~100 33 181 0.35 1.1u

2.3.4 Zero Temperature Coefficient Point (ZTC)

The circuit refers to Ref[27]: Mutual Compensation of Mobility and Threshold Voltage Temperature Effects with Applications in CMOS Circuits. It is assorted to ZTC. Mutual compensation of mobility and threshold voltage temperature variations may result in a ZTC (zero temperature coefficient) bias point of a MOS transistor. The circuit can be applied in voltage reference circuits and temperature sensors with linear dependence of voltage versus temperature. (Ref: [27])

Figure 2.3.4: Circuit Architecture of ZTC (REF[26])

See Figure 2.3.4, Q1 operates on ZTC point. To use feedback to stabilize MOS Q1, so variations will decrease. In the circuit, for transistor Q1 the following design relationship should be satisfied

3 1

2 3

1 2 1

1 R R

V R R R V R I

I_D = _DF = _GS = _GSF (2-23)

The values of IDF = 192μA and VGSF = 869mV were considered as the parameters of the ZTC bias point at T=T0=300°K.

But ZTC has a problem that VREF is hard to be designed in ultra low voltage.

That is because MOS has no ZTC point in ultra low voltage. In Table 2.5, VREF can’t be lower than 600mV, even if supply voltage scales down 1V. Therefore, the architecture is hard to apply in battery-operated system.

Table 2.5: Researches of ZTC PAPER

(year)

VDD (V)

Temperature Range

(℃)

Temperature Coefficient

(ppm/℃)

VREF (mV)

Tech.

(μm)

AREA

AREA

在文檔中 操作於弱反轉層場效電晶體之極低功率損耗與極小面積CMOS參考電壓之設計與實現 (頁 14-0)