Chapter 1 INTRODUCTION
1.3 Organization of Thesis
The thesis consists of six chapters. In this chapter, our objective and motivation have been described.
In chapter 2, we have introduced the background knowledge of this thesis, including the operation and the parameters of OTFTs, the concept of charge conduction in organic semiconductor, and so on. Moreover, we also present an overview of related researches on thermal annealing effect and its device performance.
Chapter 3 gives a detailed description of our device fabrication process and measurement system.
In chapter 4, the analysis methods are introduced. It describes how we analyzed the grain boundary density and roughness from images recorded by atomic force microscopy, and how we examined pentacene phase and crystal structure from X-ray diffraction-spectra.
Chapter 5 shows our experimental results as well as the related details
Conclusions and future work are summarized in chapter 6.
Chapter 2 LITERATURE REVIEW
2.1 Organic Thin film Transistor [4]
2.1.1 The Geometry and Operation
Figure 2.1 (a) and 2.1 (b) show two structures of OTFTs that are most commonly used, top-contact and bottom-contact structures. In the top-contact device, the organic semiconductor is deposited before the deposition of metal electrodes. On the contrary, the deposition sequence of bottom-contact device is reversed. Pentacene-based TFTs exhibit p-type device behavior, which means that the holes serve as majority carriers.
Therefore, a negative bias of gate voltage was applied to accumulate holes in the p-type active layer. The operation of a p-type OTFT can be simply described as following:
(1) When the gate bias VGS is zero, there is no gate-induced charge near the semiconductor/insulator interface. At this moment, no charges can transport even if a small negative source-drain bias VDS is applied, since there are no mobile charges in the organic semiconductor.
(2) When a negative VGS is applied on gate electrode, accumulation of positive charges at the semiconductor/insulator interface takes place and an electric field
is induced. This is the accumulation regime. In this regime, the accumulation of charges will form a channel from source to drain electrodes, which allows hole current to flow inside.
(3) While the electric field is large enough and under an negative bias of VDS, the hole current is induced in the channel and subsequently flows from the drain to the source electrode.
(a)
(b)
Figure 2.1 (a) top-contact structure of OTFT and (b) bottom-contact structure of OTFT.
In the top-contact device, the organic semiconductor is deposited before the deposition of metal electrodes. On the contrary, the deposition sequence of bottom-contact device is reversed.
2.1.2 The Parameters
The current (I) −voltage (V) characteristics model of OTFTs are often expressed as that of convection inorganic semiconductors devices. Figure 2.2 shows a plot of drain current (ID) versus drain voltage (VDS) at various gate voltages (VGS).
0 -10 -20 -30 -40 -50 independent of VDS in the saturation regime.
At low VDS, i.e.,−VDS <<−(VGS −VT), ID increases linearly with VDS, which is called linear regime. In this regime, ID is approximately described as the following equation:
DS where W is the channel width, L is the channel length, μ is the field-effect mobility, VT
is the threshold voltage, and Ci is the capacitance per unit area. At large VDS, i.e.,−VDS >−(VGS −VT), ID tends to saturate due to the pinch off of accumulation layer, which is called saturation regime. The characteristics of the saturation current are expressed by the equation:
)2
Figure 2.3 shows Gate voltage dependence of Drain current.
The mobility (μ) discussed in this study is extracted from the slope of the plot of
|ID|1/2 versus VGS in the saturation regime, according to The threshold voltage (VT) defines the onset voltage for the channel formation. VT
shown in Equation (2.3) represents the x-intercept of |ID|1/2-VGS plot in the saturation regime. The on-off current ratio (Ion/Ioff) which means the ratio of the current turned device on over the current turned device off is also exhibited in Figure 2.3. Further, the sub-threshold swing (S.S.) reveals how fast the device can be turned on and off, defined as
10-11 VGS (right axis) at a constant drain voltage of −60 V (saturation regime).
2.1.3 Effective Resistance
The approach utilized to discuss resistance of OTFT is the transmission-line method (TLM). [15] The concept of TLM was described in Figure 2.4. Based on the TLM, we separate the whole device resistance (Ron) of OTFT into a total contact resistance (RC, source/drain contacts) and channel resistance (RCh). At low VDS, RCh is a function of L and VGS. Therefore, the RC is given by the intercept of Ron versus L plot at L = 0, where Ron = RCh + RC.
But this assumption is not very critical. One of the reasons is that the RC we obtained is the contact resistance at L=0 without taking the whole source/drain contact area into account. Besides, it is invalid to multiply R by source/drain contact area since
the distribution of the current is not uniform throughout the whole source/drain contact area. Another reason is that RC is not the pristine contact resistance because the resistance comprises the resistance of contact surface and the resistance of bulk pentacene vertical to the channel, as shown in Figure 2.5.
Accordingly, the influence of contact resistance and bulk resistance should be discussed individually.
0 40 80 120 160
0.0 0.5 1.0 1.5
2.0 VG= -30
VG= -45 VG= -60 VG= -75
Total Resistance (
ΜΩ)
Channel Length (
μm)
Figure 2.4 Total resistances as a function of L at different VGS. By the TLM, RCis given by the intercept of the total resistance Ron versus L plot at L = 0.
To obtain accurate contact resistance and bulk resistance, we followed the theorem which published by Michael Shur in 1990. [16-17]M. Shur’s theory is based on TLM and followed by a second order differential equation to calculate effective resistance
and injection length.
According to his theorem, in the linear regime, the Ron can be expressed as the sum of the intrinsic channel resistance (rch) which is independent of L, and the parasitic resistance (Rp), as the following equation:
p
where μi is the intrinsic mobility and VT is the threshold voltage. In Figure 2.5, a simple schematic circuit diagram at the source contact of OTFT is illustrated.
Figure 2.5 The equivalent circuit of top-contact OTFT near the pentacene and electrode interface. The rch, rbulk,andrC are calculated by the theorem which published by Michael Shur in 1990. [16-17]
The current distribution under a contact surface can be described from the where Ich(x) specifies the current parallel to the channel, x represents the coordinate in the direction parallel to channel, and Jc is the vertical current density,
P ch
c x V x r
J ( )= ( )/ (2.7)
Here Vch(x) is the electrical potential of channel at position x and rP is the effective parasitic resistance consist of effective contact and bulk resistance.
C bulk
P r r
r = + (2.8)
The variation of Vch(x) along x can be expressed as
ch
where rch is the channel resistance of the pentacene film and W is the contact width.
Combing Equations (2.6) and (2.9), we have a second order differential equation as:
2
is the effective transfer length. The boundary conditions for Equation (2.10) are
ch
where I0 is the total channel current and d is the contact length. By solving the Equation (2.10) with boundary conditions of Equation (2.12) and (2.13), we get
ch P
T R r
L = / , (2.14)
From Equation (2.10), we can obtain the effective contact resistance,
ch
2.2 Organic Semiconductor
2.2.1 The Basic Structure of Pentacene
Pentacene (C14H22) is a rod-like aromatic molecule composed of five benzene rings.
(see Figure 2.6) [18] Benzene consists of a chemically conjugated system in its molecular structure, which is a system of carbon atoms covalently bonded with alternating single and double bonds. In a conjugated molecule the electrons in the π-bond can be excited while the electrons in the σ-bonds in the backbone maintain the structural integrity of the molecule, hence a conjugated polymer can be electronically excited without being destroyed. Moreover an electron (or hole) in a conjugated system will be delocalized within the conjugated segment. Therefore, the conduction mechanism in organic semiconductors is very different from that in metals or inorganic semiconductors. The carrier mobility is strongly dependent on the molecular structure and ordering. On the other hand, compared with other organic semiconductors, pentacene exhibits a strong tendency to form highly ordered films, which depend on the surface properties of substrates and the growth conditions. [10]
Figure 2.6 Chemical structure of pentacene (C14H22). It is a rod-like aromatic molecule composed of five benzene rings.
2.2.2 Charge Transport
[19-21]The conducting mechanism in inorganic semiconductors or metals is usually described by band transport. No matter how perfect the crystal is, the symmetry is always disrupted by phonons (lattice vibrations) that scatter the charge carriers. The diagram is shown in Figure 2.7 (a). Since less phonon are generated at lower temperature, the mobility of the charge carriers decreases with increasing temperature.
It is mentioned that organic semiconductor consist of a chemically conjugated system. This system results in a general delocalization of the electrons across all of the adjacent parallel aligned π-orbital of the atoms. Further, the structures of organic semiconductor are usually disordered, and the energy bands formed by extended conjugated chains are usually not very long and separated by defects. Those defects also create traps for charges; and hence the mobile charges are fairly localized. Because of defects and disorder, organic semiconductors have no extended band structures as inorganic semiconductors. Charge transport in organic semiconductors is typically described by hopping of charges between localized states, which is a phonon assisted mechanism from site to site as shown in Figure 2.7 (b). In this type of transport the carrier is localized due to disorder, defect or self-localization (polarons).
In summary, the charge transport mechanism in organic semiconductor is thermally activated hopping at high temperature. In some cases, it becomes band-like transport described by the band like a straight line at very low temperature. [22]
(a)
(b)
Figure 2.7 Charge transport in solids. (a)Band transport. The band of a perfect crystal is described as a straight line where the delocalized free carrier moves. (b) Hopping transport.
In this type of transport the carrier is localized due to disorder, defects o self-localization (e.g. polarons) and hops from site to site with the essential help of lattice vibrations.
2.3 The Thermal Annealing Treatment
Thermal annealing is a heat treatment of material, usually changing its orderings or properties. The annealing process contains heating and maintaining at a suitable temperature, and then cooling. It is hoped to improve the molecular structure and the properties of devices. Therefore, the thermal annealing effect on film orderings and the relationship between molecular structure and device properties are concerned. The thermal annealing treatment has been widely used in the fabrication of poly-Si TFTs [23-24]. Since 2002, several researches about thermal annealing effect on OTFTs and organic films have been proposed. The related literatures are summarized in Table 2.1, including device structures, annealing conditions, and device mobility.
Researches on pentacene thin film and its device performance have been concerned. In Figure 2.8, the plot of ln(μ) versus 1000/T can be fitted by the Arrhenius formula:
⎟⎠
⎜ ⎞
⎝⎛−
∝ kT
Ea
0exp μ
μ (2.16) indicating that the charge transport in devices can be described by the hole-hopping model. [27, 30]
Table 2.1 The related researches about thermal annealing treatment.
Authors Device Structure
G\insulator\semiconductor\S.D
Best Annealing Condition
Mobility cm
2/Vs
T. Komoda et al. [25] n+-Si\SiO2\pentacene\Gold 50 οC/1 hr (in vacuum) 0.2 S. J. Kang et al. [13] n+-Si\SiO2\pentacene\ Gold 90 οC/1 hr (in vacuum)* 0.49
T. Seckitani et al. [26-28] Au\Polyimide\pentacene\
Gold 140 οC/12 hr (in N2) 0.56 R. Ye et al. [12] n+-Si\SiO2\pentacene 40-120 οC/1 hr (in vacuum) / R. B. Chaabane et al. [29] Si\SiO2 + Si3N4\NiPc\Gold 100 οC/1 hr (in vacuum) 8.9×10-3 D. Guo et al. [30] n+-Si\SiO2\pentacene\ Gold 45 οC/2 hr (in vacuum) ≒0.22
* The annealing treatment is executed by “pre-annealing” in chamber after pentacene deposition.
Figure 2.8 Arrhenius plot of the logarithm mobility versus the reciprocal temperature. [30]
In ref. [12, 13, 25], both AFM images and XRD analysis showed that pentacene ordering were improved by thermal annealing. Nevertheless, the mechanism has not been explained in details. How the device performance was influenced by the thermal annealing treatment was still not well understood yet. Therefore, to understand the mechanism of the post-annealing effect on OTFTs is the most important target in this study.
Chapter 3 EXPERIMENTAL PROCESS
3.1 Device Fabrication
3.1.1 Substrate Cleaning
The substrate used in this study consists of heavily n-doped silicon wafer with 200 nm-thick thermal oxides. To remove organic contaminants, the substrates were rinsed in de-ionized water for 5 minutes, dipped in H2SO4 + H2O2 (H2SO4:H2O2=3:1, 80 οC) solution for 20 minutes, and then rinsed in de-ionized water for another 10 minutes.
Finally, the cleaned substrates were blew by dry N2 gas and dried in an oven at 120 οC for 1 hour.
Figure 3.1 The procedure of substrate cleaning. The SiO2 wafers were placed on the Teflon carrier during the cleaning process.
3.1.2 The Surface Treatment of Insulator Surface
Surface treatment on the gate insulator is one of the effective methods to control the condition of dielectric surface. The treatment has been proposed to have significant effects on the resulting thin film structure and electrical characteristics. [31] Therefore, surface treatment on the SiO2 is carried out prior to the deposition of the pentacene layer. Our SiO2 surface was modified with poly-α-methyl styrene (PαMS, Aldrich Co.) by spin-coating from toluene solutions, which can change the electronic state at the dielectric/channel interface, and improve the pentacene-based TFT performance. After spin-coating, the PαMS modified substrates were baked at 100 oC for 1 hour to remove residual solvent. The PαMS film was about 8-nm-thick, and the capacitance per unit area Ci of 200 nm-thick thermal oxides with PαMS-coating layer is 1.41 × 10-8 F/cm2 in our study.
Figure 3.2 The chemical formula of poly-α-methyl styrene (PαMS). Our SiO2 surface was modified with PαMS by spin-coating from toluene solutions.
3.1.3 Pentacene and Gold Electrode Deposition
The growth of pentacene thin film and deposition of gold electrodes were accomplished via vacuum sublimation by thermal evaporation. In the chamber, a quartz oscillator and a shutter were utilized to control the deposition rate avoiding deposition under unstable vapor flux. The deposition temperature was measured by an Al-Cr thermocouple. The pentacene source was placed in a BN-crucible and heated by a W-coil, and gold ingot was placed and heated in a W-boat.
The substrates were attached to shadow masks to define the deposited area. The 60 nm-thick pentacene (FLUKA Co., without further purification) thin-films were deposited under a working pressure below 1.6 × 10-6 Torr. During the thin film formation, the deposition rate was maintained at 0.05 nm/s, and the substrate temperature was kept at 17 oC.
Gold, as the source/drain electrode, was finally evaporated on top of the pentacene thin-film through a patterned shadow mask. The channel width (W) was 2 mm and the channel length (L) ranged from 75 to 160 μm. The device fabrication procedure is shown in Figure 3.3.
3.1.4 The Post-Annealing Treatment
To discuss the effect of post-annealing, a portion of our devices were treated by the thermal annealing process. The thermal annealing treatment was carried out at 90 oC for
80 min in a nitrogen-filled glove box. The concentrations of O2 and H2O in the glove box are both controlled bellow 1 ppm. After thermal annealing, the annealed samples are then cooled down naturally.
STEP 1
Surface modification on cleaned substrates with PαMS by spin-coating from toluene
solutions.
STEP 2
Pentacene thin film deposition through shadow mask.
STEP 3
Golden electrode deposition through shadow mask.
Device fabrication complete.
Figure 3.3 The flow chart of device fabrication. To discuss the effect of post-annealing, a portion of our devices were treated by thermal annealing process after device fabrication.
3.2 Device Measurement System
After completing the experimental process and before measuring the samples, all of our samples were conserved in the vacuum environment to avoid exposure to moisture and oxygen.
The current−voltage characteristics of this study were measured at room temperature under the atmosphere by a probe station connected with the Keithley 4200−SCS semiconductor parameter analyzer in a dark room. In the ID-VD measurement, the drain bias was swept from 0 to -45 Volts and the gate voltage step were 0, −15, −30,
−45, and −60 Volts, respectively. In the ID-VG measurement, the gate bias ranged from +10 to −60 Volts, and the drain voltage step were 0, −15, −30, −45, and −60 Volts. To investigate into the effective contact resistance, the ID−VD curve was measured by small drain bias sweeping from 0 to −1 Volts and the step at each volt of gate voltage ranging from 0 to −90 Volts.
Chapter 4 THEOREM & ANALYSIS METHOD
4.1 Morphology of Pentacene Thin Films
In our study, the crystal structure and morphology properties of pentacene thin film were investigated by using atomic force microscopy (AFM) and X-ray diffraction (XRD). In this chapter, the analysis methods of AFM images and the theorems of XRD-spectra analysis were investigated.
The characterization of the surface morphology of pentacene thin film was examined by AFM (Digital Instruments NanoScope Dimension D3100 probe microscope system). Each of our images was recorded in tapping mode in air with 1 Hz of scan rate and 256×256 dpi. To examine the post-annealing effect on pentacene grain in channel, in bulk, and in contact area, we prepared pentacene thin-film samples with different thickness: 5, 10, 20, 30, and 60 nm. The value of root-mean-square roughness (Rrms) of film was obtained by analyzing over 3×3 μm2 area using the built-in software of the AFM instrument. Figure 4.1 displays one of the surface morphology from our samples, and a Rrms of 7.599 nm is obtained. Moreover, a program of MATLAB was used to calculate the density of grain boundary. The grain boundaries defined by the
(μm)-1.
(a)
(b) Figure 4.1 (a) The Rrms of this AFM image is 7.599 nm , which was obtained by analyzing
over 3×3 μm2 area using the built-in software of the AFM. (b) The grain boundaries defined by a program of MATLAB. The detail of the program is shown in APPENDIX.
4.2 Pentacene Crystal Structure [5]
The characterization of our pentacene thin film structure was investigated by XRD, which is the direct evidence for the periodic atomic structure of crystals. The specification of XRD is M18 XHF, MacScience. The XRD measurements were performed to 60-nm thick pentacene thin films, and it was operated with Cu-Kα (λ = 1.5406 Å) radiation in a symmetric reflection, coupled θ−2θ mode. Phase identification using XRD relies mainly on the positions of the peaks in a diffraction profile and to some extent on the relative intensities of these peaks. The shapes of the peaks, however, contain additional and valuable information. The shape, particularly the width, of the peak is a measurement of the amplitude of thermal oscillations of the atoms at their regular lattice sites. It can also be a measurement of vacancy and impurity element concentrations and even plastic deformation, any factor which results in a distribution of d-spacings. In the following sections, we will discuss about how we analyze our XRD data.
4.2.1 Pentacene Phase - From Bragg’s Law
The principle of diffraction is described by Bragg’s law, which refers to the simple equation:
hkl hklsin 2d
nλ= θ (4.1) Intensity-peaks represent multiple lattice spacings (d), which can be labeled as (hkl) peaks. Each d corresponds to a specific angle (θ ). λ is the wavelength of the
incident X-ray beam, and n is an integer. A XRD-spectrum consists of the position (2θ) and the intensity of (hkl) peaks. The former implies some information about crystal structures such as size and sharp, and the latter reveals what kind of atoms are included in a film and how these atoms arrange.
One of our pentacene X-ray diffraction (λ = 1.5406 Å) spectra is shown in Figure 4.2. Five intensity-peaks represent multiple dhkl. According to the Bragg’s law, (001) peak at 5.7o corresponds to d001 with value of 15.49 Å.
5 10 15 20 25 30
(005) (004)
(001)
(002)
(003)
2 θ ( deg. )
Intensity (a. u.)
Figure 4.2 The XRD spectrum for 60-nm thick of pentacene thin films. There are five intensity-peaks, (00l), l = 1, 2, …, 5.
Similar result has been reported by C.D. Dimitrakopoulos et al. The value of d001
was found to be 15.4 Å. [4] However, the expected [32-33] single-crystal structure of pentacene in triclinic with a = 7.90 Å, b = 6.06 Å, c= 16.01 Å, α = 101.9 Å, β = 112.6
Å, and γ = 85.8 Å. In such a structure, the (001) plane spacing d001 is ∼14.5 Å.
Obviously, the result of d001 = 15.49 Å is attributed to a phase different with single crystalline phase, called “thin film phase.” The other pentacene phase with (001) peak at 6.1ο is called “bulk phase,” which is closer to the (001) peak of single crystal phase at 6.25ο. Only (00l) peaks are found in pentacene XRD-spectrum with the absence of any other (hkl) peaks, which indicates that all the pentacene crystals in the film are oriented along their (00l) planes parallel to the substrate.
4.2.2 Pentacene Crystal Size - From Scherrer Equation
[34-35]There are two ways to calculate pentacene grain size along c-axis, the Scherrer Equation and Paracrystal Theory. The crystallite size measured by the Scherrer method is given by
cosθhkl
δθ λ
hkl
hkl