• 沒有找到結果。

Organization of the Dissertation

The dissertation is organized as follows: In Chapter 2, we state the studied mathematical models, which include equations of equivalent circuit model,

node equations, and electrical-thermal feedback equations. Then, in Chap-ter 3, we describe the computational techniques for the simulation of DC, time-domain, and electrical-thermal interaction. The characterization method-ology for frequency-domain analysis used in this work is also introduced in this chapter. Besides, the genetic algorithm (GA) for parameter optimization and measurement for intermodulation distortion are briefly explained in Chap-ter 3.

To prove the advantages of our algorithms, we demonstrate the simulated and measured results for HBTs in subsequent chapters: DC simulation and analysis (Chapter 4), time domain simulation and frequency domain analysis (Chapter 5), and intermodulation distortion and power characteristics (Chap-ter 6). Among these chap(Chap-ters, we discuss the results with and without thermal effects. Our simulation results are compared with the outcomes of other simu-lators, such as HSPICE and Agilent ADS, and measured data. The DC, power and distortion characteristics of an multi-finger HBT are also shown in Chap-ter 4 and ChapChap-ter 6.

After the discussion of results, we give the conclusion and some sugges-tions for the future work in Chapter 7. In addition, we represent the MOSFET EKV model and related simulation results in Appendix A and Appendix B to show the capability of our kernel in solving different kinds of devices. Finally, to complete the description of our developed numerical solution algorithms, we further remark on the convergence properties of these algorithms in Ap-pendix C.

Mathematical Models

A

mong modern semiconductor devices, the most widely studied types are bipolar junction transistor (BJT) and field effect transistor (FET).

Though both of these two types of devices are commonly used, the physical principle of them are quite different [42]. Therefore, the formations of equiv-alent circuit model equations have almost nothing in common for these two types of devices. To demonstrate the adaptability of our proposed simulation kernel, we simulate HBT and MOSFET devices with the Gummel-Poon BJT model and the EKV MOSFET model, respectively.

Equivalent circuit models for BJT have been greatly improved since the middle of the twentieth century. The models change with the shift in structure and material of devices [43]-[48]. The Ebers-Moll (EM) model is a well un-derstood large-signal model [49]. This model include main mechanisms for middle level current injection operation of bipolar transistors. By including

8

the concept of internal charge control, the Gummel-Poon (GP) model was in-troduced in 1970. The GP model improves the simulation for low and high level current injection regions. This model also considers the effects such as leakage current at collector-emitter and base-emitter junctions, β-falloff mechanism, and Kirk effect [50]-[52]. Based on EM and GP models, many complex new models have been developed in the past few decades. The re-searchers focus on improving performance for particular characteristics: de-pendency on temperature, 2-D or 3-D geometry factors, substrate and leakage current terms, physical structure and material related parameters, and parasitic terms for high frequency operation. For the GP model, there are three inter-nal nodes in the large-siginter-nal model. The models developed in recent years have more internal nodes for better simulation of new devices. For examples, the High-Current Model (HICUM) [53]-[55] and Most Exquisite Transistor Model (MEXTRAM) [56, 57] have five internal nodes, and the Vertical Bipo-lar Inter-Company model (VBIC) [58]-[60] has six internal nodes. The incre-ment of internal nodes can meet the requireincre-ment for better fit, but also raises difficulties in nonlinear circuit computation and model parameter extraction.

In order to compare with other commercial simulators, such as HSPICE [61]

and ADS [40, 62, 63], we use the most popular GP large-signal model in this work. We can still fit the measurement data well by GP model with proper extracted parameters [64].

Thermal effects influence the behavior of semiconductor devices during

DC or RF operation. Both the ambient temperature and heat generated by de-vice power dissipation can induce thermal effects [65]-[72]. The linearity of the device, which strongly depends on bias condition, can also be affected by the thermal-effects [73]-[77]. We introduce the temperature-dependent terms into the conventional GP model. In the meanwhile, the equations, which ex-press the relation between power dissipation and junction temperature, are formed to construct the thermal-electrical iteration loops. With above addi-tional thermal network, our circuit model can simulate the thermal effects of the multi-finger HBT.

Furthermore, the field effect transistor, such as metal-oxide semiconductor field-effect transistor (MOSFET), is another important kind of semiconductor device. Though the MOSFETs are not the earliest of semiconductor transis-tors, they are the mostly fabricated devices today. There are several famous and popular MOSFET compact models. Two of them are the BSIM and EKV models. The BSIM model was developed by the BSIM Research Group in the Department of EECS at the University of California, Berkeley. In the BSIM model series [78, 79], BSIM3 is the most widely applied MOSFET model in industry today. The latest version of this model is BSIM3v3.2.4, released in December, 2001. However, as the device line width shrinks to 100 nm or nar-rower, the BSIM3 model becomes less precise. The BSIM4, the extension of the BSIM3 model, was developed to address the MOSFET physical behavior in the sub-100 nm regime. Though accuracy is improved, the complexity of

the model greatly increased. This situation challenges the corresponding cir-cuit simulator and extraction procedure of model parameters. A similar trend happens to the EKV model. The EKV MOSFET model was developed by the Electronics Laboratories, Swiss Federal Institute of Technology (EPFL), in Lausanne, Switzerland [80]. The newest version is EKV3.0, announced in 2004, and is based on the surface potential model combined with inversion charge linearization. The number of model parameters in EKV3.0 is less than that in BSIM4, but it is still difficult to solve this model. For the simulation demonstrated in Appendix B, we list model equations of the EKV model ver-sion 2.6 in Appendix A. The EKV2.6 is the previous verver-sion of EKV model.

We use it in order to compare our solver with HSPICE solver, which has the EKV2.6 model.

In this chapter, the equivalent circuit of GP model and parameters of both electrical and thermal models will be described first. Then, we write the equa-tions of the electrical and thermal models. The internal and external node equations of circuits used in this dissertation are formed in the third section.

Finally, we give a brief summary of this chapter.

2.1 Equivalent Circuit and Parameters of GP Model

Figure 2.1: An illustration of Gummel-Poon large-signal equivalent circuit model for the bipolar transistor.

Figure 2.1 shows the equivalent circuit of a GP large-signal bipolar junc-tion transistor. The model includes internal nodes: C, B, and E, and external nodes: CX, BX, and EX. The capacitance terms of this model are:

1. Base-emitter junction capacitance, CJE,

2. Intrinsic portion of collector-emitter junction capacitance, CJCI,

3. Extrinsic portion of collector-emitter junction capacitance, CJCX,

Notation Description Unit

IS Transport saturation current A

BF Ideal maximum current gain in forward-active mode

-NF Ideality factor of the forward current

-BR Ideal maximum current gain in reverse-active mode

-NR Ideality factor of the reverse current

-ISE Base-emitter leakage current A

NE Ideality factor of the base-emitter leakage current

-ISC Base-collector leakage current A

NC Ideality factor of the base-collector leakage current -IKF Corner for the forward beta high-current roll-off A IKR Corner for the reverse beta high-current roll-off A

RB Zero bias base resistance Ω

RE Emitter resistance Ω

RC Collector resistance Ω

CJEO Base-emitter zero bias junction capacitance F VJE Base-emitter junction built-in potential V MJE Base-emitter junction exponential factor -CJCO Base-collector zero bias junction capacitance F VJC Base-collector junction built-in potential V MJC Base-collector junction exponential factor -XCJC Factor for intrinsic part of the basecollector capacitance

-TF Ideal forward transit time Sec

XTF Pre-coefficient for bias dependence of TF

-VTF Coefficient of VBCdependence of TF V

ITF Coefficient of ICdependence of TF A

TR Reverse transit time Sec

FC Coefficient for forward-bias capacitance formula -M Multiplier factor for the transistor connection

-Table 2.1: A list of BJT GP model parameters.

4. Diffusion capacitance of the charge due to forward active current, CDF,

5. Diffusion capacitance of the charge due to reverse active current, CDR.

The current terms, I1, I2 and ICT are the intermediate current variables.

With these terms, we can calculate the base, collector and emitter currents.

The remaining current terms, IBL1 and IBL2, are the leakage currents of the base-emitter and base-collector junctions, respectively. Furthermore, qbis the ratio of the base charge QBto the equilibrium base charge QB0.

Notation Description Unit

Ea First bandgap correction factor eV/K

Eb Second bandgap correction factor K

XTI Temperature exponent for IS

-XTB Temperature exponent for BF and BR -BB Fitting parameter for the thermal conductivity

-Table 2.2: A list of parameters for thermal effects modelling.

The GP large-signal model used in this work involves 28 parameters. The purpose of these parameters can be separated into several groups. The IS, BF, NF, BR and NR are the main parameters for the forward and reverse current terms. The leakage current related parameters include ISE, NE, ISC and NC. IKF and IKR are introduced to model the high current region of BJT operation. The internal resistance terms include RB,RC and RE. There are seven parameters: CJEO, VJE, MJE, CJCO, VJC, MJC and XCJC, used for junction capacitance of the model. Finally, the fitting parameter FC and the multiplier factor M are also included in this model. For M connected

identical devices, the parameters with current or capacitance units are multi-plied by M. On the other hand, the parameters with resistance units should be divided by M. A detailed description of parameters and their units are shown in Table 2.1

We also include five important parameters to simulate thermal effects.

They are Ea, Eb, XTI, XTB and BB. Descriptions for these are listed in Table 2.2.