DirectionalCoupler
Power
DirectionalCoupler
Power
Figure 3.13: A setup of on-wafer device testing with harmonic load-pull system.
The intermodulation distortion measurement in this work is accomplished by the harmonic load-pull system. The equipment setup for on-wafer testing is shown in Fig. 3.13. The load-pull measurement is useful for power char-acterization of the large-signal operated, nonlinear devices [52],[99]-[102].
The load-pull system has two sets of tuners, which are input tuners for the
”source pulling” and output tuners for the ”load pulling”. In order to mea-sure a device-under-test (DUT) in actual operating conditions. The calibration
for measuring the available input power at the power source reference plane and the coupling value of the directional coupler should be done before out-put power and gain measurement. With considering the dissipative loss of all tuners (and probes in on-wafer measurement) and reflected power at the source, one can get the power and gain values at the DUT reference planes.
Once we can get the real power and gain, the DUT will be measured under different source and load impedance. Based on above measurement data, the contours for source pull and load pull can be plotted. The source pull contours are measured and calculated in the same way of the load pull contours. In our measurement, we choice the max gain matching for source impedance and the max power matching for load impedance form the contours. After calibrat-ing and optimum impedance matchcalibrat-ing, we can perform measurement for the output power with variant input power. The power of the third order inter-modulation products (IM3) is detected by the spectrum analyzer as shown in Fig. 3.13. Finally, ”one” OIP3 value can be calculated by the values of out-put power at fundamental frequencies and IM3 products. Unfortunately, once the bias condition is changed, the matching condition should be tuned again because of the device nonlinearity. There is one more thing that should be noticed in the measurement, the DUT oscillation. Once the DUT begins to oscillate, power gain becomes almost meaningless. These oscillation is usu-ally caused by high level bias and RF input signal excitation with poor source
matching. For a HBT device with high voltage base bias, the oscillation hap-pens easily and can bring second breakdown in our experience. The measure-ment for RF characteristics should be done with carefulness and passion, so that the measured data could be useful to the research.
3.5 Summary of This Chapter
In this chapter, we stated all numerical algorithms and computation techniques used in this study. Besides, the measurement procedure was also described simply in the last section. Here, we summarize this chapter as:
• algorithms for solving the system algebraic equations (DC node equa-tions).
• large-signal time-domain solution algorithm with WR, MI, and RK meth-ods.
• algorithm with electrical-thermal feedback,
• GA for parameter extraction and optimization,
• discrete Fourier transform,
• calculation for intermodulation distortion analysis, and
• measurement for intermodulation distortion.
With utilization of above numerical methods and measurement skill, we can perform our simulation and compare our results with measured data in the following chapters.
Additionally, we present the convergent characteristics of the algorithms mentioned above in Appendix C. These convergence properties can further illustrate the efficiency of the numerical methods used in this study.
DC Simulation and Analysis
I
n this chapter, DC simulation results are presented and discussed. For our proposed simulation algorithm to solve time-domain large signal circuits, the accuracy of DC simulation is an important fundamental. By solving the node equations without time dependency, we can get the DC solutions of the circuit as the initial conditions for the time domain simulation. Therefore, DC simulation results are discussed in this chapter before others of our work. An InGaP hetero-junction bipolar transistor (HBT) device with no thermal effect is simulated and measured in the first section of this chapter. Comparison between the results of measurement and HSPICE simulation shows the pro-posed method has a very good accuracy. Next, we demonstrate the simulation answers for DC I-V curves of an HBT with self-heating effect. In the third section, we calculate the junction temperatures, collector currents and collec-tor current density of a multi-finger HBT device. The effects of self-heating72
and thermal coupling among fingers have been considered for those simula-tion results as shown in this secsimula-tion. Lastly, we summarize the contents of this chapter.
4.1 DC Simulation
-Table 4.1: A set of extracted parameters for Gummel-Poon model used in this study.
An NPN InGaP HBT device is fabricated and measured in this work. The schematic cross section of this HBT structure is shown in Fig. 4.1 [103].
The epitaxial wafer of this HBT is grown by metal-organic vapor deposition (MOCVD). The main epitaxial structure consists of:
• an emitter cap for ohmic contact, including: an In0.6Ga0.4As layer
(500-˚A, n+ > 1019 cm−3), a gradient layer from In0.6Ga0.4As to GaAs
(500-˚A, n+ > 1019cm−3), and a GaAs layer (1200- ˚A, n+ = 4 × 1018cm−3),
• an In0.49Ga0.51P (400- ˚A) emitter with silicon-dopant (3 × 1017cm−3),
• a GaAs (1200- ˚A) base with carbon-dopant (4 × 1019cm−3),
• a GaAs (1-µm) collector with silicon-dopant (3 × 1016cm−3), and
• a GaAs (5500- ˚A) sub-collector with silicon-dopant (5 × 1018cm−3).
Emitter Cap (n+-GaAs)
Base (p+-GaAs) Emitter (n-InGaAs)
Sub-Collector (n-GaAs)
Collector Contact Collector Contact
Base Contact Base Contact
Emitter Contact
Collector (n--GaAs) Emitter (n-InGaAs)
Figure 4.1: A cross section view of an InGaP HBT.
We simulate this HBT as a one-finger device without the consideration for any thermal effects. Figure 4.2 shows the simulation circuit of IC−VBE and IB−VBE curves. Where, IC, IB, and VBE represent the collector current, base current, and base-emitter voltage, respectively. The value of parameters used for the simulated device are listed in Table 4.1.
VBE
Figure 4.2: The used circuit in the simulation of IC−VBE and IB−VBEcurves.
Line: Proposed Simulation Method Symbol: HSPICE
IC
IB
Figure 4.3: Comparison of Gummel plot between the simulated results of HSPICE and our proposed method with the same device parameters.
Here, we should note that the multiplier factor M is set to be 104. Which means we treat 104 fingers as 104 identical isolated one-finger devices; and their homologous terminals are shunted together in this simulation case.
V
CEEX CX BX HBT
I
BI
CFigure 4.4: The used circuit in the simulation and measurement of IC−VCE DC curves.
As shown in Fig. 4.3, which is named Gummel Plot, the comparison has been done between simulated results by feeding the benchmark parameters and biases into our and HSPICE simulator. Both of them have consistency in the DC conditions.
In the following, Fig. 4.4 shows the circuit for the family curves of this HBT. VCE denotes the collector-emitter voltage. The calculated results by our simulator as shown in Fig. 4.5 are quite in agreement with the measurement data under different input base current, IB.
In the simulation for a one-finger NPN HBT device, the results of our sim-ulator can stand comparison with those of HSPICE simsim-ulator. With a proper set of parameters, our results can also meet the DC measurement data well.
From above reasons, our DC simulation will provide accurate initial condi-tions for solving time-domain circuits.
VCE (V)
0 1 2 3 4
IC (A)
0.000 0.001 0.002 0.003
Line: Simulation
Symbol: Measurement IB = 0.03 mA
0.02 mA
0.01 mA
0.00 mA
Figure 4.5: Comparison between our simulated results and measured results for IC−VCEcurves of the InGaP HBT.