There are six chapters in this dissertation. Chapter 1 shows the overview of the high-k gate dielectrics. Motivation for the thesis is also described.
In chapter 2, the improved thermal stability including leakage current, breakdown voltage and thermal stability of the HfO2 gate dielectrics with fluorine implantation was demonstrated while maintaining the effective oxide thickness (EOT) of 2.5 nm. In addition, the decrease of the stress induce leakage current (SILC) and charge trapping characteristics elimination were also indicated. The reduction of bulk and interface defects by fluorine implantation will contribute to the improved characteristics of HfO2 gate dielectrics.
On the other hand, the current transportation mechanism of HfO2 gate dielectrics with TaN metal gate and silicon surface fluorine implantation (SSFI) is investigated.
Based on the experimental results of the temperature dependence of gate leakage current and Fowler–Nordheim tunneling characteristics at 77 K, we have extracted the current transport mechanisms and energy band diagrams for TaN/HfO2/IL/Si structures with fluorine incorporation, respectively. In particular, we have obtained the following physical quantities: i) fluorinated and as-deposited IL/Si barrier heights (or conduction band offset): 3.2 eV & 2.7 eV; ii) TaN/ fluorinated and as-deposited HfO2 barrier height: 2.6 eV & 1.9 eV; and iii) effective trapping levels at 1.25 eV (under both gate and substrate injections) below the HfOF conduction band, 1.04 eV (under gate injection) and 1.11 eV (under substrate injection) below the HfO2
conduction band, which contributes to Frenkel–Poole conduction.
In chapter 3, we discussed that the fluorine atoms were incorporated into HfO2
thin film by CF4 plasma treatment to form the fluorinated HfO2 gate dielectrics. At first, the effects of pre-CF4 plasma treatment on Si for sputtered HfO2 gate dielectrics are investigated. The Hf-silicide would be suppressed and Hf-F bonding was observed for the CF4 plasma pre-treated sample. Compared with the as-deposited sample, the
effective oxide thickness was much reduced for the pre-CF4 plasma treated sample due to the elimination of the interfacial layer between HfO2 and Si-substrate. These improved characteristics of the HfO2 gate dielectrics can be explained in terms of the fluorine atoms blocking oxygen diffusion through the HfO2 film into the Si substrate.
Second, we demonstrated high-performance HfO2 gate dielectrics fluorinated by postdeposition CF4 plasma treatment. The secondary ion mass spectroscopy results proved that there was a significant incorporation of fluorine atoms at the interface between the HfO2 thin film and Si-substrate. The improvement of gate leakage current, breakdown voltage, capacitance-voltage (C-V) hysteresis phenomenon and charge trapping characteristics was observed in the fluorinated HfO2 gate dielectrics without an increase in interfacial layer thickness. A physical model was presented to explain the improvement of hysteresis phenomenon and the elimination of charge trapping of the fluorinated HfO2 gate dielectrics. Besides,
In chapter 4, a novel high-performance and excellent-reliability HfOF nMOSFET was demonstrated. Large ION/Imin current ratio (~6.69×107), good S. S.
(~76 mV/dec), small DIBL (<20 mV), and high mobility (~165 cm2/V．s) can be observed for the HfOF nMOSFETs. The HfOF nMOSFET has better HfO2/Si interface and dielectric quality, including GIDL current and less PBTI effect.Reduced GIDL current was observed for the HfOF nMOSFET due to HfO2/Si interface passivation by fluorine, resulting in less hole-electron pair generation. The fluorine incorporation into HfO2 gate dielectrics effectively passivated the dielectric vacancies, resulting in a deeper trapping cross section and a lower concentration of generated traps.
In chapter 5, high-performance CESL strained nMOSFET with HfO2 gate dielectrics has been successfully demonstrated. It is found that the transconductance (gm) and driving current (Ion) increase 70% and 90% for device with a 300 nm capping
nitride layer. A superior HfO2/Si interface for CESL-devices is observed, demonstrated by an obvious interface state density reduction (6.56×1011 to 9.85×1010 cm-2). The CESL-device has better HfO2/Si interface and dielectric quality, including less charge pumping current (90% reduction) and less PBTI effect (55% reduction).
Further, the effects of the CESL layer to the high-k without trapping behaviors are investigated by the pulse-IV technique for the first time. A roughly 50% and 60%
increase of gm and Ion, respectively, can be achieved for the 300 nm CESL HfO2
nMOSFET under pulsed-IV measurement.
Finally, in chapter 6, the conclusions are made and the recommendation describes the topics which could be further researched.
Fig. 1.1 Measured (dots) and simulated (solid lines) tunneling currents in thin-oxide nMOSFETs. The horizontal dashed line indicates a tunneling current level of 1 A/cm2.
Fig. 1.2 Bandgap and band alignment of high-k dielectrics with respect to siliocn.
Chapter 2
Characteristics of HfO2 Gate Dielectrics with Fluorine Implantation
2-1 Characteristics of Fluorine Implantation for HfO2 Gate Dielectrics with High Temperature Annealing
2-1.1 Introduction
According to the International Technology Roadmap for Semiconductors projection, an equivalent oxide thickness of less than 1.0 nm will be needed for sub-65-nm MOSFET devices [2.1]. Due to the high tunneling leakage current, scaling of SiO2 below 1.0 nm with acceptable leakage current level is very difficult. Recently, high-dielectric-constant (high-k) oxide thin films are attracting great interest as replacement for the nitrided-SiO2 gate oxide film [2.2]-[2.5]. The various extrinsic gate dielectrics Ta2O5 , Y2O3, ZrO2, TiO2 , SrTiO3 , BaSrTiO3 (BST), and HfO2 have been investigated extensively. Among these high-k gate materials, HfO2 gate dielectrics [2.6]–[2.9] are the most promising candidates being studied due to its high dielectric constant (25~30), wide energy bandgap (~5.68 eV), and high stability with the Si surface. However, the thermal stability is still a challenge for the HfO2 due to the crystallization during the integration thermal processes. It will result in the degradation including dielectric constant lowing, gate leakage current increase and breakdown voltage decrease that limit low power application and cause reliability problems [2.10]-[2.11]. Appropriate fluorine incorporation into gate oxide films has proposed to improve breakdown-distribution tails in Weibull plots, while maintaining both Si/SiO2 interface characteristics [2.12] and the interfaces of the fluorinated oxide are more resistant to radiation damage [2.13].
In this work, for the first time, fluorine atoms were ion implanted into the HfO2/Si interface to improve the thermal stability of the HfO2 gate dielectrics. It improved the characteristics including leakage current, breakdown voltage and thermal stability while maintaining the effective oxide thickness (EOT) of 2.5 nm. The property of the capacitance-voltage for HfO2 gate dielectrics with high temperature annealing was also improved after fluorine incorporation. In addition, the decrease of the stress induce leakage current (SILC) and charge trapping characteristics elimination were also indicated. The reduction of bulk and interface defects by fluorine implantation will contribute to the improved characteristics of HfO2 gate dielectrics.
2-1.2 Experiment
The devices used in this work were MOS capacitors fabricated on p-Si (100) wafers. Fluorine ions were implanted through 30 nm screen oxide films at a low energy of 25 keV, in order to prevent implantation damage. The implanted fluorine dosage ranged from 1×1013/cm2 to 1×1015/cm2, respectively. Then, annealing in an N2
ambient at 850℃ for 30 minutes was performed to remove the implant-induced damage and, at that time, the fluorine atoms diffused into silicon surface. Then, HfO2
was deposited by reactive RF sputter method. For thermal stability study, all samples were examined by the rapid thermal annealing in the N2 ambient for 30 seconds at temperatures of 700, 800 and 900℃, respectively. The 300 nm thick Aluminum film was evaporated for top and bottom electrode to form the MOS capacitors by thermal evaporator. The process flow was schematic and summarized in Fig. 2.1.
The electrical properties were analyzed by HP 4285 for capacitance-voltage (C-V) characteristics at 100 kHz, and the effective oxide thickness (EOT) was extracted from the capacitance under the accumulation region without considering the quantum
effect. The current-voltage (I-V) curves were measured by HP 4156C. In addition, the fluorine concentration was measured by secondary ion mass spectroscopy (SIMS).
Moreover, the physical thickness was checked by a transmission electron microscopy (TEM) to obtain the dielectric constant. The X-ray Diffraction (XRD) analysis was used to realize the crystallization phenomenon of the HfO2 thin film.
2-1.3 Results and discussion
A typical fluorine profile, for the samples with F dose of 1 x 1013 /cm2 and 1 x 1015 /cm2, measured by secondary ion mass spectroscopy (SIMS) was shown in Fig.
3.2. The fluorine concentration was increased with increasing the dosage of fluorine implantation. The transmission electron microscopy (TEM) image of the sample with fluorine incorporation (F dose 1 x 1015 /cm2) was illustrated in the inset of Fig. 2.2.
The physical thickness of the HfO2 film is 4.7 nm and an interfacial layer of 2.9 nm formed between the HfO2 thin film and the Si-substrate was also observed in this figure. Besides, the other interfacial layer was formed between the HfO2 thin film and the Al-gate. The effective dielectric constant derived based on the physical thickness, including the interfacial layers, is about 15. We can also observe that the fluorine atoms were accumulated mainly at the interfacial layer for the sample with F dose of 1 x 1015 /cm2. Therefore, we suggest that after fluorine implantation, the fluorine atoms would accumulate at the surface of the Si substrate, and then distributed into the bulk of HfO2 thin film after annealing, as shown in Fig. 2.3. The incorporated fluorine will replace the hydrogen bond and terminate the dangling bond. Figure 2.4 (a) and (b) has shown the X-rays diffraction (XRD) patterns of 50 nm thick HfO2 and HfOxFy films, respectively. The HfO2 films with fluorine implantation would not be crystallized after 700oC post-deposition annealing (PDA). This result suggested that
the fluorine incorporation could restrain the crystallization for HfO2 films with 700oC PDA treatment. Besides, for the HfO2 films with 800°C PDA, we observed a weak degree of crystallization; on the other hand, for the as-deposited sample annealed above 800°C, a well crystallized structure with an HfO2 (111) orientation was observed.
Fig. 2.5 shows the capacitance-voltage (C-V) curves of the HfO2 films with and without fluorine implantation and 900oC annealing. The large flat band voltage shift of the HfO2 films without annealing was obtained due to the plasma damage induced by sputtering of the thin films. After 900°C annealing, the flat band voltage would be improved as shown in this figure. This post-deposition RTA process will reduce the flat band voltage and dense the thin film. Furthermore, the C-V distortion of the HfO2
films with only RTA process was observed at the high negative gate bias owing to the crystallization induced leakage current. The high thermal stability in the EOT change was obtained for the fluorine-implanted samples as shown in Fig. 2.6. After high temperature annealing, the EOT of the sample without fluorine implantation was much thicker than the HfO2 films with fluorine implantation. We also observed that the thermal stability in EOT was significantly improved with increasing the fluorine implantation dosage. The EOT of the sample without fluorine implantation was increased with increasing PDA temperature for about 2.7 Å, whereas the EOT increase was suppressed to less than 0.3 Å for the F-implanted sample (1°1015 cm-2).
Fig. 2.7 shows the gate current density versus the gate voltage (J-V) characteristics of all samples with and without 900°C RTA annealing. As we can see, the gate leakage current of the sample without fluorine implantation was much larger than the films with fluorine implantation. Not only the leakage current but also the breakdown voltage was improved for the sample with fluorine incorporation. The characteristics were improved with increasing the fluorine implantation dosage as illustrated in this
figure. In addition, the HfO2 films with fluorine implantation exhibit superior thermal stability in gate leakage as shown in Fig. 2.8. With the increase of the annealing temperature, the increase of gate leakage current of the fluorine-implanted samples was significantly diminished. This indicated that the fluorine incorporation reduces the defect density at the bulk HfO2 film and the HfO2/IL interface. The thermal stability of the relationship between gate leakage current density at VG = VFB -1 V and capacitance equivalent oxide thickness was shown in Fig. 2.9. The gate leakage current for the sample without fluorine implantation was much higher than the sample with fluorine implantation while the EOT is the same for all these three samples with 700°C PDA. Besides this, the gate leakage current of all samples was increased as the PDA temperature increasing. The leakage current of the control sample with high temperature (900°C) PDA was much larger than that of the samples with fluorine implantation as illustrated in this figure. The gate leakage current density of the sample with 1°1015 cm-2 F-implantation, was three orders improved as compared to the control sample with PDA at 900°C. This indicated that the thermal stability was much improved after the fluorine incorporation. The same tendency was shown in the performance of the equivalent oxide thickness (EOT). Even after PDA at 900 °C, low EOT (25.4 Å) was obtained while keeping the leakage current less than 0.1 mA/cm2 for the HfO2 films with SSFI. The superior thermal stability of the F-incorporated HfO2 gate dielectrics can be explained by the Si-H bond being replaced by Si-F and strengthened the interface quality of HfO2/Si interface.
Fig. 2.10 shows the stress induce leakage current (SILC) characteristics of the HfO2 films without post-deposition RTA process. We can find that the gate leakage current increases with the stress time. This increase of leakage current in the low field region is due to the trap assisted tunneling process, which is analogous to the stress induced leakage current (SILC) in SiO2 [2.14]. Compared to the sample without
fluorine implantation, the HfO2 films with fluorine implantation present small SILC current, which is due to the defect density being reduced as shown in Fig. 2.11. The gate leakage current of the HfO2 films without post-deposition RTA process increase under stress was reduced with increasing the dosage of the fluorine implantation as indicated in Fig, 2.11. Therefore, the fluorine incorporation would improve the charge trapping effect in HfO2 gate dielectrics [2.15]. Fig. 2.12 demonstrates the charge trapping characteristics of these samples without post-deposition RTA process under constant current stress (CCS) at Jg = -1.3 x 10-4 A/cm2. The hole trapping was observed for all samples as shown in this figure, and was effectively suppressed for the F-incorporated HfO2 gate dielectrics. In addition, the reduced gate voltage shift is obtained for the increased dosage of the fluorine implantation. This reduction of charge trapping indicates that the characteristics for the HfO2 thin film were improved after the fluorine implantation at the silicon surface. The physical model of fluorinated HfO2 gate dielectrics was proposed to explain the charge trapping reduction as shown in Fig. 2.13. Both the electron and hole trappings occurred in the HfO2 thin film under constant voltage stress but located at different side of the HfO2
gate dielectrics. The electron trapping takes place in the HfO2 layer, while the positive charge (hole) is generated close to the HfO2/Si interface where a lot of defects are presented [2.16]. We believe that the more defect density at the HfO2/Si interface than the bulk HfO2 film for the sample without fluorine implantation resulted in the hole trapping and indicated in Fig. 2.13(a). For the SSFI HfO2 gate dielectrics, the fluorine atoms will distribute in the interface between the HfO2 film and silicon substrate.
Therefore, the hole trapping was effectively reduced, and then resulted in the less hole trapping observed at the fluorinated HfO2 gate dielectrics as illustrated in Fig. 2.13(b).
2-1.4 Summary
In summary, an approach to improve the thermal stability of the HfO2 by fluorine ion implantation at the silicon surface was proposed and systematic studied.
The HfO2 thin film with fluorine implantation was not crystallized and performed superior thermal stability even after high temperature annealing. This must be owing to the elimination of interface dangling bonds and the bulk traps for the HfO2 films with pre-deposition fluorine implantation and post-deposition annealing. Besides, the charge trapping characteristics of SSFI HfO2 gate dielectrics was studied and effectively improved for the samples with SSFI. This fluorinated technology could be used on HfO2 thin films for future ULSI application.
Fig. 2.1 The key processes in this work for (a) sample without fluorine implantation and (b)
Fig. 2.2 The SIMS depth profile of MOS with fluorine implantation (dose : 1 x 1015 /cm2) structure for fluorine. The peak value for fluorine is located at the interface of HfO2 and silicon substrate. The inset figure is the TEM of MOS structure with fluorine (dose : 1 x 1015 /cm2) implantation.
Fig. 2.3 The physical model for the distribution of the fluorine atoms. The fluorine atoms would diffuse into the HfO2 thin film after thermal annealing.
(a)
(b)
Fig. 2.4 The XRD data for (a) as-deposited sample and (b) the samples with fluorine implantation with different PDA temperature, respectively. The sample without fluorine implantation was crystallized after 700℃ PDA.
Fig. 2.5 The C-V curves for all samples. The flat band voltage shift positively after 900℃
annealing.
Fig. 2.6 The thermal stability in EOT for all samples. The EOT increase is much smaller for the sample with fluorine implantation.
Fig. 2.7 The J-V curves (gate leakage current) for all samples. The leakage current was reduced for sample with fluorine implantation, especially in the condition for 900 ℃ annealing.
Fig. 2.8 The gate leakage current density at Vg = -2V for all samples with different annealing temperature. The thermal stability was much improved after fluorine implantation.
Fig. 2.9 The relationship of the thermal stability between the gate leakage current density (at Vg = -2 V) and the capacitance equivalent oxide thickness for all samples with the different annealing temperature.
Fig. 2.10 The stress induce leakage current (SILC) characteristics of the as-deposited and the sample with fluorine implantation under negative current stress (– 1.3 x 10-4 A/cm2).
Fig. 2.11 The gate leakage current of stress induce leakage current (SILC) for all samples under constant current stress (– 1.3 x 10-4 A/cm2).
Fig. 2.12 Charge trapping characteristics of the as-deposited and fluorine implanted samples with under constant current stress (– 1.3 x 10-4 A/cm2).
Fig. 2.13 The physical model of charge trapping mechanism under constant current stress for (a) as-deposited sample, (b) fluorine incorporated sample.
2-2 Current Transport Mechanism of TaN/HfO2/IL/Si Structure with Silicon Surface Fluorine Implantation (SSFI)
2-2.1 Introduction
High-k gate dielectrics, as an alternative to conventional SiO2 gate oxide, are widely investigated for their capability to reduce gate-leakage current for the same electrical capacitance [2.17]–[2.19]. Among all high-k gate materials, hafnium-based dielectrics are considered the most promising candidates, or at least the most studied, due to their excellent thermal stability, wide bandgap, and high dielectric constant [2.20]-[2.22]. Nevertheless, the metal-gate electrode has also attracted attention as a solution to the polydepletion effect that appears under gate inversion conditions in poly-Si gates, and the incompatibility between some high-k materials and poly-Si [2.23]. As a result, metal gate/high-k stacks have been heavily explored in recent years [2.23]-[2.26].
However, HfO2 gate dielectrics with fluorine incorporation could also exhibit better dielectric performance and reliability [2.27]-[2.31]. F incorporation into HfSiON dielectric has been shown to be highly effective in lowering Vth and improving NBTI in pFET, and the drive current could be aggressively increased [2.27]. F is believed to form stronger Hf-F and Si-F bonds than Hf-H and Si-H bonds, which improves the reliability of HfO2/SiO2 [2.28]. Recently, we have also documented several studies of ultra-thin fluorinated HfO2 gate dielectrics. First, the thermal stability of HfO2 gate dielectrics can be much improved by fluorine ion implantation on the silicon surface [2.32]. Second, the interfacial layer (between HfO2
film and Si-sub.) formation can be effectively suppressed by pre-CF4 plasma treatment [2.33]. Third, the charge trapping phenomenon can be largely eliminated for the HfO2 gate dielectrics fluorinated by postdeposition CF4 plasma treatment [2.34].
Although several recent studies have investigated fluorinated HfO2 gate dielectrics
Although several recent studies have investigated fluorinated HfO2 gate dielectrics