Organization of the Thesis

The investigation includes five chapters. In chapter 1, we make an introduction to describe the issues of gate material we may meet during the dimensions scaling down. And we would talk about using Cu gate to overcome the problems we met in conventional polysilicon gate MOSCAPs. Then, the requirements of diffusion barrier layer to block Cu ions

diffusion were discussed.

In chapter 2, we will investigate the process procedures, measurement methods of electrical properties, and the methods of material analysis.

In chapter 3, we will investigate the electrical properties and reliability of the Cu gate MOSCAPs with different thickness of HfN diffusion barrier. The electrical properties and reliability comparison of TaN and HfN diffusion barrier will discussed in this chapter, too.

In chapter 4, we will investigate the thermal stability of Cu gate MOSCAPs with 28-nm-thick HfN diffusion barrier. The electrical properties and reliability of the MOSCAPs annealed in different annealing temperature will be compared in this chapter.

Finally, in chapter 5, we will make a conclusion in the whole thesis. We will also recommend the best condition for the Cu gate MOSCAPs with HfN diffusion barrier.

Chapter 2

Experimental Procedure

2.1 Standard process

Cu/HfN/SiO2/p-Si MOS capacitors (MOSCAPs) of an area of 4.45×10^-4 cm² were fabricated on 6-inch p-type (100)-oriented Si wafers, which with resistivity of 15-25 Ω-cm.

Fig. 2-1 shows the key process flow of this structure. All wafers were initially cleaned by RCA (Radio Corporation of America) clean process. And 10-nm thermal gate oxide was subsequently deposited on the Si wafers by furnace at 925°C. Afterwards wafers were split

into three groups. Different thickness of HfN films from 20 nm to 60 nm were then deposited on first group of the samples through the metal mask as the Cu diffusion barrier by sputtering.

The sputtering condition is Ar/N2 = 60/1.5 sccm mixed gas ambient and at a sputtering DC power of 200 W. The total gas pressure was kept at 7.6×10^-3 torr during the HfN sputtering

process. Immediately, 300-nm-thick Cu was deposited on these samples as gate electrode.

34-nm-thick TaN film was deposited on the second group of the wafers, and the sputtering condition is in the same manner with the first group of wafers with HfN diffusion barrier.

300-nm-thick Cu film was subsequently deposited on TaN as the gate electrode. The Cu film is directly deposited on the last group of wafers as the control (no barrier) samples. Finally, all

wafers received a 500-nm-thick Al deposition on the wafer backside by the thermal coater to form the ohmic contact.

2.2 Thermal treatments

Cu/HfN/SiO2/p-Si MOSCAPs with 28-nm-thick HfN were fabricated to study the thermal stability of the HfN diffusion barrier and the reliability of Cu gate MOSCAPs. After standard process, the Cu/HfN/SiO2/p-Si MOS capacitors were treated by furnace at 400~600°C for 30 minutes in N2 ambient.

2.3 Measurements

2.3.1 Electrical measurements

Capacitance-Voltage (C-V) characteristics were measured by the Agilent-4284A precision LCR system, and the equivalent oxide thickness (EOT) was estimated by the high frequency (100 KHz) capacitance versus voltage curves in the strong accumulation region.

Current-Voltage (I-V) characteristics were measured by the Keithley Model 4200-SCS semiconductor characterization system.

2.3.2 Time dependent dielectric breakdown (TDDB), lifetime & charge to

breakdown (Q

BD

) measurements

Constant-Voltage-Stress (CVS) was conducted to evaluate reliability. The measurements were performed at room temperature, and the voltages of -13.6V, -13.9V, and -14.2V were applied to the capacitors. In Fig. 2-2, the dielectric breakdown was defined at the point which current density increases more than three orders of magnitude. The lifetime was extracted from the 63% of the time to breakdown in the CVS measurements with different voltages mentioned above. The QBD was calculated from the integrated current density before dielectric breakdown.

2.3.3 Bias temperature stress (BTS) measurements

To investigate the thermal stability of HfN films as the Cu diffusion barrier, BTS measurements were utilized to define the mobile ion quantity in the dielectric by the flat band voltage shift. The BTS measurements were performed at +1MV/cm for 1000 sec with temperatures of 50°C, 100°C, and 150°C.

2.3.4 Elevated temperature measurements

To investigate the conduction mechanism and the electrode work function variation of Cu/HfN/SiO2/p-Si MOSCAPs with 28-nm-thick HfN after different temperature treatments.

I-V characteristics with various temperatures were measured at room temperature, 50°C, 75°C, 100°C, 125°C, and 150°C.

2.3.5 Material analysis

Scanning Electron Microscopy (SEM) was used to determine the exact thickness of HfN diffusion barrier. Secondary-Ion-Mass-Spectrometer (SIMS) was used to evaluate the Cu diffusion barrier efficiency of the HfN films.

Chapter 3

Electrical Characteristics and Reliability of Copper Gate MOSCAPs with HfN Diffusion Barrier

3.1 Electrical characteristics of Cu gate MOSCAPs with different thickness of HfN

Fig. 3-1 to Fig. 3-4 shows the SEM pictures of different thickness of HfN diffusion barrier. We can define the physical thicknesses of HfN diffusion barrier by these pictures as 20 nm, 25 nm, 42 nm, and 60 nm. Fig. 3-5 is the comparison of C-V curves for Cu gate MOSCAP with different thickness of HfN diffusion barrier. In this figure we can find an obviously flat band voltage shift between no barrier control sample and HfN diffusion barrier samples. The flat band voltage shift is caused by the work function difference of Cu and HfN.

The ideal work function of Cu is about 5.1 eV and that of HfN is about 4.65 eV. The comparison of I-V curves of Cu gate MOSCAP with different thickness of HfN diffusion barrier is shown at Fig. 3-6. In this figure, we can find the leakage currents of different thickness of HfN diffusion barrier and no barrier control samples are almost at the same level around the low voltage bias region. But there seems a little difference at the region neighboring breakdown voltage. So we make a Weibull plot of effective breakdown field

(EBD(eff)) in Fig. 3-7. In the Weibull plot, we can see that the absolute value of EBD(eff)

distribution for no barrier control sample is larger than that for the other samples with HfN diffusion barrier. The EBD(eff) for Cu gate MOSCAPs with 20-nm-thick HfN diffusion barrier is smaller than that for Cu gate MOSCAPs with 25-nm-thick and 60-nm-thick HfN diffusion barriers. Cu diffusion into the dielectric and influence on the EBD(eff) are perhaps the reasons why the EBD(eff) for 20-nm-thick HfN is smaller than the other two samples. For no barrier control sample, the quantity of diffusion of Cu ions is random. Thus, the degree of influence of EBD(eff) for Cu ions is random in different MOSCAPs. By this reason, the EBD(eff)

distribution of control sample in Weibull plot is larger than the other HfN diffusion barrier samples.

3.2 Reliability of Cu gate MOSCAPs with different thickness of HfN

The charge to breakdown was measured at applied biases of -13.6V, -13.9V, and -14.2V on the gate electrode. The exhibitions of charge to breakdown at these voltage biases are almost the same. So we compare the charge to breakdown for different thickness of HfN diffusion barrier at voltage biases of -13.6V. Fig. 3-8 is the Weibull plot of the charge to breakdown for Cu gate MOSCAPs with 20-nm-thick to 60-nm-thick HfN diffusion barriers and no barrier control sample. On the Weibull plot of the charge to breakdown for Cu gate

MOSCAPs with 25-nm-thick to 60-nm-thick HfN diffusion barrier, the values of the charge to breakdown are almost the same. As to no barrier control sample, the charge to breakdown is apparently smaller than the other samples with HfN diffusion barrier. We can also find that the charge to breakdown for Cu gate MOSCAPs with 20-nm-thick HfN diffusion barrier is smaller than that for the Cu gate MOSCAPs with 25-nm-thick to 60-nm-thick HfN diffusion barrier. Fig. 3-9 shows the Weibull plot of TDDB of Cu gate MOSCAP with 25-nm-thick to 60-nm-thick HfN diffusion barrier and no barrier control sample. The electric field of -13.06 MV/cm was applied to the gate electrode to measure the TDDB characteristics. The TDDB exhibition of Cu gate MOSCAPs with 25-nm-thick to 60-nm-thick HfN diffusion barrier are almost the same. In Fig.3-10, the TDDB of Cu gate MOSCAP with 20-nm-thick and 28-nm-thick HfN diffusion barrier was compared. The TDDB characteristics were degraded at 20-nm-thick HfN diffusion barrier sample. Fig.3-11 shows the comparison of lifetime of Cu gate MOSCAPs with 20-nm-thick, 25-nm-thick HfN diffusion barrier, and no barrier control sample. The lifetime was measured at -13.6V, -13.9V, and -14.2V to make the Weibull plot of TDDB, and then the 63% of TDDB was selected to make the plot of lifetime. The 25-nm-thick HfN diffusion barrier sample shows better lifetime than the 20-nm-thick HfN diffusion barrier sample.

The degradation of charge to breakdown and lifetime is perhaps due to the Cu diffusion into the dielectric. Cu ions are the positive charged mobile ion in dielectric layer. When the

Cu ions diffuse into the dielectric along with a voltage applied on the electrode of the MOSCAPs, the Cu ions will move towards the cathode. The electric field between cathode and mobile ions will increase because of the shorter distance between Cu ions and cathode [29][30]. Then the current density between Cu ions and cathode will increase with the electric field. Larger current density will enhance the damage of dielectric and lower the charge to breakdown, TDDB, and lifetime of the MOSCAPs.

Fig.3-12 to Fig.3-15 are SIMS analysis data of Cu gate MOSCAP with 20-nm-thick to 60-nm-thick HfN diffusion barrier and no barrier control sample. At first, the secondary ion counts of 20-nm-thick HfN diffusion sample and control sample were compared. The secondary ion counts of Cu in Si substrate for 20-nm-thick HfN diffusion barrier sample are apparently smaller than control sample. This result shows the HfN layer has the ability to block the Cu ions diffusion into the dielectric. Subsequently, we make a study of the barrier efficiency of Cu gate MOSCAPs with different thickness of HfN diffusion barrier. We compare the counts of Cu at the peak of silicon. For 20-nm-thick HfN diffusion barrier sample, the quantity of Cu counts is at 10³ to 10⁴ ions. The quantity of Cu counts is at 10² to 10³ ions for 25-nm-thick to 60-nm-thick HfN diffusion barrier samples and is smaller than that for 20-nm-thick HfN diffusion barrier sample. It shows the barrier efficiency is almost the same when the thickness of HfN diffusion barrier is over 25-nm-thick, and is degraded when the thickness is down to 20-nm-thick. In these SIMS analysis data, the 25-nm-thick HfN has

been determined to be a suitable thickness condition for HfN diffusion barrier.

3.3 Comparison of HfN and TaN diffusion barrier

TaN is a well-known material for the Cu diffusion barrier in recent years [31]-[33]. So we fabricate the Cu gate MOSCAPs with 34-nm-thick TaN diffusion barrier to compare with that with 28-nm-thick HfN diffusion barrier. The thicknesses of these samples are identified by the SEM shown in Fig.3-16 and Fig.3-17. Fig.3-18 shows the C-V curves of TaN and HfN diffusion barrier samples. Because of the work function differences between TaN (4.8eV) and HfN (4.65eV), we can observe the flat band shift in the C-V curve. The EOT of TaN and HfN diffusion barrier samples are 12.1 nm and 12.4 nm. I-V curves are shown in the Fig. 3.19. The leakage current density of TaN diffusion barrier sample is only a little lower than that of the HfN diffusion barrier one. In the electrical characteristics, the 34-nm-thick TaN and 28-nm-thick HfN samples are similar with each other.

Fig.3-20 shows the Weibull plot of the charge to breakdown for HfN and TaN diffusion barrier samples measured at the voltage of -13.6 V applied on the gate electrode. We can find the charge to breakdown for the TaN diffusion barrier sample is smaller than that for the HfN diffusion barrier sample. The TDDB and lifetime comparison for HfN and TaN diffusion barriers are shown at Fig. 3-21 and Fig. 3-22, respectively. The TDDB and lifetime exhibitions for the HfN diffusion barrier sample are also better than that for the TaN one. In

previous sections of this chapter, we found that the barrier efficiency can be defined by the reliability characteristics and this can be proved through SIMS analysis. Thus, the reliability for 28-nm-thick HfN diffusion barrier is better than that for 34-nm-thick TaN one. This also shows the barrier efficiency of 28-nm-thick HfN diffusion barrier is better than that of 34-nm-thick TaN one.

3.4 Summary

In this chapter, we present the electrical characteristics and reliability of Cu gate MOSFETs with different thickness HfN diffusion barrier, and show the HfN is suitable to be the Cu diffusion barrier. The reliability is almost the same when thickness of HfN diffusion barrier is over 25-nm-thick, and degraded when the thickness of HfN diffusion barrier down to 20-nm-thick. SIMS analysis data shows the lower secondary ion counts of Cu in Si substrate when we insert HfN diffusion barrier between Cu gate electrodes and dielectric, it can proof the HfN layer can block the Cu ions diffusion into dielectric. The SIMS analysis data also shows the better Cu diffusion barrier efficiency when the thickness of HfN diffusion barrier thicker than 25-nm-thick, and degraded when the thickness of HfN diffusion barrier down to 20-nm-thick.

And we compare the HfN diffusion barrier with the TaN diffusion barrier. By the results we observe above, the reliability issue can be the index of barrier efficiency of Cu diffusion

barrier. So we compare the Cu diffusion barrier efficiency of 34-nm-thick TaN and 28-nm-thick HfN diffusion barrier sample by the reliability. The 28-nm-thick HfN diffusion barrier sample shows better reliability than the 34-nm-thick TaN diffusion barrier sample. It means the barrier efficiency of 28-nm-thick HfN is better than 34-nm-thick TaN.

Chapter 4

Thermal Stability of Copper Gate MOSCAPs with HfN Diffusion Barrier

4.1 Electrical characteristics of annealed Cu/HfN/SiO

2

/p-Si

Fig. 4-1 shows the sheet resistance for Cu gate MOSCAP with 28-nm-thick HfN diffusion barrier both as-deposited and after 400°C, 500°C, 600°C annealing in N2 ambient for 30 minutes. We can find an obvious sheet resistance difference between as deposited and after 400°C annealing samples. The sheet resistance was lowered down after 400°C annealing.

This is because of the looser structure deposited by PVD, and the structure turns to be more compact after annealing. When the structure of electrode was changed after annealing, the work function of the electrode changed with the structure. The sheet resistance of Cu gate MOSCAP with 28-nm-thick HfN diffusion barrier did not change apparently for the samples after 400°C, 500°C, and 600°C annealing. It shows the work function of the electrode did not changed apparently for the samples received 400°C, 500°C, and 600°C annealing.

The comparison of C-V curves was shown at Fig. 4-2. We can observe a positive flat band voltage shift between as deposited and after 400°C annealing samples. A negative flat band voltage shift was found for the samples after 600°C annealing in this figure compared

with that after 400°C annealing. The positive flat band voltage shift may be due to the work function difference of the gate electrode and the elimination of the plasma induced oxide charge after annealing. The plasma induced oxide charge was generated during the deposition of the HfN layer and the Cu electrode through sputtering. The work function difference of gate electrode and the positive charge injection are the possible reasons causing the negative flat band voltage shift between 400°C and 600°C [34].

Fig. 4-3 shows the C-V measurement of as deposited sample at different frequencies.

The frequencies for the C-V measurement are 1 K, 10 K, and 100 KHz. A hump was found at the depletion region for the C-V curves of 1 KHz and 10 KHz. The poorer interface state quality is the reason of the hump appeared in C-V curves [35]. After 400°C, 500°C, and 600°C annealing, the hump disappearance was found in the C-V curves at Fig. 4-4, Fig. 4-5, and Fig. 4-6, respectively. This implies the poorer interface state quality was annealed by 400°C, 500°C, and 600°C N2 ambient annealing.

Fig. 4-7 is the C-V curves measured from +1 V to -6 V, and then from -6 V to +1 V immediately. A hysteresis of 100 mV can be observed in this plot. The major reasons to cause the hysteresis are the plasma induced oxide charges generated during the deposition of the HfN layer and the Cu electrode by sputtering. In Fig. 4-8, the hysteresis was eliminated when the Cu gate MOSCAP with 28-nm-thick HfN diffusion barrier was annealed at 400°C N2

ambient for 30 minutes. The elimination of the hysteresis means the plasma induced oxide

charges have been removed at 400°C annealing. Fig. 4-9 and Fig. 4-10 show the C-V curves for the samples after 500°C and 600°C annealing, respectively. The hysteresis was not found in these annealing conditions as well as the 400°C annealing one.

The comparison of I-V curves for as deposited, 400°C, 500°C, and 600°C annealed samples are shown in Fig. 4-11. We can find the leakage currents for 400°C, 500°C, and 600°C annealed samples are slightly lower than that for as deposited sample at low voltage regime. This is because the plasma induced oxide charges and the traps in SiO2 were removed and cured during annealing process. In high voltage region, the leakage currents for 500°C and 600°C annealed samples increase rapidly. That means the Cu ions diffuse into the dielectric and cause the increasing of the leakage currents dramatically. For 400°C annealed sample, the leakage current always keep lower level than that for as deposited one in whole range of voltage swept, which means the HfN barrier efficiency was good enough to block the Cu ions diffusion into the dielectric. In the I-V curves, we can also find that the breakdown voltage is increased after 400°C annealing and decreased after either 500°C or 600°C annealing. We make a Weibull plot of effective breakdown electric field for 400°C, 500°C, and 600°C annealed samples. We can observe that the effective breakdown voltage was increased after 400°C annealing and decreased with the higher annealing temperatures. The effective breakdown field distribution for 600°C annealed samples is larger than that for either 400°C or 500°C annealed samples. This result indicates that the Cu ions diffusion starts for

the sample treated by 500°C for 30 minutes in N2 ambient, and turns to be more seriously when the sample treated by 600°C for 30 minutes in N2 ambient.

4.2 Conduction mechanism of annealed Cu/HfN/SiO

2

/p-Si

The Fowler-Nordheim (F-N) tunneling is the main conduction mechanism for MOSCAPs using SiO2 as the dielectric layer. The F-N tunneling is occurring at high voltage applied on the MOSCAPs, then the electron can transport across the potential energy barrier [36]. The equation of leakage current density is:

2

exp

contact potential barrier, is the applied electric field. The slope of the leakage current

equation can be rearranged as:

EOX

From the equations shown above, the leakage current behaviors of the insulated films can be investigated further on the leakage current density over the square of the electric field applied

plots. The plot of the nature log of the leakage current density over the square of the applied electric field versus the reciprocal of the electric field was observed. It is found that the leakage current density over the square of the electric field is linearly related to the reciprocal of the applied electric field. When measuring the leakage current in different temperature, the difference of the leakage current was small at high electric field region. The barrier height is defined from the conduction band of the electrode to the conduction band of the dielectric. It can be determined from the slop of the ln (J/E²) vs. (1/E) plot.

plots. The plot of the nature log of the leakage current density over the square of the applied electric field versus the reciprocal of the electric field was observed. It is found that the leakage current density over the square of the electric field is linearly related to the reciprocal of the applied electric field. When measuring the leakage current in different temperature, the difference of the leakage current was small at high electric field region. The barrier height is defined from the conduction band of the electrode to the conduction band of the dielectric. It can be determined from the slop of the ln (J/E²) vs. (1/E) plot.

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