In the radio interference protocols, which are used to set up, reconfigure and release the Radio Bearer services, the physical layer defines the fundamental capacity limits. The physical layer of the radio interface has been typically the main discussion topic when different cellular systems have been compared against each other.
In WCDMA, the concept of obtaining Bandwidth on Demand (BoD) is well supported, and it is easy to support an asymmetric uplink and downlink configuration by means of independently setting the SF between uplink and downlink for each user. The carrier bandwidth is 5 MHz for the chip rate of 3.84 MHz. Therefore, the transmission power of Mobile Stations (MSs) can be reduced by technologies like RAKE reception with more paths combining. The operation of asynchronous base stations is supported to make deployment of indoor and micro base station easier when no GPS signal needs to be received. WCDMA support two duplex modes: FDD with separate 5MHz carrier frequencies for uplink and downlink and TDD with only one time-sheared 5MHz spectrum for both uplink and downlink. Coherent detection is employed based on the used of pilot symbols or common pilot to increase the coverage and capacity on both uplink and downlink. In addition, advanced CDMA receiver techniques, such as multiuser detection, can be employed to increase capacity and coverage of the overall system. Main WCDMA parameters are listed in Table 2-1.
The physical layer of WCDMA FDD is described in [72], [73], [74], [75], [76]. Main body of WCDMA physical layer is established in Release ’99. In UTRA, the physical layer is required to support variable bit rate transport channels (TrCHs) to offer BoD services, and to be able to multiplex several services to one connection. User data and control signal in
TrCHs from Media Access Control (MAC) layer are multiplexed and mapped to different physical channels (PhCHs) to be transmitted in air interface in physical layer. Multiplexing is a combination of error detection, error correcting, rate matching, interleaving and TrCHs mapping onto or splitting from PhCHs [73]. Data in PhCH is then spread and modulated and transmitted over the air. The use of a variable SF and multi-code connections is supported for practically achievable bit rate transmission up to 384 kbps. There are many procedures essential for system operation, such as the fast power control and handover measurements [75]. We focus our introduction on data transmission in dedicated channel of physical layer in WCDMA Release ’99.
2.1.1 Transport Channels
There are two types of TrCHs defined: dedicated channel and common channels. A Dedicated channel is reserved for a single user only and using inherent addressing of UE while a Common channel is a resource divided between all or a group of users in a cell, and using explicit addressing of UE if addressing is needed.
The dedicated TrCH, Dedicated CHannel (DCH), is a downlink or uplink TrCH that carries user data or control information from layers above the physical layer. The DCH is characterized by features such as fast power control, fast data rate change on a frame-by-frame basis, and possibility of transmission to a certain part of the cell or sector with varying antenna weights in adaptive antenna systems. The DCH supports soft handover.
The common TrCHs needed for the basic network operation are three downlink TrCHs (Broadcast CHannel (BCH) is used to broadcast system- and cell-specific information in downlink. Forward Access CHannel (FACH) is used to carry control information to terminals known to locate in the given cell. Paging CHannel (PCH) is used to carry data relevant to the paging procedure to support efficient sleep-mode procedure) and one uplink
TrCH (Random Access CHannel (RACH) is used to carry control information from the terminal, such as requests to set up a connection). Common channels do not have soft handover but some of them can have fast power control.
In addition to the above TrCHs, there are High Speed Downlink Shared Channel (HS-DSCH) in Release 5 for HSDPA and Enhanced Dedicated Channel (E-DCH) introduced in Release 6 for HAUPA. There are significant differences in physical layer operations between these two channels and other channels earlier than Release 5. HS-DSCH and E-DCH are briefly described in Appendix A and Appendix B, respectively.
2.1.2 Multiplexing
At the transmitter side, data arrives at the coding/multiplexing unit in form of transport block sets once every transmission time interval (TTI). The TrCHs are multiplexed to different PhCHs. The TTI is transport-channel specific and it can be 10 ms, 20 ms, 40 ms, or 80 ms. The coding/multiplexing steps for the uplink and downlink are shown in Fig. 2-1 and Fig. 2-2, respectively. Each function block is briefly described in the following and the details are in [73]. In the uplink, the symbols on the DPDCH (PhCH of TrCH DCH) are sent with equal power level for all services, i.e. in order to balance the power level requirements for the channel symbols, the relative symbol rates for different services should be adjusted by coding and channel multiplexing.
CRC Attachment
After receiving a transport block from higher layers, the first operation is Cyclic Redundancy Check (CRC) attachment for error checking on transport blocks at the receiver end. The physical layer provides the transport block to higher layers together with the error indication from the CRC check. The CRC length can be 0, 8, 12, 16 and 24 bits. Large CRC bit number can lead to low probability of an undetected error of the transport block.
Channel Coding
Two types of coding schemes, namely, convolutional encoding and turbo encoding, have been defined in UTRA. The turbo encoding/decoding method is an 8-state parallel concatenated convolutional codec (PCCC). In convolutional encoding, a coding rate of either 1/2 or 1/3 (constraint length = 9 in both cases) with the use of tail bits is applied depending on QoS.
Fig. 2-3 illustrates the configuration of a convolutional coder. Eight tail bits with binary value 0 shall be added to the end of the CB before encoding. The initial value of the shift register of the coder shall be ``all 0'' when starting to encode the input bits.
Fig. 2-4 illustrates the configuration of a Turbo coder. The transfer function of the 8-state constituent code for PCCC is:
G(D) = ⎥
⎦
⎢ ⎤
⎣
⎡
) (
) , ( 1
0 1
D g
D
g ,
where
g0(D) = 1 + D2 + D3, g1(D) = 1 + D + D3.
The initial value of the shift registers of the 8-state constituent encoders shall be all zeros when starting to encode the input bits. Output from the Turbo coder is u[1], up1[1], up2[1], u[2], up1[2], up2[2], …, u[M], up1[M], up2[M], where u[1], u[2], …, u[M] are the bits input to the Turbo coder i.e. both first 8-state constituent encoder and Turbo code internal interleaver, and K is the number of bits, and up1[1], up1[2], …, up1[M] and up2[1], up2[2], …, up2[M] are the bits output from first and second 8-state constituent encoders, respectively. The bits output from Turbo code internal interleaver are denoted by u’[1], u’[2], …, u’[M], and these bits are to be input to the second 8-state constituent encoder.
The Turbo code internal interleaver is prime interleaver (PIL) based on block interleaving
[63]. Bits-input are first written in a rectangular matrix with padding. Then the Intra-row and inter-row permutations of the rectangular matrix is performed. After that, bits-output from the rectangular matrix with pruning are sent. The output of the Turbo code internal interleaver is the bit sequence read out column by column where the output is pruned by deleting dummy bits that were padded to the input of the rectangular matrix.
Trellis termination is performed by taking the tail bits from the shift register feedback after all information bits are encoded. Tail bits are padded after the encoding of information bits. The first three tail bits shall be used to terminate the first constituent encoder (upper switch of Fig. 2-4 in lower position) while the second constituent encoder is disabled. The last three tail bits shall be used to terminate the second constituent encoder (lower switch of Fig. 2-4 in lower position) while the first constituent encoder is disabled. The transmitted bits for trellis termination shall then be: u[M+1], up1[M+1], u[M+2], up1[M+2], u[M+3], up1[M+3], u’[M+1], up2[M+1], u’[M+2], up2[M+2], u’[M+3], up2[M+3].
Because of the characteristics of the coding schemes, turbo encoding is effective for video and other high-speed, high-quality data (coding rate = 1/3, constraint length = 4), whereas convolutional encoding is effective for speech and other low-speed data.
First Interleaving
Interleaving is a practical technique to enhance the error correcting capability of coding, especially for the channel with burst errors. It plays an important role in achieving good performance [82]. Interleaving rearranges the ordering of a data sequence in a one-to-one deterministic format. The first interleaving is a block interleaver with inter-column permutations, i.e. write the input sequence into the interleaving matrix row by row. Perform the inter-column permutation for the matrix. Finally, read the output bits of the block interleaver column by column.
Second Interleaving
The second interleaving is a block interleaver and consists of bits input to a matrix with padding, inter-column permutation for the matrix and bits output from the matrix with pruning. The number of columns in the matrix is 30, and then the number of rows is obtained.
Second interleaving is similar to first interleaving except for the inter-column permutation pattern.
In addition to the above procedures to protect data through wireless channel, there are several procedures used for mapping TrCHs to PhCHs with proper length and format. The transport block concatenation/ segmentation procedure is used to make the transport block
size fit the available CB size defined in the channel coding method. Radio frame size equalization is only performed in the uplink, and it is the padding of the input bit sequence in
order to ensure that the output can be segmented into data segments of the same size. In radio frame segmentation, when the TTI is longer than 10 ms, the input bit sequence is segmented
and mapped onto consecutive radio frames of 10 ms each. Rate matching means that bits on a TrCH are “repeated” or “punctured” to make the radio frame in PhCH to meet the correct number of bits in one of the predefined formats. In the downlink the transmission is interrupted if the number of bits is lower than maximum. However, when the number of bits between different TTIs in uplink is changed, bits are repeated or punctured to ensure that the total bit rate after TrCH multiplexing is identical to the total channel bit rate of the allocated dedicated PhCHs. Every 10 ms, one radio frame from each TrCH is delivered to the TrCH multiplexing. These radio frames are serially multiplexed into a coded composite transport
channel (CCTrCH). When more than one PhCHs is used, physical channel segmentation divides the bits among the different PhCHs. After the above procedures, in physical channel mapping, the original TrCHs can be mapped to PhCHs now. In the uplink, the PhCHs used during a radio frame are either completely filled with bits that are transmitted over the air or not used at all.
2.1.3 Mapping and Association of Physical Channels and Transport Channels
After multiplexing and coding, the TrCHs are mapped to PhCHs. Fig. 2-6 summarizes the mapping of TrCHs onto PhCHs. The different TrCHs are mapped to different PhCHs, though some of the TrCHs are carried by identical PhCHs. The multiplexed DCHs are mapped sequentially (first-in-first-mapped) directly to the PhCH(s). In addition to TrCH-mapped PhCHs, some PhCHs carry only information relevant to physical layer procedures without mapping to TrCH s. SCH, CPICH, AICH, PICH are not visible to higher layers.
An example of channel coding, multiplexing and PhCH mapping is given in Fig. 2-5 and Table 2-3 [71]. This is an example of transmitting 4.1 kbps data and 12.2 kbps AMR speech data in the uplink. The 4.1 kbps data is in one TrCH with 40 ms and AMR speech data is in three TrCH with 20 ms each. These four TrCHs have their own channel coding schemes and different rate-matching attributes. The change of bits for each TrCH and the combination of different length TrCHs are performed. Dedicated control channel (DCCH) and Dedicated traffic channel (DTCH) in Fig. 2-5 are two types of logical channel from which the TrCHs are mapping.
2.1.4 Physical Channels
PhCHs are defined by a specific carrier frequency, scrambling code, channelization code, time start and stop (giving duration). Time durations are defined by start and stop instants, measured in integer multiples of chips.
Radio frame: A radio frame is a minimum processing duration which consists of 15 slots. The length of a radio frame corresponds to 38400 chips and the time duration is 10 ms.
Slot: The minimum unit in the Layer 1 bit sequence.The length of a slot corresponds to 2560 chips. The number of bits per slot may be different for different PhCHs and may, in some cases, vary in time.
In FDD mode, PhCHs are identified by code and frequency. After the TrCHs are mapped to PhCHs, they are spread and modulated and sent out to the air interface. Spreading consists of two operations: channelization and scrambling. The channelization operation transforms every data symbol into a number of chips, thus increasing the bandwidth of the signal. The number of chips per data symbol is called SF. Channelization codes are short spreading codes with chip length 4~512, and 4 to 512 types of codes can be used depending on the length.
Scrambling codes are relatively long codes with chip length 38,400 (long scrambling codes) or 256 (short scrambling codes), and an extremely large number of scrambling codes can be used. The channelization codes and scrambling codes are used in a different manner between uplink and downlink. In uplink, each UE uses a channelization code to identify PhCH s.
Multiple UEs can share the same channelization code, and the BS identifies the UEs according to their scrambling codes. In downlink, channelization codes are used for identifying UEs. Sectors can share the same channelization code, as a different scrambling code is assigned to each sector. Each UE identifies the sector by executing despreading with the use of the scrambling code used in the visited sector. The downlink set of the primary scrambling codes is limited to 512 codes.
The Dedicated uplink Physical CHannels (DPCHs) which is associated with TrCHs Dedicated CHannel (DCH) are described in the following. Other PhCHs of uplink and downlink can be found in [72]. DPCHs are bidirectional uplink/downlink channels and assigned individually to each UE. They are consists of the Dedicated Physical Data CHannel (DPDCH) and the Dedicated Physical Control CHannel (DPCCH), and mapped to I phase and Q phase, respectively.
Dedicated Uplink Physical Channels
The Uplink Dedicated Physical Data CHannel (uplink DPDCH) is used for transmitting data from DCH. At least one DPDCH is assigned to each UE. The Uplink Dedicated Physical Control CHannel (uplink DPCCH) is used for carrying control information generated at Layer 1. Only one DPCCH is assigned to each UE using DPCH. The Layer 1 control information consists of known pilot bits to support channel estimation for coherent detection, transmit power-control (TPC) commands, feedback information (FBI), and an optional transport-format combination indicator (TFCI) used to inform the receiver which TrCH is active for the current frame.
Fig. 2-11 shows the frame structure of the uplink DPDCH and the uplink DPCCH. Each radio frame of length 10 ms is split into 15 slots, each of length Tslot =2560 chips, corresponding to one power-control period. The DPDCH and DPCCH are always frame aligned with each other. The parameter k in Fig. 2-11 determines the number of bits per uplink DPDCH slot. It is related to the SF of the DPDCH as SF = 256/2k. The DPDCH SF may range from 256 down to 4. The SF of the uplink DPCCH is always equal to 256, i.e.
there are 10 bits per uplink DPCCH slot.
For the DPCCH and DPDCHs, the uplink spreading of DPCCH and DPDCHs is shown in Fig. 2-12. The binary DPCCH and DPDCHs to be spread are represented by real-valued sequences. The DPCCH is spread to the chip rate by the channelization code cc = Cch,256,0 and Cch,256,0 is described in 2.1.5. The n-th DPDCH called DPDCHn is spread to the chip rate by the channelization code cd,n. When only one DPDCH is to be transmitted, DPDCH1 shall be spread by code cd,1 = Cch,SF,k, k= SF / 4 and Cch,256,0 is described in 2.1.5. When more than one DPDCH is to be transmitted, all DPDCHs have SF equal to 4. DPDCHn shall be spread by the the code cd,n = Cch,4,k , where k = 1 if n ∈ {1, 2}, k = 3 if n ∈ {3, 4}, and k = 2 if n ∈ {5, 6}.
After channelization, the real-valued spread signals are weighted by gain factors, βp for
DPCCH, βd for all DPDCHs. The βp and βd values are signaled by higher layers or derived [75]. At every instant in time, at least one of the values βp and βd has the amplitude 1.0. The βp and βd values are quantized into 4 bit words.
After the weighting, the stream of real-valued chips on the I- and Q-branches are then summed and treated as a complex-valued stream of chips. This complex-valued signal of uplink dedicated PhCHs (DPCCH, DPDCHs, HS-DPCCH, E-DPCCH, E-DPDCHs) are then summed and scrambled by the complex-valued scrambling code Sdpch,n as shown in Fig. 2-13.
The code used for scrambling of the uplink dedicated PhCHs may be of either long or short type. The n-th uplink scrambling code, denoted Sdpch,n, is defined as Sdpch,n(i) = Clong,n(i), i = 0, 1, …, 38399, when using long scrambling codes, and Sdpch,n(i) = Cshort,n(i), i = 0, 1, …, 38399, when using short scrambling codes. Clong,n and Cshort,n are described in 2.1.5.
The scrambling code is applied aligned with the radio frames, i.e. the first scrambling chip corresponds to the beginning of a radio frame. The modulating chip rate is 3.84 Mcps, and the complex-valued chip sequence generated by the spreading process is QPSK modulated as shown in Fig. 2-14.
Dedicated Downlink Physical Channels
Dedicated downlink PhCH is different from the uplink one. The DPDCH and DPCCH are time-multiplexed in the time slot. Within one downlink DPCH, dedicated data generated at DCH are transmitted in time-multiplex with control information generated at physical layer.
Fig. 2-15 shows the frame structure of the downlink DPCH. Each frame of length 10 ms is split into 15 slots, each of length Tslot = 2560 chips corresponding to one power-control period. The parameter k in Fig. 2-15 determines the total number of bits per downlink DPCH slot. It is related to the SF of the PhCH as SF = 512/2k. The SF may thus range from 512 down to 4. Cch,SF,n is the channelization code used for non-compressed frames.
Fig. 2-16 illustrates the spreading operation for all PhCHs except SCH in the downlink.
The spreading operation includes a modulation mapper stage successively followed by a channelization stage, an IQ combining stage and a scrambling stage. The PhCH using QPSK where each pair of two consecutive symbols is first serial-to-parallel converted and mapped to I and Q branch. Fig. 2-17 illustrates how different downlink channels are combined. Each complex-valued spread channel, corresponding to point S in Fig. 2-16, may be separately weighted by a weight factor Gi. The complex-valued P-SCH and S-SCH may be separately weighted by weight factors Gp and Gs. All downlink PhCHs shall then be combined using complex addition. Modulation of the complex-valued chip sequence generated by the spreading process is shown in Fig. 2-18.
2.1.5 Spreading Codes
Channelization Codes
The channelization codes for both uplink and downlink are Orthogonal Variable Spreading Factor (OVSF) codes that preserve the orthogonality between a user's different PhCHs. The OVSF codes can be defined using the code tree as shown in Fig. 2-10. The generation method for the channelization code is defined as
1
The leftmost value in each channelization code word corresponds to the chip transmitted first in time. The channelization codes are uniquely described as Cch,SF,k, where k is the code
The leftmost value in each channelization code word corresponds to the chip transmitted first in time. The channelization codes are uniquely described as Cch,SF,k, where k is the code