The continuous and almost linear work function adjustment using HfxMo(1-x) is demonstrated for the first time. The work function value of Hf-Mo binary alloy deposited by co-sputtering ranges from 3.93eV (Φm of pure Hf) to 4.93eV (Φm of pure Mo) and depends on the sputtering power ratio of each target. The thermal stabilities of Hf-Mo binary alloys on SiO2 degrade with the increase of Hf atomic fraction, but all Hf-Mo binary alloys still possess thermal stabilities at least higher than 400℃. The Hf-Mo binary alloys can be used in a gate-last SiO2 CMOS process.
REFERENCES
[1] E. M. Vogel, K. Z. Ahmed, B. Hornung, W. K. Hensen, P. K. McLarty, G.
Lucovsky, J. R. Hauser, and J. Wortman, “Modeled tunnel currents for high dielectric constant dielectrics,” IEEE Trans. on Electron Devices, vol.45, pp.1350-1355, June 1998.
[2] Q. Lu, D. Park, A. Kalnitsky, C. Chang, C. –C. Cheng, S. P. Tay, T. –J. King, and C. Hu, “Leakage current comparison between ultra-thin Ta2O5 films and conventional gate dielectrics,” IEEE Electron Device Letters, vol.19, pp.341-342, Sept. 1998.
[3] K. F. Schuegraf, C. C. King, and C. Hu, “Impact of polysilicon depletion in thin oxide MOS technology,” in Proc. Tech. Papers 1993 Int. Symp. VLSI Technology, Systems, and Applications, 1993, pp.86-90.
[4] James R. Pfiester, Frank K. Baker, Thomas C. Mele, H. H. Tseng, Philip J.
Tobin, James D. Hayden, James W. Miller, Craig D. Gunderson, and Louis C.
Parrillo, “The effects of boron penetration on p+ polisilicon gated PMOS devices,” IEEE Trans. on Electron Devices, vol.37, no.8, pp.1842-1851, August 1990.
[5] H. F. Luan, B. Z. Wu, L. G. Kang, R. Vrtis, D. Roberts, and D. L. Kwong,
“Ultra thin high quality Ta2O5 gate dielectric prepared by in-situ rapid thermal processing,” in IEDM Tech. Dig., 1998, pp.609-612.
[6] C. H. Lee, H. F. Luan, W. P. Bai, S. J. Lee, T. S. Jeon, Y. Senzaki, D. Roberts, and D. L. Kwong, “MOS characteristics of ultra thin rapid thermal CVD ZrO2
and Zr silicate gate dielectrics,” in IEDM Tech. Dig., 2000, pp.27-30.
[7] Leland Chang, Stephen Tang, T. J. King, Jeffrey Bokor, and C. Hu, “Gate
length scaling and threshold voltage control of double-gate MOSFETs,” in IEDM Tech. Dig., 2000, pp.719-722.
[8] Qiang Lu, Y. C. Yeo, Pushkar Ranade, Hideki Takeuchi, T. J. King, and C. Hu,
“Dual-metal gate technology for deep-submicron CMOS transistors,” in Symp.
on VLSI Tech., 2000, pp.72-73.
[9] Huicai Zhong, Shin-Nam Hong, You-Seok Suh, Heather Lazar, Greg Heuss, and Veena Misra, “Properties of Ru-Ta alloys as gate electrodes for NMOS and PMOS silicon devices,” in IEDM Tech. Dig., 2001, pp.467-480.
[10] JaeHoon Lee, Huicai Zhong, You-Seok Suh, Greg Heuss, Jason Gurganus, Bei Chen, and Veena Misra, “Tunable work function dual metal gate technology for bulk and non-bulk CMOS,” in IEDM Tech. Dig., 2002, pp.359-362.
[11] Bing-Yue Tsui and Chih-Feng Huang, “Wide range work function modulation of binary alloys for MOSFET application,” IEEE Electron Device Letters, vol.24, pp.153-155, March 2003.
[12] S. H. Bae, W. P. Bai, H. C. Wen, S. Mathew, L. K. Bera, N. Balasubramanian, N. Yamada, M. F. Li, and D. L. Kwong, “Laminated metal gate electrode with tunable work function for advanced CMOS,” in Symp. on VLSI Tech., 2004, pp.188-189.
[13] Pushkar Ranade, Yang-Kyu Choi, Daewon Ha, Aditya Agarwal, Michael Ameen, and Tsu-Jae King, “Tunable work function molybdenum gate technology for FDSOI-CMOS,” in IEDM Tech. Dig., 2002, pp.363-366.
[14] K. J. Yang, Y. -C. King, and C. Hu, “Quantum effect in oxide thickness determination from capacitance measurement,” in Symp. on VLSI Tech., 1999, pp.77-78.
[15] P. Ranade, Y. C. Yeo, Q. Lu, H. Takeuchi, T-J. King, and C. Hu, “Molybdenum metal gate MOS technology for post-SiO2 gate dielectrics,” in Mat. Res. Soc.
Symp., vol.611, 2000, pp.C3.2.1-C3.2.6.
[16] A. Yagishita, T. Saito, K. Nakajima, S. Inumiya, Y. Akasaka, Y. Ozawa, G.
Minamihaba, H. Yano, K. Hieda, K. Suguro, T. Arikado, and K. Okumura,
“High performance metal gate MOSFETs fabricated by CMP for 0.1µm regime,” in IEDM Tech. Dig., 1998, pp.785-788.
[17] C. D. Gelatt Jr., and H. Ehrenreich, “Charge transfer in alloys: AgAu,” Phys.
Rev. B, vol. 10, no. 2, pp.398-415, July 1974.
[18] C. Kittel, Introduction to Solid State Physics, 7th ed. New York: Wiley, 1996, pp.151-157.
[19] Massalski Thaddeus B. ed., Binary Alloy Phase Diagrams, Metal Park, Ohio:
American Society for Metals, 1990, pp.2088-2089.
Sample Hf power (W) Mo power (W) Hf power ratio (%) Φm (eV)
ctrl. 0 150 0 (pure Mo) 4.932
1-1 22 150 12.8 4.727
1-2 50 150 25 4.597
1-3 90 150 37.5 4.492
1-4 150 150 50 4.350
1-5 150 90 62.5 4.213
1-6 150 50 75 4.150
1-7 150 22 87.5 4.062
ctrl. 150 0 100 (pure Hf) 3.930
Table 2.1. Sample conditions and extracted Φm of co-sputtering experiment. (alloy samples : 400℃, 30s；control samples : as-deposited)
-3 -2 -1 0 1 0.0
0.2 0.4 0.6 0.8 1.0
Norm aliz ed Ca pac ita nc e
Voltage (Volt)
0% (Mo) 12.8%
25%
37.5%
50%
62.5%
75%
87.5%
100% (Hf) Hf power ratio
Fig. 2.1. C-V curves of as-deposited co-sputtering samples. Wide-ranging flat band voltage shift can be observed.
0 20 40 60 80 100 -1.2
-0.8 -0.4 0.0
0% (Mo) 12.8%
25%
37.5%
50%
62.5%
75%
87.5%
100% (Hf)
F lat b and V o ltag e (V ol t)
EOT (A)
Hf Power Ratio
Fig. 2.2. All samples (Table I.) exhibited linear behavior in VFB vs. EOT curves from which work function of each alloy could be extracted. (alloy samples : 400℃, 30s；
control samples : as-deposited)
20 30 40 50 60
Si-sub. Mo (110)In te ns ity ( A rb . U nit )
2 θ (Degree)
pure Mo film
Fig. 2.3. The as-deposited pure Mo film is found to have (110) orientation.
-3 -2 -1 0 1 0.0
1.0x10-10 2.0x10-10 3.0x10-10 4.0x10-10 5.0x10-10
inv to acc acc to inv
Cap a cit ance (F )
Voltage (Volt)
Co-sputtering sample 50% Hf power ratio EOT = 31A
Fig. 2.4. Process quality was demonstrated, since the 50% Hf power ratio sample suffering maximum power summation during metal deposition still exhibited negligible hysteresis.
-3 -2 -1 0 1 0.0
1.0x10-10 2.0x10-10 3.0x10-10
C a pa ci ta nc e ( F )
Voltage (Volt.)
As-deposited Post-400C
pure Hf / SiO
2Fig. 2.5. C-V curve of post-400℃ annealing Hf gated capacitor shows noticeable EOT variation and flatband voltage shift.
0 20 40 60 80 100 -1.2
-0.8 -0.4 0.0
F la tban d V olt age (V ol t)
EOT (A)
As-deposited Post-400C
Co-sputtering sample - 75% Hf power ratio
Fig. 2.6. Post-400℃ annealing co-sputtering sample shows negligible work function variation.
as-deposit 400C 500C 600C 700C 800C 900C 950C -15
-10 -5 0 5 10
100% (Hf) 75% 50%
25% 0% (Mo)
Delt a E O T (A )
Annealing Condition
-0.1 0.0 0.1 0.2 0.3
Del ta Φ
m(eV)
Fig. 2.7. The dependence of Φm and EOT variation on annealing temperature show that the thermal stability of alloy samples can be at least higher than 400℃.
0 20 40 60 80 100
Work function modulation of A
xB
(1-x)binary alloy
Wo rk Fu n cti on ( eV )
Atomic Fraction of Element A in Alloy (%)
Φm,A=3.93eV
Fig. 2.8. Calculated work function value versus atomic fraction in binary alloy as a function of γ ratio. Metals with similar γ (Sommerfeld factor) will lead to a linear work function modulation which is a compromise between modulation efficiency and immunity to process variation. (Φm.A and Φm.B are set to be 3.93 and 4.93eV for convenience)
Fig. 2.9. The phase diagram of Mo-Hf system.
0 20 40 60 80 100
Fig. 2.10. Comparison between experimental (Table I.) and theoretical work function values. A slightly deviation in lower Hf power ratio regime may be attributed to different sputtering rate between Hf and Mo. (γHf = 2.16, γMo = 2.0 are used for calculation)
30 40 50 60
900C800C
700C
600C
In tensit y (A rb. Unit )
500C2 θ (Degree)
as-deposited
50% alloy sample deposited by co-sputtering
Fig. 2.11. XRD spectra of 50% Hf power ratio co-sputtering sample exhibited an amorphous film structure and only the c-Si was featuring.
0 500 1000 1500 2000 2500 0
20 40 60 80 100
A tom ic C onc ent rat ion (% )
Sputtering Time (s) Post-700C, 30s annealing 50% alloy sample
Hf Mo
O
Si
Fig. 2.12. AES profile of post-annealing 50% Hf power ratio co-sputtering sample. A uniform composition and abrupt interface can be observed.