This chapter has presented the AWKF, MAWKF, and 3D LWKF methods. The AWKF used an analytical formula to calculate WKF. However, the method does not consider the residual area of gate due to the limitation of the formula. The MAWKF method revised the AWKF method to improve the usage of estimating WKF induced characteristic fluctuation.
In 3D LWKF method, we directly partition the device gate metal material into many sub-regions and then randomly generate the work-function to each sub-region into device gate for our 3D quantum-corrected device simulation. Additionally, based on the coupled device circuit simulation, the fluctuation of circuit characteristics can be obtained with more device physics inside.
Chapter 3
Devices Characteristic Fluctuations
This chapter estimates and compares the influences of the work-function fluctuation with MAWKF and LWKF methods on 16-nm-gate planar MOSFET devices. The DC char-acteristics are examined in threshold voltage, on-state current (ION) and off-state current (IOF F). The AC characteristics are investigated in terms of gate capacitance (CG) and cut-off frequency (fT).
3.1 DC Characteristic Fluctuations Comparison
The control devices in this study are the 16-nm-gate bulk planar MOSFETs (width: 16 nm) with amorphous-based TiN/HfO2gate stacks with an equivalent oxide thickness of 0.8
31
32 Chapter 3 : Devices Characteristic Fluctuations
nm and 4.52 eV and 4.76 eV work-functions for NMOS and PMOS devices, respectively.
The nominal channel doping concentrations are 1.5×1018 cm−3, the source/drain doping concentrations are 2×1020cm−3, and the lightly doped drain (LDD) doping concentrations are 4×1019cm−3. The junction depth of LDD region is 8 nm. The threshold voltages are calibrated to 250 mV following ITRS roadmap [2,23,25,27]. The details of device setting are shown in Fig. 3.1. The subthreshold slope (SS) could be improved by tuning the channel doping shape profile or metal work-function. The properties of metal are shown in Fig. 2.1(a) and the average grain size is 4 nm × 4 nm [47]. Additionally, to compare fairly the NMOS- and PMOS-induced characteristic fluctuation and eliminate the effect of transistor size on fluctuation, the dimensions of the PMOS devices are the same as those of the NMOS ones.
The mobility model used in our 3D device simulation is is given by:
1
where D= exp (x/lcrit), x is the distance from the interface and lcritis a fitting parameter.
The mobility consists of three parts: (1) the surface contribution due to acoustic phonon scattering, μsurf aps = BE +EC1/3(N(T/Ti/N00))τK, where Ni = NA+ ND, T0 = 300 K,E is the trans-verse electric field normal to the interface of semiconductor and insulator, B and C are parameters which based on physically derived quantities, N0 and τ are fitting parameters,
3.1 : DC Characteristic Fluctuations Comparison 33
T is lattice temperature, and K is the temperature dependence of the probability of sur-face phonon scattering; (2) the contribution attributed to sursur-face roughness scattering is μsurf rs = ((E/Eδref)Ξ + Eη3)−1, whereΞ = A + α·(n+p)N(Ni+N1)refvv , Eref = 1 V/cm is a reference electric field to ensure a unitless numerator in μsurf rs, Nref = 1 cm−3 is a reference dop-ing concentration to cancel the unit of the term raised to the power v in the denominator of Ξ, δ is a constant that depends on the details of the technology, such as oxide growth conditions, N1 = 1 cm−3, A, α, and η are fitting parameters; (3) and the bulk mobility is μbulk = μL(TT0)−ξ, where μL is the mobility due to bulk phonon scattering and ξ is a fitting parameter. The parameters of mobility were calibrated with the measurement of experimentally fabricated CMOS devices [23], as shown in Fig. 3.2.
34 Chapter 3 : Devices Characteristic Fluctuations
Figure 3.1: The device parameters setting and performance used in this work.
3.1 : DC Characteristic Fluctuations Comparison 35
Figure 3.2: Extracted nonstrain mobility versus doping concentration at 0.3 and 1 MV/cm vertical field.
36 Chapter 3 : Devices Characteristic Fluctuations
Figure 3.3 shows the threshold voltage fluctuation, the normalized on- and off-state current fluctuations (σION and σIOF F) induced by WKF of NMOS and PMOS devices with LWKF method, the values are 36.7 mV, 5%, 57%, 42.5 mV, 10%, 46%, respectively.
We note that the Vthis determined form the current criterion when drain current is 10−7 A.
The ION is the drain current at on-state (gate voltage (VG) and drain voltage (VD) are equal to 0.8 V), and the IOF F is the drain current at off-state (VG = 0 V and VD = 0.8 V). Figure 3.4 compares σVth among AWKF, MAWKF method and LWKF methods for the gate area is 16 nm× 16 nm with grain size equal to 4 nm × 4 nm (gate area contain integer number of grain), and 5 nm× 5 nm (gate area does not contain integer number of grain). The AWKF and MAWKF method significantly underestimated the WKF induced σVth. To further un-derstanding the physical mechanism of WKF induced device characteristic fluctuations; we investigate the on-state potential, charge distribution at channel surface, and band diagram.
Due to the probabilistic distribution of work-function, the effective work functions of 200 devices are not a deterministic value and results in device to device performance variation.
This variation can also estimated by MAWKF method. However, the position of different metal grain orientation position effect can further induce device characteristic fluctuations.
Figure 3.5(a) shows the large-scale statistically computed results of Vth as a function of the number of TiN <200> (higher work-function) contained for NMOS device. From the number of high work-function grain orientation point of view, the effective work-function
3.1 : DC Characteristic Fluctuations Comparison 37
of a single device increases as the number of TiN <200> increases, result in a higher Vth. Moreover, it is found that even for devices with the same numbers of TiN <200> inside the gate, the effect of nanoscale grain orientation position induces different fluctuations of characteristics in spite of there being the same number of TiN <200>. To explore the grain orientation-position-induced Vth fluctuation, the on-state potential distributions with con-taining nine TiN <200> but different position inside the gate are investigated, as shown in Figs. 3.5(b) and (c). The potential distributions are at the channel surface. For a device with TiN <200> located near the source and at the middle of channel, the corresponding potential distributions are significant decreased in these areas, which significantly changes the electron conducting path and induce larger Vth. The importance of grain position effect is found for the first time. Figure 3.6(a) presents the charge distribution of the channel sur-face extracted from Fig. 3.5(b) at VG= 0.8 V, and VD= 0 V; we can clearly find the charge distribution is strongly governed by different local work-function of gate metal orientation, such phenomenon can not be predicted by MAWKF method. The MAWKF model uses an effective work function for each device to calculate the performance, which assumes a uniform inversion charge density at the channel surface. The difference between these two methods can be considered in terms of the band diagram, as shown in Fig. 3.6(b) and Fig.
3.7, which leads to different substrate band bending and varying throughout the channel.
Since the threshold voltage is determined by the work-function difference between metal
38 Chapter 3 : Devices Characteristic Fluctuations
and semiconductor [1], as shown below:
Vth = (|QSD(max)| − Qss)/Cox+ φms+ 2φf p, (3.2)
where the|QSD(max)| is the maximum charge density of depletion region, Qssis the oxide surface charge, Coxis the oxide capacitance, φmsis work-function difference between metal and semiconductor, and 2φf pis the surface potential. The difference of threshold voltage fluctuation is therefore result form work-function difference induced by the localized metal grain. Since the on-state channel inversion charge density distribution is above1019cm−3, the charge screening length in the channel is about several nanometers. Therefore, for nanoscale grains, the band edges in the channel will be affected by the grain directly above a given region, and will fluctuate throughout the channel surface.
3.1 : DC Characteristic Fluctuations Comparison 39
Figure 3.3: The ID-VGcurves of localized work-function fluctuation
method for (a) NMOS and (b) PMOS devices, where the nominal curve with effective work-function of 4.52 eV (NMOS) and 4.76 eV (PMOS) are the red thick symbol lines. The Vth, and the normalized ION and IOF F
fluctuations are shown in the inset.
40 Chapter 3 : Devices Characteristic Fluctuations
Figure 3.4: Comparison of threshold voltage fluctuation among averaged work-function fluctuation method, modified averaged work-function fluctuation method and localized work-function fluctuation method for grain size equal to (a) 4 nm× 4 nm (the gate area contain integer number of grain case) and (b) 5 nm× 5 nm (the gate area contain
non-integer number of grain case).
3.1 : DC Characteristic Fluctuations Comparison 41
Figure 3.5: (a) Threshold voltage distribution as a function of number of TiN <200> contained. The on-state (VG= 0.8 V and VD
= 0.8 V) potential distribution of (b) higher Vthand (c) lower Vthdevices with the same number of TiN <200>.
42 Chapter 3 : Devices Characteristic Fluctuations
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Figure 3.7: (a) The charge distribution and the metal grain distribution extracted from control device at VG= 0.8 V and VD = 0 V.
(b) The band diagram in the semiconductor and the metal gate.
44 Chapter 3 : Devices Characteristic Fluctuations