Chapter 1 Introduction
1.7 Thesis Organization
1.7 Thesis Organization
Following chapters in the thesis are primarily organized as follow : In chapter 2, we describe the motivation for this thesis.
In chapter 3, we make a description of experimental details. Metal Organic Deposition system is used to deposit HfO2 on silicon surface.
In chapter 4, we discuss the electrical characteristics of HfO2
insulator by Metal Insulator Semiconductor (MIS) capacitors.
In chapter 5, we make the conclusions for this thesis and provide some suggestions for future work.
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Chapter 2 Motivations 2.1 Forward
For more than 30 years, SiO2 films have been the preferred material for gate dielectric in MOS-based structures, but the gate oxide scaling limits are examined with respect to time-dependent breakdown, defects, plasma process damage, mobility degradation, poly-gate depletion inversion later thickness m tunneling leakage, charge trapping, and gate delay. The recent downsizing of the Si device has significantly reduced the gate dielectric film thickness, so that the higher gate leakage on conventional SiO2 dielectrics has become serious. As use SiO2 to gate dielectric is less than 2 nm, the leakage current become unacceptable.
In the last few years, high-k material has attracted a great deal of attention because of their promising for replacing SiO2 as gate dielectric in MOSFETs. Using hafnium oxide based materials are under intense investigation and optimization due to their high dielectric constant, wide band gap/barrier height and good thermal stability. While HfO2 (and other high-k candidates) show the desired effect of significantly reducing gate tunneling (leakage) current. Therefore, to search for high dielectric constant (high-k) materials for near-future gate dielectrics in MOS ULSI devices is currently an enormous materials and technological challenge.
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2.2 Plasma nitridaion
According to traditional view of improving SiO2 device performance, we could find that nitridation is a common method to improve the interface [42]. Property with the result that there is often N
it or D
it in the interface, imperfect bonding of interface usually makes the characteristic of the device deteriorate. For example, charge will be trapped by the defects of the interface, it produces flat band voltage shift and also reduces the carrier mobility. Another shortcoming is that these damgling bonds will easily bond with oxygen atoms in the following high temperature environment. The extra chemical reaction will let the interfacial oxide growth, and it will reduce the capacitance because of the lower dielectric constant. In addition, the quality of interfacial layer formed by oxidation is worse and there still will be the more problems of charge trapping.
In order to solve these problems, nitridation treatment could let the atom of nitrogen bond with these dangling bonds and fix it while entering the interface layer, and then improve the stability and reliability of interface. Therefore, nitridation treatment is a workable solution to improve interface quality. As note before m the problem about using high-k materials to replace SiO2 is that there are too many defects in the interface to cause reliability degradation. Therefore, when we use high-k materials, it considers that nitridation treatment is a more suitable way to improve reliability and thermal stability of the device. There are several kind of treatment methods [43][44]. According to [45], we can understand that the effect of plasma nitridation is better than thermal nitridation
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because high-k material are afraid of high temperature. As long as the temperature reaches certain degree, we can see phenomenon of crystallization. The crystallization of dielectric will raise leakage current substantially, because it offers the path of leakage current. On the other hand, the meaning of plasma nitridation is to activate the gas source first.
The high activation energy of radical will provide better recovery which is better than thermal nitridation. For all these reasons, we adopt plasma nitridation to improve reliability in present experience.
2.3 Plasma fluorination
Threshold voltage instability and device degradation are still major concerns for MOSFETs using high-k gate dielectrics due to high interface and bulk density. Hydrogen (H) and deuterium (D) anneals have been found to help passivate these traps with significantly improved device performance [46]. But the bonding between high-k dielectric (or Si) and H is still not significantly stable to meet the requirement of reliability.
Recently, fluorinated gate dielectrics have been shown to improve the high-k (or Si)/Si interface [47][48]. The beneficial effects of fluorine for attaining more robust oxide have been attributed to its possible ability to improve the interfacial region by terminating the Si dangling bonds, strain relaxation due to breakup of highly strained Si-O-Si bonds by F [49][50], a higher bond strength of the Si-F bond (5.81eV) [51] compared to the Si-H bond (3.6eV) [52]. Thus, the pileup of F at the interface that replaces the Si-H bond by a stronger Si-F bond provides higher interfacial robustness. At the interface, where there are many Si damgling bonds, F
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is effective in replacing weaker bonds. Therefore, for fluorination, fluorine can passivate the gap states of HfO2 completely. It has been found that silicon incorporated HfO2 can enlarge the band gap, improve the thermal stability performance, and suppress the crystallization.
2.4 Dual Plasma treatment
In this experiment, we expects to obtain the advantages that combined plasma fluorination with plasma nitridation. The method that combined plasma fluorination with plasma nitridation calls dual plasma treatment.
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Chapter 3
Experiments of Al/Ti/HfO2/Si MIS capacitor 3.1 Use MOCVD to prepare high-k thin film
There are several methods to prepare high-k film , such as chemical
vapar deposition (i.e. ALCVD MOCVD PECVD etc.) [53]-[55] and physical vapor deposition (i.e. PLD , Sputtering , E-gun etc.)[56][57].
Table 2-1 is the comparison of deposition techniques which have been used. MOCVD has many advantages including high deposition rate, high crystallization without post annealing, large-area deposition, high throughput, excellent uniformity, excellent step coverage on three-dimensional complex geometries, flexibility for large-scale processing, and a simple experimental system compared to physical vapor deposition which requires high-vacuum equipments. Therefore, we used the MOCVD methods to prepare high-k film below.
MOCVD (Metal-Organic Chemical Vapor Deposition) is a widely
used technology for depositing a variety of thin films, including metal oxide silicate films, for high-k gate dielectric applications. The basic steps in MOCVD deposition method are as follows :
1. MO precursor in company with N2 process gas and O2 process gas are injected into the reactor.
2. The sources are mixed inside the reactor and transferred to the deposition process chamber.
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3. At the deposition process chamber, high temperature results in the decomposition of sources and other gas-phase reactions, forming the film precursors that are useful for film growth and byproducts.
4. The film precursors transport to the growth surface.
5. The film precursors are absorbed on the growth surface.
6. The film precursors diffuse to the growth site.
7. At the surface, film atoms incorporate into the growing film through surface reaction.
8. The byproducts of the surface reactions desorb from the surface.
9. The byproducts transport to the main gas flow region away from the deposition area toward the reaction. Then the wafer exits.
3.2 Rapid thermal annealing system
METAL RTA-AG 610 was a single-wafer lamp-heated and computer controlled rapid thermal processing (RTP) system. Water and compressed dry air (CDA) cooling system were used to cool down the quartz chamber. High intensity visible radiation heating and cold-heating chamber walls allow fast wafer heating and cooling rate. The tungsten halogen lamps were distinguished into five groups, and the relative percentage of lamp intensity can be adjusted individually for each group to achieve uniform temperature distribution. Temperature was obtained from pyrometer and precise controlled by computer. Two gas lines were used in the system which can be switched between Ar and N2. Before RTA process started, one minute N2 gas purge was performed to minimize the water vapor introduced during wafer loading and also swept
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unwanted particles induced during process. A fast heating rate of 100℃/s was chosen in this work. When anneal was complete, chamber temperature was quickly cooled down from 900℃ to 500℃ by N2 purge 30 seconds. Then, the chamber was slowly cooled down to 280 without N2 purge to avoid creaking of films. After five minutes later, wafers can be taken out from the chamber. Films’ creak can be avoided by two-steps-cooling method.
3.3 Plasma treatment system
In this experiment, we use plasma pre-treatment (before HfO2 film deposition) Si surface after RCA clean to improve the High-k/Si interface quality. When the PDA (Post-Deposition-Annealing) was finished, some samples also were subjected to an additional plasma treatment in order to improve the electrical properties of gate dielectric. There were various source gas (N2, N2O, NH3, CF4) and process time (10~120 seconds) as the experiment conditions. Fig 2-1 illustrates that PECVD (Plasma-enhanced chemical vapor deposition) is a process used to deposit thin films from a gas state (vapor) to a solid state on a substrate. Chemical reactions are involved in the process, which occur after creation of plasma of the reacting gases. The plasma is generally created by RF (AC) frequency or DC discharge between two electrodes, the space between which is filled with the reacting gases.
The PECVD system in this experiment which is a Samco model PD-220N. This is a CVD system designed for low temperature (typically
~ 200-400℃) depositon of silicon based materials. It’s also provides the
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capacity to process five 3‖ wafers , three 4‖ wafers , or one 8‖ wafer per cycle.
3.4 E-gun system
After plasma treatment and PNA, we deposited Ti and Al as electrical by E-gun. And finished all manufacturing process, we used E-gun deposited Al as back electrical too. Figure 2-2 shows E-gun work theorem, the system is always in vacuity, and the materials which we wanted to deposited was in the boat. We melt down the materials by heating, and using the electron-beam to bombard the materials to proceed evaporation. The chamber pressure was 10-6 mTorr when we deposited.
After the deposited Ti and Al we could proceed lithography and etching.
3.5 MIS capacitors fabrication process
For the purposes of this research, MOS capacitors were fabricated.
The silicon wafer used in this experiment were four inch (100) orientated p-type wafer. It was on side polished and its resistivity 5~10 ohm-cm.
3.5.1 The experiment of plasma fluorination treatment
After standard initial RCA clean, wafers were put into chamber of the PECVD and plasma fluorination treats the Si surface. The plasma fluorination treatment conditions were in pure CF4 gas for 10 sec, 20 sec, 30 sec, and 40 sec respectively and the flow rate were 100 sccm and bias 20W in the 300℃ environment.
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After the plasma treatment were finished, the wafers were put into chamber and grew HfO2 layer with MOCVD. After the thin films were deposited, most samples were annealed in a N2 ambient for 30 sec at 600℃ after deposition (PDA , Post-Deposition Anneal) by rapid thermal annealing (RTA). Pure titanic was deposited on the HfO2 layer by e-gun evaporation system and aluminum films were evaporated on the top side of wafers. Mask defined the top electrode. Then, we used wet etching to etch undefined Al and Ti films. After patterning, backside native oxide was stripped with diluted HF solution, and Al was deposited as bottom electrode. The detailed fabrication process flow was listed as follows 1. As shown in Fig 2-3
(1) Si substrate RCA clean
(2) Plasma fluorination treatment (3) Annealing by RTA
2. As shown in Fig 2-4
(1) 4nm HfO2 was deposited on the sub-Si by MOCVD.
(2) PDA by RTA 3. As shown in Fig 2-6
20nm Ti was deposited on the HfO2 layer by E-gun evaporation system.
4. As shown in Fig 2-7
400nm Al was deposited on the Ti layer as top electrode by E-gun evaporation system.
5. As shown in Fig 2-8
Undefined Al was removed by wet etching.
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6. As shown in Fig 2-9
Undefined Ti was removed by wet etching (1%HF).
7. As shown in Fig 2-10
Al was depodited on the back side of sub-Si as bottom electrode by E-gun evaporation system.
3.5.2 The experiment of plasma nitridation treatment
After standard initial RCA clean, wafers were put into chamber and grew HfO2 layer with MOCVD system. After the thin film were deposited, some samples were annealed by rapid thermal annealing (RTA) and then we used the PECVD to plasma nitridation treat the high-k surface. The plasma treatment conditions were in pure N2, NH3, and N2O gas for 120 sec respectively and the flow rate were 100 sccm and bias 20W in the 300℃ environment. Pure titanic was deposited on the HfO2 layer by e-gun evaporation system and aluminum films were evaporated on the top side of wafers. Mask defined the top electrode. Then, we used wet etching to etch undefined Al and Ti films. After patterning, backside native oxide was stripped with diluted HF solution, and Al was deposited as bottom electrode. The detailed fabrication process flow was listed as follows.
1. As shown in Fig 2-4
(1) Si substrate RCA clean
(2) 4nm HfO2 was deposited on the sub-Si by MOCVD.
(3) PDA by RTA 2. As shown in Fig 2-5
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(1) Plasma nitridation treatment (2) PNA by RTA
3. As shown in Fig 2-6
20nm Ti was deposited on the HfO2 layer by E-gun evaporation system.
4. As shown in Fig 2-7
400nm Al was deposited on the Ti layer as top electrode by E-gun evaporation system.
5. As shown in Fig 2-8
Undefined Al was removed by wet etching.
6. As shown in Fig 2-9
Undefined Ti was removed by wet etching (1%HF).
7. As shown in Fig 2-10
Al was deposited on the back side of sub-Si as bottom electrode by E-gun evaporation system..
3.5.3 Dual plasma treatment for MIS capacitors
After standard initial RCA clean, wafers were put into chamber of the PECVD and plasma fluorination treats the Si surface. The plasma fluorination treatment conditions were in pure CF4 gas for 10 sec, 20 sec, 30 sec, and 40 sec respectively and the flow rate were 100 sccm and bias 20W in the 300℃ environment. After the plasma treatment were finished, the wafers were put into chamber and grew HfO2 layer with MOCVD.
After the thin films were deposited, most samples were annealed in a N2
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ambient for 30 sec at 600℃ after deposition (PDA, Post-Deposition Anneal) by rapid thermal annealing (RTA). Then, we used the PECVD again to plasma nitridation treat the high-k surface. The plasma treatment conditions were in pure N2, NH3, and N2O gas for 120 sec, and respectively and the flow rate were 100 sccm and bias 20W in the 300℃
environment. Pure titanic was deposited on the HfO2 layer by e-gun evaporation system and aluminum films were evaporated on the top side of wafers. Mask defined the top electrode. Then, we used wet etching to etch undefined Al and Ti films. After patterning, backside native oxide was stripped with diluted HF solution, and Al was deposited as bottom electrode. The detailed fabrication process flow was listed as follows.
1. As shown in Fig 2-3
(1) Si substrate RCA clean
(2) Plasma fluorination treatment (3) Annealing by RTA
2. As shown in Fig 2-4
(1) 4nm HfO2 was deposited on the sub-Si by MOCVD.
(2) PDA by RTA 3. As shown in Fig 2-5
(1) Plasma nitridation treatment (2) PNA by RTA
4. As shown in Fig 2-6
20nm Ti was deposited on the HfO2 layer by E-gun evaporation system.
5. As shown in Fig 2-7
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400nm Al was deposited on the Ti layer as top electrode by E-gun evaporation system.
6. As shown in Fig 2-8
Undefined Al was removed by wet etching.
7. As shown in Fig 2-9
Undefined Ti was removed by wet etching (1%HF).
8. As shown in Fig 2-10
Al was depodited on the back side of sub-Si as bottom electrode by E-gun evaporation system.
3.6 The MIS Capacitors measurement
After the Al/Ti/ HfO2 /Si MIS capacitors were prepared, we used semiconductor parameter analyzer (HP4156C) and C-V measurement (HP4284) to analysis electric characteristics (i.e. I-V, C-V, EOT, leakage current density etc.).
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Chapter 4
Electrical characteristics of Al/Ti/HfO2/Si MIS capacitors In order to measure the C-V characteristics of our MIS capacitors, we used HP 4284A precision LCR meter in our experiments. We swept the gate bias from inversion region to accumulation region to obtain the curve at the frequency of 50 kHz from -2V to 1V. And the leakage current of our MIS capacitors were analyzed from the current-voltage (I-V) characteristics measured by an HP4156A semiconductor parameter analyzer. There are four kinds of plasma treatment with different souce gas (i.e. N2 , N2O , NH3) for different process time (i.e. 0 sec , 30sec , 60sec , 90sec , 120sec , 150sec , 180sec ) and CF4 plasma treatment for different process time (i.e. 0sec , 10sec , 20sec, 30sec , 40sec). Finally, we combine the two plasma process to obtain the optimal condition. Hence, the relationship of difference process time with CF4 in one kinds of plasma treatment will be discussed.
The hysteresis will also be discussed in this experiment. The name of Hysteresis was borrowed from electromagnetic. It is means that when a ferromagnetic material is magnetized in one direction, it will not relax back to zero magnetization when the applied magnetizing field is removed. It must be driven back to zero by the additional opposite direction magnetic field. If an alternating magnetic field is applied to the material, its magnetization will trace out a loop called a hysteresis loop [58]. The hysteresis phenomenon is similar to the C-V curve in the MIS capacitor device. When we apply a voltage in reverse, it will not fit the
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original C-V curve measured previously. It is due to the interface traps which can trap charges to have impact on the flat band voltage and C-V curve. The C-V characteristics for hysteresis extraction were measured by sweeping the voltage from accumulation to inversion (-2V→1V) and then sweeping back (1V→-2V) at a frequency of 50kHz.
4.1 Electrical characteristics for HfO2 with nitridation plasma treatment
There are three kinds of plasma treatment with different source gas (i.e. N2, N2O, NH3) and they were treated for different process time (i.e.
30 sec, 60sec, 90sec, 120sec, 150sec and 180sec).
4.1.1 Electrical characteristics for HfO2 with N2 plasma treatment for different process time
Fig. 4-1 reveals the capacitance-voltage (C-V) characteristics of HfO2 gate dielectrics treated in N2 plasma and DC bias 50W for different process time. The capacitor treated in N2 for 120 sec shows the maximum capacitance density among these samples with different process time. In addition, other samples which treated in N2 plasma all present the larger values than the capacitors without whole plasma nitridation process. This phenomenon indicates that the N2 plasma treatment was workable to improve the capacitance. The factor of improvement might be from that the PDA process and the nitrogen incorporation in the HfO2 dielectrics,
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which could enhance the electronic polarization as well as the ionic polarization, so the dielectric constant of the HfO2 thin films increases just as Hf-silicate thin film and SiO2 thin film. Besides, the capacitance density of the samples treated in N2 plasma for 150 sec and 180 sec are degraded. The reason could be the damage caused by the N2 plasma.
The J-V characteristics of the HfO2 capacitors treated by N2
plasma and DC bias 50W with different process time from 0V to -2V are described in Fig. 4-2. It can be observed that the samples which treated in N2 plasma all present the smaller leakage current density than the leakage current density without whole plasma nitridation process. The gate leakage current density treated in N2 for 120 sec shows the minimum current density among these conditions. The lower leakage shows that the weak structure of interface must be fixed by the plasma nitridaiton. In Fig.
4-1 and Fig. 4-2, it appears that the samples treated in N2 plasma for 120
4-1 and Fig. 4-2, it appears that the samples treated in N2 plasma for 120