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Chapter 1 Introduction

1.3 Thesis Organization

CMOS technology to achieve advantage of low power consumption, high linearity and high conversion gain. The method to realize the mentioned advantages will be described in the following chapters.

Chapter 2 Receiver Architecture

Recently, commercial RF and wireless communication products have become more prevalent. The RF wireless communication carrier frequency has increased to 12 GHz and related fabrication processes have shrunk to the nanometer scale. Numerous RF and wireless products, such as mobile ‘phones, RFID, GPS, Bluetooth products and wireless networks, are now affecting daily life.

This chapter introduces several architectures, including an active mixer and a passive mixer. The architectures of heterodyne receivers and homodyne receivers are also discussed [2-3].

2.1 Introduction to RF Receivers

A wireless communication system transmits carrier information over a limited bandwidth, such as 30 kHz in IS-54, 200 KHz in GSM and 20 MHz in WLNA.

The narrow bandwidth of the system affects the design of an RF section. The transmitter must employ narrowband amplification and filter to prevent interference from an adjacent channel, as displayed in Fig. 2.1. The receiver must process a weak signal and reject strong interference from nearby antennae and bandpass filter signals, as presented in Fig. 2.2.

B P F P ow er

A m plifier

A djacent C hannels

T ransm itted C hannel

Fig. 2.1 Transmitter front end of a wireless transceiver A d ja c e n t

C h a n n e ls

R e c e iv e r , D e s ir e d C h a n n e l

B P F L o w n o i s e A m p li f i e r

Fig. 2.2 Receiver front end of a wireless transceiver

In this section, we will describe the heterodyne, homodyne and image rejection architectures for the receiver design.

2.1.1 Heterodyne Receivers

The heterodyne receiver transforms a signal from carrier radio frequency (RF) to intermediate frequency (IF), base-band frequency. Heterodyne receivers are of two types - (I) simple heterodyne receiver and (II) multiple heterodyne receivers. As described above, the receiver front end signal suffers large interference and distortion

of the original signal and requires prohibitively high Q values.

2.1.1.1 Simple-Stage Heterodyne Receivers

The single stage heterodyne receiver in one stage converts radio frequency to intermediate frequency. It utilizes only one mixer. As shown in Fig 2.3, the radio frequency is received from the antenna, passed through an RF filter to suppress interference; sent to a low-noise amplifier (LNA) and then to the mixer, and eventually delivered to base-band chip. The simple heterodyne design must take into account the choice of IF and so depends on trade-offs among three parameters - (I) image reject filter loss, (II) image noise, and (III) spacing between image and desired band. Item III is of particular importance since designing a narrow band filter is very difficult.

RF Filter LNA

Lo Frequency Image Reject

Filter Channel

Select Filter

IF Amplifier A/D Converter

Base-Band

Off-Chip

Fig. 2.3 (a) Simple heterodyne receiver

Desired Channel

Image Reject Filter

Image

Interference

ω

1

ω

image

2ωif

ω

Channel Filter

ω

if

ω

image

ω

Image

0

Fig. 2.3 (b) High IF rejection of image versus suppression of interferers

Desired Channel

Image Reject Filter

Image

Interference

ω

1

ω

image

2ωif

ω

Channel Filter

ω

if

ω

image

Image

0

Fig. 2.3 (c) Low IF rejection of image versus suppression of interferers If the radio frequencyωrfloif, then the mirror image may happen at frequencyωrflo −ωif. The mixer and local oscillator frequencies make it difficult

in the determination of the overlap frequency on the IF port. Accordingly, an image rejection filter (IR Filter) must be added before the mixer. The IR filter typically requires a high-Q filter, but the integration circuit (IC) does not allow the simple implementation of a high-Q solution. Therefore, the integration of the system is

complicated.

This simple heterodyne raises a series problems associated with mirror image rejection frequency interference. The image frequency degrades the sensitivity and signal-to-noise ratio (SNR). The image frequency is defined as ωimage ≡ωrf −2ωif ; the frequency of the down-conversion to IF is defined ωif ≡ωrf −ωlo; RF is ωrf, and the local oscillator frequency is ωlo. The down-converter mixer process must be

modeled mathematically to solve the image problem. The RF and LO input equations are defined as Vrf = Arf cosωrft and Vlo = Alocosωlot . and A =lo A = A is rf

The second term is the intermediate frequency (IF) of interest.

lo

Therefore, strong interference at the image frequency affects the IF signal, then the IF will strongly interfere with the desired signal, degrading the system (SNR). For the simple heterodyne receiver, an accurate IF frequency must be chosen. The frequency declines to IF from RF and the local frequency only once. A high IF is chosen. Accordingly, a high Q filter must be employed. The high-Q filter is not simple to implement with SoC and high-speed A/D converter design is very challenging. If a lower IF is chosen, the image frequency will not be eliminated and the high image frequency noise on IF will be excessive. Figures 2.3(b) and 2.3(c) reveal that if the IF is high, then the image can be suppressed but complete channel selection is very difficult. Therefore, the simple heterodyne has sensitivity and selectivity problems.

A simple heterodyne receiver application must take into account sensitivity and selectively, and the problem of integration for a SoC system.

2.1.1.2 Multiple Heterodyne Receiver

To solve the problem described in the preceding section, the concept of the simple heterodyne can be expanded to multiple heterodyne down-converter mixers. The multiple heterodyne has at least two frequency levels from the RF frequency down to IF, to eliminate the filter Q value requirement. Partial channel selection can be conducted and the image rejected in two stages, as shown in Fig.

2.4 (a).

RF Filter LNA

Lo Frequency 1 Image Reject

Filter 1 Channel

Select Filter 2

Fig. 2.4 (a) Dual-IF heterodyne receiver

Desired Channel

Image

RF Filter BPF 1

A B

Fig. 2.4 (b) Dual-IF heterodyne receiver frequency conversion.

Despite the fact that the multiple heterodyne receiver does not require high Q,

integrating an SoC system will require that the band pass filter has a very large IC.

Figures 2.4(a) and 2.4(b) show spectra at various points in the dual-IF receiver. The frond-end RF band selection filter suppresses image rejection and the spectra at point as shown figures Fig. 2.4(b) A and B. Following LNA and image reject filter, a spectrum from point as shown figures Fig. 2.4(b) B to C can be obtained. Then, the desired channel and the adjacent interference must be translated the spectrum at point C. The adjacent interference is slightly suppressed by BPF-2. Similarly, the second mixer provides reasonable linearity and signal translates to the second IF as shown figures Fig. 2.4(b) spectra D and E. After The BPF-3 channel filter absolutely suppresses the adjacent interference signal, as shown in Fig. 2.4(b), in spectra F to H.

Finally, the IF signal is amplified.

The second down-conversion mixer typically generates both in-phase (I) and quadrature (Q) which components of the signal are used to translate the spectrum to zero frequency, yielding the block diagram in Fig.

2.5

RF Filter

LNA A/D

Converter

Base-Band

Off-Chip

LPF

LPF 90 Shifter0

AGC

AGC Lo

. Fig. 2.5 Quadrature down-conversion zero IF receiver.

Despite the addition of the extra complexity component of the RF and IR filter and the increased size on SoC, heterodyne receivers are conventionally used as the most reliable.

2.1.2 Homodyne Receivers

Figure 2.6 shows a fundamental architecture of a homodyne receiver. The Lo frequency equals the RF input carrier frequency; such receivers are called “zero-IF”

or “direct-conversion”. The homodyne receiver is designed as a low-pass filter instead of a channel select function.

R F F ilte r

L N A A /D

C o n v e rte r

B a se -B a n d L P F

ω0

ω0

ω0 ω 0 ω

Fig. 2.6 Simple homodyne receiver.

The homodyne receiver architecture has evident relative characteristic without image reject signals. Since the homodyne receiver’s RF receiver signal is through RF filter, LNA, mixer, and to LPF, which can remove image frequency by itself, the homodyne architecture does not require an image reject filter. Consequently, the homodyne requires no external connected component module, and can be integrated as a single entity.

A direct down-conversion receiver with a spectrum translated to zero frequency suffers from such issue such as DC offset, I/Q mismatch, even-order distortion, flicker noise and LO leakage problem, as described below.

(a). DC Offset

Since the local oscillator frequency equals RF, the isolation between the LO port and the LNA input or mixer input is finite. The strong extraneous signal is fed through from the LO port to the LNA input and the mixer input, as shown in Fig. 2.7 (a).

Similarly, if a large leakage from the LNA to mixer input interferes through to LO port, it is possible multiplied by itself signal as shown in Fig, 2.7 (b), then, LO port signal and mixer input signal couple signal can corrupt or distort the original signal of the LAN or mixer input. The signal coupling issue then involves partial DC offset and may cause A/D converter saturation, after causing a demodulation error. This effect arises from the substrate or capacitance coupling.

RF Filter

LNA A/D

Converter

ω

0 LPF

ω

0

RF Filter

LNA A/D

Converter

ω

0 LPF

ω

0

LO Leakage

LO Oscillator

LO Oscillator Interference

Leakage

(a) LO leakage

(b) Strong interference signal.

Fig. 2.7 Direct down-conversion architecture of DC-offset (self-mixer).

(b). I/Q Mismatch

The mixer is input LNA RF signal and LO port signal. IF both signals phase mismatch condition, causing down-converters signal constellation distortion, increasing the bit error rate. Figure 2.8 displays the mixer input from LNA RF input signal and local signal input contributions of gain, phase error, and above makes I/Q mismatch QPSK signal constellation.

R F F ilte r

L N A A /D

C o n v e rte r

B a s e -B a n d

O ff-C h ip

L P F

L P F 9 0 S h ifte r0

A G C

A G C L O

P h a se a n d G a in E rro r

P h a s e a n d G a in E rro r

Q

I Id e a l

Q

I Id e a l

(b ) G a in E rro r (c ) P h a se E rro r

P h a s e a n d G a in E rro r

P h a se a n d G a in E rro r

(a ) I/Q m ism a tc h c o n trib u tio n s b y se v e ra l s ta g e s

Fig. 2.8 I/Q mismatch contributions for difference stage and on QPSK signal constellation.

(c). Even-Order Distortion

The low noise amplifier (LNA) may cause even-order distortion interference adjacent to the IF channel, as shown in Fig. 2.9. The second term harmonic interferes with the zero-IF signal.

ω

LO

ω

Interferences

LNA Desired

Channel

0

ω

IM2 IM3 Feed-through 0

IM2

ω

IM3

Fig. 2.9 Even-order distortion on interferes.

(d). Flicker Noise

The homodyne down-conversion spectrum is extended to zero frequency.

Hence, in the homodyne architecture, low-frequency noise of the device generally approaches a function proportional to 1/f and named as flicker noise. The flick noise dominates in low frequency region and degrades the signal-to-noise ratio (SNR).

2.1.3 Comparison of the receiver architectures

Table 2 lists the key features for a receiver and makes comparison between heterodyne and homodyne receiver architectures.

Table 2.1 Comparison of Heterodyne and homodyne receivers architecture Receiver Architecture

Comparison Item

Heterodyne receiver Homodyne Receiver

Frequency conversions Twice or More Once

Channel Filter IF Base-Band

Required Discrete Filter RF, Noise, IF RF

Required High Q filter Yes No

Monolithic integration base-band to signal chip (SoC)

Very Difficult (More passive component)

Suitable

IF Selection Base on system design

specification.

Zero IF

Mainstream Implement to commercial

product.

Researching…

2.2 Design Parameters and Non-ideality

For a down-conversion mixer design, the key performance parameters, such as linearity by gain compression (P-1dB) and third-order intercept (IP3), sensitivity, noise figure, dynamics range, and conversion gain, will be considered and discussed in the following sections.

2.2.1 Linearity

Most of systems approximated as linear systems under sufficiently low power actually reveal nonlinear characteristics in higher power region. The small signals models used for RF and analog circuits, based on linear approximation are no longer valid under increasing power. The primary effect of nonlinearity is the frequency interference from adjacent channel frequency, which corrupts the desired signal. A strong signal driven RF amplifier or mixer will go into nonlinear region and the nonlinear signal generates an interference frequency, which may influence the desired signal. Therefore, the linearity of the receiver determines the maximum allowable input signal level.

For simplicity, these nonlinear systems are assumed to be memory-less and time-invariant. Taylor’s series are used to analyze the nonlinearity.

2 3

be independent of frequency and the receiver system can be approxminated as a linear

system provided that the coefficient |αi1|>|αi| .

Generally, the analytic linearity problem involves a sinusoidal input in Eq. (2.7).

Thus, we employ input signal as follows : t Substituting equation (2.8) into (2.7).

cos3 3cos cos3 3cos

4 4

Listing the fundamental and harmonic second-order and third-order terms gives the following.

The first-order terms with fundamental frequency is expresses by (2.10) and (2.11):

ω2:

Second-order terms:

1: 2A12cos2 1t

Third-order terms:

3ω : 1 3A13cos3 1t

Through the Fourier transformation from time domain to frequency domain, )

Y yields the inter-modulation output spectrum in the frequency domain, as shown in Fig. 2.10.

1 ω

Fig. 2.10 Inter-modulation output spectrum in the frequency domain.

Generally, in RF linear systems, the saturation of conversion gain follows an increase in the input signal, accelerating conversion gain saturation. Equations (2.10)

and (2.11) indicate that the amplitude of the desired signal is

2 output conversion gain in Eq. (2.20) can be dropped to zero. Accordingly, the third-order signal corrupts the gain as the input signal amplification increases.

2.2.1.1 P-1dB Gain Compression

As mentioned above, when the strength of the input signal to the amplifier drives the amplifier into saturation, the output signal from the amplifiers will be clamped. As a result, the linearity of a system determines the maximum range allowed

for the input signals to the amplifiers. This amplifier working range is defined by the input signal level at which the small-signal gain drop by 1 dB. This is called the 1dB compression point (P-1dB), as shown in Fig. 2.11.

Pin

1 dB decay

20log(Ain)=Pin (dBm)

Pout

OP-1dB=Pout (dBm)

Slop=1

Fig. 2.11 P-1dB compression gain point

To determine 1dB gain compression point, a single tone excitation is carried out.

A single input signal is assumed and given by A2=0 in Eq. (2.8). In this case α3<0

(negative) and the second term degrades the gain.

t

The 1dB compression point is define as the input power level at which the

output power drops by 1 dB.

Equation (2.22) does not take into account the high-order harmonic terms. Due to the fact, the actual P-1dB compression point value is generally below what expected from Eq. (2.22).

Most of the measured P-1dB are expressed in dBm. dBm is an absolute unit of

RF power. Therefore, dBV is converted to dBm. dBm is defined as a power dissipation of 1 mW at a characteristic impedance of 50 Ω in a system.

Hence,

2.2.1.2 Third–order Intercept Point (IP3)

A receiver cannot remove two adjacent interfering signals using a filter, as

presented in Fig. 2.10. The narrow band filter design is not simple. Signal interference produces an inter-modulation of signals, affecting the RF system. The inter-modulation signal degrades system performance, and the bit error increases after demodulation.

The third-order intercept point is determined by a two-tone test, as shown in Fig.

2.12. The two-tone test is generally employed to identify adjacent channel frequency interferences, caused by the signal reciprocal effects of internal components. Two sinusoidal waves with frequencies of ω and 1 ω are applied to an amplifier. 2 Equation (2.8) is substituted into Eq. (2.6). The third-order terms are given by Eqs.

(2.17) and (2.18) and the third-order intercept is plotted in Fig.2.11.

Linear

Fig. 2.12 Third-order inter-modulation between two tone interferences.

As shown in Fig. 2.11, the third-order intercept point terms are set across equal to the first-order point terms. Setting A1=A2=A in Eq. (2.17), and equating the coefficient α A to α A , yields,

3

Hence, IIP3 is related to P-1dB by the equation as follows,

IIP3 = 1dB compression point + 9.64 dB (2.27) The graphic shown in Fig. 2.11 can be used to calculate the input and output third-order intercept points given by (2.28) and (2.29) for IIP3 and OPI3, respectively.

dBm

2.2.1.3 Sensitivity

The sensitivity of an RF receiver system is determined by the minimum signal level that the receiver system can detect under an acceptable signal-to-noise ratio.

Mathematically, the noise figure (NF) is defined as

in

where Sin and Nin represent the input power and the source resistance noises per unit

bandwidth. Sout= GSin and G is the power gain. The channel bandwidth (BW) is across the overall signal.

Therefore, the input signal power across the channel bandwidth is obtained by rewriting Eq. (2.30) as,

Taking logarithms gives,

)

Equation (2.32) predicts the sensitivity performance from the output SNR. The receiver input system is assumed to exhibit conjugate matching at the input; Nin is obtained as the thermal noise power :

Hz

Thus, the minimum input power Sin,min is derived as

min min

, 174 NF 10log(BW) SNR

dBmHz

Sin =− + + + (2.34) In Eq. (2.34), the sum of the first three terms is sometimes called the “ noise floor ”, which is generally employed to define the dynamic ranges, such as SFDR and BDR in the following section. Since SNRminis a function of the bandwidth, the noise floor is determined by setting SNRmin in Eq. (2.34) to zero.

2.2.1.4 Dynamic Range

The dynamic range (DR) is defined as the ratio of the maximum allowed input signal level to the minimum input signal level at which the signal quality is maintained [2], [3]. Two definitions of dynamic range are adopted to evaluate the dynamic performance, as shown in Fig. 2.13. These are called spurious-free dynamic range (SFDR) and blocking dynamic range (BDR). For both definitions of dynamic range, the minimum boundary is defined as the noise floor plus SNRmin. The spurious-free dynamic range (SFDR) and blocking dynamic range (BDR) are interpreted as follows.

(a). Spurious-free dynamic range (SFDR).

The upper bound of SFDR is defined as an input two-tone test signal at which the third-order inter-modulation (IM3) distortion products do not exceed the noise floor, as displayed in Fig. 2.14.

P in (d B m )

Fig. 2.14 Upper band of SFDR

From Eqs. (2.9) and (2.17), a quick calculation of IM3 is,

Substituting Eq. (2.25) into Eq. (2.35) and taking logarithms, yields,

2

where Ain is the input level at each frequency.

2 2

PIM, represents the power of the IM3 components at the output.

Since Pout =Pin +G and PIM,out =PIM,in +G, where G is the circuit gain,

2 3 3Pin PIM,in

IIP

= (2.39)

The input level for the IM products should become equal to the noise floor.

Thus,

The relationship between SFDR and SNRmin is thus obtained.

min

(b). Blocking dynamic range (SFDR)

The upper boundary of BDR is the P-1dB compression point, and the overall gain declines to zero since the small signal gain is attenuated by large interference.

Figure 2.13 is used to obtain the equation for calculating BDR.

1dB nF min

BDR =PPSNR (2.42) Attempt to find out the relationship between SFDR and BDR.

Equations (2.26) and (2.41) are manipulated to yield, .

1dB 3 9.64

PIIPdB (2.43)

min

3 3( )

2 nf

IIP = SFDR+SNR +P (2.44)

Thus,

1 min

min

3 1

2 2 9.64

dB nF

BDR P P SNR

SFDR SNR dB

= − −

⇒ = + − (2.45)

Both compression and blocking reduce the desired signal and then SNR is degraded.

Chapter 3.

Design of a 5.5 GHz CMOS Active Mixer

The accuracy of MOSFET model for simulating high frequency characteristic will have direct and dramatic impact on the RF circuit design and performance optimization. A compact CMOS model should cover both active and passive devices, such as MOS transistors, varactors, capacitors, inductors, and resistors. An accurate compact RF CMOS model can help facilitate RF circuit design with increased first-pass success. In this thesis, TSMC 0.18 μ m mixed signal 1P6M silicide 1.8V/3.3V RF CMOS models are used in circuit simulation for the design of a new down-conversion mixer. This chapter discusses the trade-off of RF performance with the minimum noise figure (NFmin), conversion gain, and linearity.

A CMOS based RF amplifier or mixer circuit design can adopt common source and common gate for high-frequency applications. The common source exhibits a high conversion gain, and wide matching bandwidth in the deep-submicron process.

The mixer design focuses on the trade-off between various performance parameters, such as the conversion gain, linearity, and flicker noise in the direct conversion receiver.

3.1 Mixer

In general, the basic mixer architectures can be classified as two major categories, one is the active mixer and another is the passiver mixer. The passive

In general, the basic mixer architectures can be classified as two major categories, one is the active mixer and another is the passiver mixer. The passive

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