Chapter 3 Design of a 5.5 GHz CMOS Active Mixer
4.3 Chip Circuit Layout
Implementing analog and RF circuits is very difficult. Since the analog and RF of the layout will determine the analog and RF circuit performance. Even when all model parameters of the design are the same, changing he layout can totally change the performance of the circuit. Therefore, the circuit layout is an important topic, especially when the desired frequency is high.
Figure 4.11 shows a circuit layout with symmetric differential pair architecture.
The symmetric layout and differential circuit architecture can improve the circuit and help overcome parasitic mismatch. Perpendicular turns of the medal must be avoided:
for example, the in Fig. 4.12(b) is better than that in Fig. 4.12(a).
Fig. 4.11. On-wafer chip layout of mixer for symmetric layout
(a) (b) Fig. 4.12 Turning in layout of perpendicular
Chapter 5.
Measurement
The circuit must be designed to support measurement. For RF measurement, suitable instruments and testing are very important. The following section presents the mixer measurement results in the below.
5.1 Measurement Setup
In this circuit design is measure down-conversion mixer performance. The measurement function includes conversion gain, linearity, noise figure and power consumption. Figure 5.1 shows a testing circuit board for an off-chip circuit for IF performance measurement.
Fig. 5.1 Off-chip circuit and IF test board
5.1.1 Measurement Configuration
Three signal generators from 250kHz to 40 GHz are required for two-tone testing (IIP3). An Agilent E8257D ESG is employedto support signal generation. The
Agilent 8563E spectrum analyzer or Agilent Infinium oscilloscope is utilized to detect the IF output signal. The power combiner is the 2way-0° from Mini-Circuits.
OPA-695 is applied for single-end output signal measurement from IF signal output.
The IF output uses a high impedance to produce reasonable voltage gain. However, the standard impedance of the spectrum analysis is 50 Ω, which does not statisfy the
high impedance requirement. Two methods exist to solve this problem; (a) active probe (Agilent 85024A AT Probe). (b) oscilloscope impedance set to 1MΩ. Figure 5.2
shows the setup for down-conversion mixer performance measurement.
Power Combiner
E8257D
E8257D
BALUN RF DUT
BALUN LO
E8257D (On Board Circuit)
(On Board Circuit) (On Chip Circuit)
-+OPA-695
Spectrum Analyzer (Agilent 8563E)
or Oscilloscope (Agilent Infinium)
(On Board Circuit)
IF
Fig. 5.2 Down-conversion mixer measurement setup diagram
5.1.2 Noise Measurement
Figure 5.3 displays the noise figure measurement setup. The noise figure is measured using the Agilent N8975A Noise Figure Analyzer with a noise source. The RF port is connected to the noise source, whose frequency is set to that of the mixer output signal to be measured, while ESG E8257D provides an LO signal to execute down-conversion..
N8975A
NFA
BALUN
RFDUT
BALUN
LOE8257D (On Board Circuit)
(On Board Circuit) (On Chip Circuit)
-+
OPA-695(On Board Circuit)
Noise Source
IF
Fig. 5.3 Noise Measurement Setup
Fig. 5.4 Instruments overview in RF measured laboratory
5.2 Measurement Results
This section presents the measurement results, including conversion gain, linearity of P-1dB, IIP3, power consumption and noise figure.
5.2.1 Conversion Gain Measurement
Figure 5.5 presents measured gain vs. input power. The measured result decays to around 13 dB. This root cause is PCB, and on board SMD components characteristic not match simulation parameters, such as LC tanks, Balun circuit.
ESG
Spectrum Analyzer
Power Supply
Oscilloscop
Mixer Testing Board.
Figure 5.6 plots the conversion gain performance vs. radio frequency.
the conversion gain v.s radio frequency sweeping.
Fig. 5.5 Measured gain v.s RF Power input (RF=5.501 GHz, LO=5.500 GHz@ LO=2.5
5.2.2 P-1dB/IIP3 Measurement
P-1dB is said 1-tone tested too. The authors’ laboratory has no AT probe with a
spectrum analyzer. Since the simulated IF output is measured with a resistance of 1MΩ , the spectrum analyzer impedance is 50Ω. Therefore, the oscillator is employed
to measure the conversion gain and P-1dB and IIP3, when the impedance is set to 1MΩ. To measure IIP3, the oscillator function FFT is adopted to obtained the output
signal spectrum. Figure 5.7 plots the measured IF output magnitude. Figure 5.8 plots the measured P-1dB. The linearity of P-1dB is approximately 2.5 dBm.
Fig. 5.6 Measured gain v.s RF input frequency (RF=0 dBm, LO=2.5 dBm, IF output is constant 1MHz)
The IIP3 is said that 2-tone tested too. Figure 5.9 shows the two-tone tested spectrum from the oscillator, and the RF spectrum. Figure 5.10 shows the linearity of IIP3, as displayed to Fig. 5.10. The linearity of IIP3 is approximately11 dBm.
Fig. 5.7 Measured IF output magnitude
Fig. 5.8 Measured P-1dB linearity curve.
Fig. 5.9 (a) Oscillator measured 2-tone test result. .
Fig. 5.9 (b) Agilent spectrum analyzer measured 2-tone test result.
Fig. 5.10 Measured IIP3 linearity curve by 2-tone test.
5.2.3 Noise Figure Measurement
The simulation and measurement of the noise figure of RF mixer circuit is very difficult. First, since the magnitude of the noise figure of the mixer is a function of the LO signal magnitude, this magnitude is the inverse of the output noise figure magnitude. Hence, the obtaining an accurate noise figure is very difficult. Second, the
noise figure analyzer provides only a single-ended measurement solution. Third, the NFA provides a loading impedance of 50 Ω instead of high impedance, with
inconsistence trouble. The limited frequency range of NFA is 10M~26.5GHz. Figure 5.10 presents the mixer noise figure obtained using NFA.
Fig. 5.11 Measured noise figure by NFA.
5.3 Summary
Table 5.1 presents the measurement results.
Table 5.1 Comparison between simulation and measurement results
29.624 dB 11 dBm 2.5 dBm
7.56 dB @ 0dBm 9.40 dB @ -20 9.5 mW
Measurement
26.55 dB 0.5 dBm 5.6 dBm
8.16 dB, RF_ in@ 0dBm 25.088 dB, RF in@
8.1 mW
Simulation Result
Single Side Band RF_In =5.501 GHz,
LO_In=5.5 GHz @2.5 dBm.
IIP3
P1dB (1MHz) Conversion Gain Power Consumption Item
Chapter 6.
Conclusion and Future Work 6.1 Conclusion
A 5.5 GHz receiver front-end mixer for IEEE WLNA 802.11a has been fabricated by 0.18 um RF CMOS technology. The measured performance of the mixer demonstrated a gain of 7.56 dB; IIP3 at 11 dBm, and the noise figure at 29.624 dB.
The simulation can predict that the parallel RC circuits applied in the IF output can improve mixer linearity in terms of IIP3 and P-1dB. This circuit can be working from 5GHz to 6.8 GHz.
The deviation suffered by the measurement compare with simulation such as lower conversion gain and higher noise figure is caused by the process shift, off-chip component mismatch and the model weakness in term of QFN package inductor and resistor equivalent circuit.
6.2 Future Work
The major challenge remained with this work is the deviation between simulation and chip measurement result. It is because that simulation accuracy is acceptable for on chip Balun and LC tank design; however, there is no qualified
simulation tool for Balun and LC tank design on PCB by the method SMD. One more problem is that the resistance due to process deviation will cause shift in power consumption.
The PCB layout can be improved by considering the characteristic wavelength of microstrip line. Regarding Balun circuits design, the replacement of conventional design using passive components by active components [19], [20] can improve this circuit performance, and reduce the size of the on-wafer chip circuit layout .
In Taiwan, there are many IC design houses with strong capability in digital circuit design. Therefore, base-band circuit is generally not a big problem for most of design houses. However, competitiveness in the wireless market depends on the single chip integration with base-band, VCO, PA, LNA, mixer and a filter. The end customers want a total solution from design house in terms of a complete design flow covering from system spec definition through chip design and then to total integration.
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Vita
盧笙豐 Sheng-Feng Lu
Birthday： 1971/04/27
Birthplace：Hsin-ChuCounty, Taiwan Education：
1995/09 ~ 1997/06 B.S. Degree in Department of Electrical, National Taiwan University od Science
& Technology.
2002/09 ~ 2007/06 M.S. Degree in Department of Electronics Engineering & Institute of Electronics,
National Chiao Tung University