Thesis Outline

In this thesis, we performed a high-k dielectric Al2O3 for the MOSFETs device by thermal oxidizing the thin Al and than studied the electrical properties and mechanism of Al2O3 dielectric. Moreover, we have studied the Bias-Temperature Instability (NBTI) on fully Nickel silicide (NiSi) and germanided (NiGe) gate on high-k Al2O3 nMOSFETs and pMOSFETs, respectively. Finally, the Cu contamination on Al2O3 gate dielectric was characterized.

In Chapter 2, we have studied the Al2O3 to use as an alternative gate dielectric.

To ensure good quality, Al2O3 is thermally oxidized from MBE-grown AlAs or Al on Si-substrates. Experimental results indicate that the leakage current from oxidized AlAs is larger than that from directly oxidized Al, which may be due to the weak As2O3 inside Al2O3. The leakage current of a 53 Å Al2O3 is already lower than that of SiO2 with an equivalent oxide thickness of 21 Å.

In Chapter 3, firstly we have reported a very simple process to fabricate Al2O3

gate dielectric with k (9.0 to 9.8) greater than Si3N4. Al2O3 is formed by direct oxidation from thermally evaporated Al. The 48 Å Al2O3 has ~6 orders lower leakage current than equivalent 13 Å SiO2. Good Al2O3/Si interface was evidenced by the low interface density of 1x10¹¹ eVcm^-2 and compatible electron mobility with thermal SiO2. Good reliability is measured from the small SILC after 2.5 V stress for 10,000s.

Secondly high quality La2O3 was fabricated with EOT of 9.6 Å, leakage current of 0.4 A/cm² and Dit of both 3x10¹⁰ eV^-1/cm². The high-k is further evidenced from high MOSFET’s Id and gm with low Ioff. Good SILC and QBD are obtained and comparable with SiO2. The low EOT is due to the high thermodynamic stability in contact with Si and stable after H2 annealing up to 550^oC.

In Chapter 4, we have studied the Bias-Temperature Instability (BTI) on fully Nickel silicided (NiSi) and germanided (NiGe) gate on high-k Al2O3 nMOSFETs and

pMOSFETs, respectively. At an equivalent-oxide thickness (EOT) of 17 Å, the NiSi/Al2O3 pMOSFETs and NiGe/Al2O3 nMOSFETs have comparable threshold voltage (Vt) change of -34 and 33 mV at 85^oC and 10 MV/cm stress for 1 hour. This result is quite different from the more severe native BTI (NBTI) degradation measured in oxynitride pMOSFET than positive BTI (PBTI) in nMOSFET. The extrapolated maximum voltage for 10 years lifetime is 1.16 and -1.12 V from NiSi-NiGe/Al2O3 CMOSFETs that can barely meet the required 1 V operation with 10% safety margin. However, further improvement is still required since the 18 Å oxynitride CMOSFETs have higher 10 years lifetime operation voltage of 2.48 and -1.52 V for PBTI and NBTI, respectively.

In Chapter 5, we have studied the Cu contamination effect on 42 Å thick Al2O3

MOS capacitors with an equivalent-oxide thickness (EOT) of 19 Å. In contrast to the large degradation of gate oxide integrity of control 30 Å SiO2 MOS capacitors contaminated by Cu, the 19 Å EOT Al2O3 MOS devices have good Cu contamination resistance with only small degradation of gate dielectric leakage current, charge-to-breakdown and stress-induced leakage current. This strong Cu contamination resistance is similar to oxynitride (with high nitrogen content) but the Al2O3 gate dielectric has the advantage of higher-k value and lower gate dielectric leakage current.

Finally, conclusions and the future prospects were given in Chapter 6.

Fig. 1-1 ITRS projections for low power gate leakage.

Source:ITRS 2001

Table 1-1 The International Technology Roadmap of ITRS for Semiconductor 2002.

Material

HfO₂ 25 5.7 1.5 47.6 Crystal T>700C

ZrO2 25 7.8 1.4 42.3 Crystal

T>400~800C

TiO₂ 80 3.5 1.2 - Tetragonal

Table 1-2 Physical properties for various high-k materials.

Chapter 2

Electrical characterization of Al

₂

O

₃

on Si from thermally oxidized AlAs and Al

2.1 Introduction

It has been shown that the practical scaling limit for gate oxide is due to the leakage current by direct-tunneling process [2.1], although 11-15 Å direct-tunneling gate oxide has already been demonstrated [2.2], [2.3]. The thickness of thermally grown gate oxide is scaled down to 35-40 Å for the 0.18-µm VLSI generation, and further scaling down below 15 Å is required within a few years [2.4]. Unfortunately the large direct-tunneling current precludes the use of silicon dioxide (SiO2) below 15-20 Å thickness. However, continuously scaling down the gate oxide is necessary to increase the current drive capability of MOSFETs and the operation speed of ICs. The relationship of drive current and gate oxide thickness is shown in equation (1):

IDsat＝1

where IDsat is the device saturation current, VG is the applied gate voltage and k is the dielectric constant of gate capacitor. The only solution to overcome this difficulty and to continuously scale down the gate dielectric is to use a thicker dielectric with a higher k value. Therefore novel high-k gate dielectric has been identified as one of the

most important R & D plans [2.4] for deca-nano CMOS technology. Unfortunately, because of the stringent requirements for device quality gate dielectric, no satisfactory alternatives to SiO2 has so far been found. Recently, aluminum oxide (Al2O3) has attracted much attention because of its very high dielectric constant (~10) that can be used for next generation DRAM and Flash memory application [2.5]. Moreover, Al2O3 has also been treated as a gate barrier in InAlAs/InGaAs MESFET using plasma oxidation of deposited Al [2.6]. In this study, we have first characterized the electrical property of Al2O3 to use as an alternative gate dielectric of MOSFETs.

Because extremely high quality is required for gate dielectric, we have used thermally grown Al2O3 from oxidized AlAs or Al that were grown in an ultra-high vacuum molecular beam epitaxy (MBE) system. In comparison, sputtering deposition and O2

plasma oxidation have been used in the past to deposit Al2O3; however high defects can be expected from Ar⁺ bombardment and plasma damage, respectively. In this work, the leakage current of a 53 Å Al2O3 from direct oxidized Al is already better than that of SiO2 with the equivalent thickness of 21 Å [2.2]. This result suggests the possible application of Al2O3 to VLSI.

2.2 Experimental

P-type 4-inch [100] Si wafers with typical resistivity of 10 ohm-cm are used in

this study. After modified RCA cleaning, HF dipping, rinsing in DI water and spun dry, the wafer was treated by HF-vapor passivation and immediately loading into the MBE chamber. The HF-vapor passivation has been used to reduce thermal budget to desorb the native oxide [2.7]. Then 40-80 Å AlAs or 40-55 Å Al were grown by MBE at 500^oC. The oxidation process was performed in a standard furnace at 500^oC for 90 min., and the dielectric thickness was measured by an ellipsometer. After oxidation, 3000 Å poly-Si was deposited followed by phosphorus doping using POCl3 at 850^oC.

The wafers were then received a 30-min. nitrogen anneal at 800^oC. This anneal was found to be very effective to reduce dielectric leakage current. Subsequently, 3000 Å Al was deposited and gate electrode was defined by patterning and wet etching. The gate dielectrics were electrically characterized by I-V leakage current using a semiconductor parameter analyzer, and the composition profiles were measured using secondary ion mass spectroscopy (SIMS).

2.3 Results and Discussion

Fig. 2-1 presents the SIMS profiles of oxidized AlAs at 500^oC, where O, Al and As are detected within the oxidized layer. The possible AlAs oxidation process is in the following equation:

AlAs + 3/2 O2 → 1/2 Al2O3 + 1/2 As2O3 (2)

Therefore both Al2O3 and As2O3 are formed during AlAs oxidation. As shown in Fig.

2-1, significant Al and As diffusion into Si is observed. The diffused As into Si will behave as a n-type dopant and change the threshold voltage, while the amount of diffused Al is dependent on the solid solubility of Si. However, none of these effects are desirable for MOS devices. The reduced surface concentration of As is due to the out-diffusion into ambient during oxidation.

Fig. 2-2 shows the SIMS profile of oxidized Al. The O2 concentration decreases to its background value as increasing depth beyond the oxidized layer. This is because the Si oxidation rate is negligibly slow at this temperature. In sharp contrast to AlAs oxidation, the oxidized Al shows a much sharper SIMS profiles. Possible reason may be due to the absence of As-enhanced diffusion during oxidation. Another advantage of direct Al oxidation may be due to the strong bonding energy of Al2O3 instead of As2O3 from oxidized AlAs. Therefore, the oxidized Al films may provide not only better material quality but also lower diffusion into Si during oxidation.

We have further characterized the electrical behavior of these oxides. Fig. 2-3 shows the typical J-V characteristics of MOS capacitors from oxidized AlAs. The capacitor leakage current reduces with increasing dielectric thickness from 80 to 130 Å. This is a typical behavior because a thicker insulating barrier has lower electric field that can block the electron transport more easily. However, this thicker insulating

barrier did not successfully reduce the leakage current at low voltages less than ~0.7 V.

Possible reasons may be due to trap-assisted tunneling at low electric field [2.8]. The traps may be generated by the weak bonding strength of As2O3 inside Al2O3 matrix or vacancies by As out-diffusion.

To investigate the effect of As-related weak As2O3 or vacancies, we have studied the electric characteristic of capacitors with directly oxidized Al. In comparison the J-V characteristics of ~ 80 Å oxides in Figs. 2-3 and 2-4, a much lower leakage current is observed at gate voltage below 1 V from directly oxidized Al. This leakage current at low gate electric field is related to the intrinsic defects [2.8] that is similar to stress-induced leakage current (SILC) [2.7], [2.9]. Therefore the As-related weak As2O3 or vacancies are responsible to the increased oxide leakage current. The almost same current at high voltages is due to the dominated tunneling mechanism. We have further compared the leakage current of Al2O3 with SiO2 from the published I-V characteristic [2.2]. It is important to note that the leakage current of 53 Å Al2O3 is already better than the leakage current of MOS capacitors with the same equivalent thickness of 21 Å thick SiO2 [2.2].

2.4 Conclusion

We have studied the thermally oxidized AlAs and Al to use as an alternative gate dielectric. The leakage current from AlAs oxidation is larger than that from Al

oxidation at low voltages. The leakage current of a 53 Å Al2O3 is already lower than SiO2 with an equivalent oxide thickness of 21 Å. These results suggest that scaling equivalent oxide thickness below 13 Å is possible using the Al2O3 films.

Fig. 2-1 SIMS depth profiles of oxidized AlAs at 500^oC.

0 100 200 300 400 500

10¹ 10² 10³ 10⁴ 10⁵ 10⁶

Al₂O₃/Si interface

As Al

O

Secondary Ion Counts

Depth (Angstroms)

Fig. 2-2 SIMS depth profiles of oxidized Al at 500^oC.

0 100 200 300 400 500

10¹ 10² 10³ 10⁴ 10⁵ 10⁶

Al₂O₃/Si interface

Al O

Secondary Ion Counts

Depth (Angstroms)

Fig. 2-3 J-V characteristic of MOS capacitors with deposited AlAs oxidized at a temperature of 500^oC to form Al2O3 dielectric. The capacitor area is 800µm×

800µm.

Fig. 2-4 J-V characteristic of MOS capacitors with deposited Al oxidized at a temperature of 500^oC to form Al2O3 dielectric. The capacitor area is 800µm×

800µm. The J-V characteristic of 21 Å SiO2 is from reference 2.

0.0 0.5 1.0 1.5 2.0 2.5

Chapter 3

Device and Reliability of High-k Al

₂

O

₃

and La

₂

O

₃

Gate Dielectric with Good Mobility and Low D

_it

3.1 Introduction

By continuously scaling down the CMOS technology, ultra-thin high-k gate dielectrics with low leakage current are required to replace the direct-tunneling current dominated thermal SiO2. Recently Si3N4 gate dielectric has been studied extensively to replace thermal SiO2 [3.1]; however, the marginal improvement beyond SiO2 is due to the relatively lower k and slightly higher leakage current. Although stacked high-k materials have been studied to achieve higher k value than that of Si3N4 [3.2], [3.3], it may require complicated process steps and the leakage current is still higher than expected. In this study, we report a very simple process to fabricate Al2O3 as an alternative gate dielectric with a k value (9.0 to 9.8) greater than Si3N4. To avoid any process related damage, Al2O3 gate dielectric is formed by direct oxidation from thermally evaporated Al. In addition to high-k, the 48 Å Al2O3 has ~6 orders lower leakage current than equivalent 13 Å SiO2. Good mobility, interface trap density, and reliability are also achieved using this process.

Although high-k gate dielectrics have attracted much attention recently, further

reduction of EOT may be limited by the interface reaction region between high-k material and Si [3.4], [3.5]. Therefore, the search for thermodynamically stable high-k dielectric directly on Si is important to meet future sub-10 Å requirement. Besides the required good electrical properties such as low interface trap density (Dit), low leakage current, high breakdown field (EBD) and good reliability, high-k material must also be compatible with existing VLSI process. Thus, good stability with H2 and high transition temperature from amorphous to crystal [3.5] are necessary to prevent dielectric degradation by H2 and crystalline structure created defects or dislocations during strain relaxation in process. Previously, we have worked that amorphous Al2O3

directly on Si can meet near all the requirements and stable up to 1000^oC [3.6], except that EOT (21 Å) and Dit (1x10¹¹ eV^-1/cm²) are still high. The high Dit is unacceptable for IC because of the increased noise [3.7]. In this study, we have used amorphous La2O3 (k~27) to achieve 4.8 Å EOT and reduced Al2O3 EOT to 9.6 Å, where La2O3

has similar property as Al2O3 but with even better thermal stability on Si (Table 1-2).

In addition to respective low leakage current of 0.06 and 0.4A/cm² for La2O3 and Al2O3,both dielectrics now have good Dit (3x10¹⁰ eV^-1/cm²), EBD, SILC, and QBD as compared with SiO2.

3.2 Device and Reliability of High-k Al

2

O

3

Gate Dielectric

3.2.1 Experimental

To avoid any possible process-related damage in Al2O3 gate dielectric [3.8], we have used direct thermal oxidation from thermally evaporated Al on Si. Native oxide is suppressed by a HF-vapor passivation and desorbed in-situ inside an ultra-high vacuum MBE environment [3.9], followed by an immediate Al evaporation.

Deposited Al was oxidized at a temperature of 400^oC to form Al2O3. Then the Al2O3

was annealed in nitrogen ambient to reduce defects. Poly-Si gate MOS capacitor and transistor were fabricated to evaluate the electrical characteristics. The suppression of native oxide is important to achieve higher k in Al2O3, and we have used similar idea to achieve atomically smooth ultra-thin oxide with good electrical characteristics and reliability [3.10]. For comparison, MOS capacitor and transistor were also fabricated by thermal SiO2.

3.2.2 Results and Discussion

3.2.2.1 The physical property of Al2O3

We have first measured the SIMS profile in Fig. 3-1 to confirm the formation of Al2O3. Although Al diffusion into Si can be observed, the concentration reduces rapidly as increasing thickness into Si. Fig. 3-2(a) and 3-2(b) illustrates the TEM

observed in Al2O3 bulk oxidized at 500^oC. We have also used C-V measurement to determine the Al diffusion and the concentration is lower than 1x10¹⁶ cm^-3. Furthermore, the field-dependent mobility also suggests the low Al diffusion into Si.

3.2.2.2 Gate capacitor

Fig. 3-3 presents the J-V characteristic of a 48 Å Al2O3 capacitor. The leakage current is ~6 orders of magnitude lower than that of the equivalent 13 Å thermal SiO2. In order to obtain an accurate k value, we have also measured the C-V of a thick 110 Å Al2O3 capacitor. As shown in Fig. 3-4, a k value of 9.0 is measured that is higher than Si3N4. In Fig. 3-5 presents the measured interface trap density with a mid-gap value of 1x10¹¹ eVcm^-2 from this capacitor. This low interface trap density is suitable for MOSFET application.

3.2.2.3 Mobility and transistor performance

To further characterize the Al2O3/Si interface, we have fabricated a wide gate MOSFET to measure the electron mobility. Fig. 3-6 shows the effective mobility of an 80 Å Al2O3 MOSFET. The electron mobility is comparable to published mobility data from thermal SiO2. Fig. 3-7 shows the Id-Vd characteristics of an 80 Å Al2O3

than that of thermal SiO2 also proves the high-k value in Al2O3 MOSFET and a k of 9.8 is obtained.

3.2.2.4 Reliability

Fig. 3-8 and Fig. 3-9 show the 48 Å Al2O3 gate dielectric under a 2.5 V constant stress for 10,000 sec, and good reliability is evidenced from the very small current change and stress-induced leakage current (SILC) respectively. Fig. 3-10 and Fig.

3-11 present the same Al2O3 gate dielectric under a much higher stress of ~5.4 V with a 0.1 mA/cm² constant current density for 1000 sec. The small voltage changes less than 0.04 V and the small SILC also suggest the excellent reliability. Therefore, the Al2O3 gate dielectric is suitable for continuously operation at VLSI generations of 2.5 V and beyond.

3.3 Device and Reliability of High-k La

2

O

3

Gate Dielectric

3.3.1 Experimental

To avoid any k value reduction, interfacial native oxide is suppressed by HF-vapor passivation and in-situ desorption [3.6] followed by an immediate La or Al evaporation. Because La or Al is highly reactive with O2, low oxidation temperatures

≤ 400^oC is used to reduce metal diffusion into Si. The formed oxides were further annealed in N2 at 900^oC. To reduce gate depletion, Al gate is used for MOS capacitor and transistor to evaluate the electrical characteristics. H2 annealing at 450-550^oC is performed to study the stability withH2. Besides achieved higher k, suppression of native oxide is important to obtain a smooth interface, low Dit, and high reliability in our previously achieved atomically smooth ultra-thin oxides.

3.3.2 Results and Discussion 3.3.2.1 Gate capacitor

Fig. 3-12 presents the J-V characteristics of La2O3 and Al2O3 capacitors.

Comparable leakage current for La2O3 on Si or Si0.3Ge0.7 I s obtained that is important for high mobility PMOS [3.11]. The stacked Al2O3/La2O3 is used to reduce leakage current for C-V to obtain Dit. In order to get accurate k and EOT, the oxide thickness is carefully examined by both ellipsometer and TEM in Fig. 3-13. The very uniform oxide and smooth interface are due to native oxide free surface and high thermal stability in Table 1-2 as contact with Si. Therefore, low EOT can be expected. Fig.

3-14 shows the cumulative values for high-k oxides, and leakage current of 0.06 A/cm² for La2O3 and 0.4 A/cm² for Al2O3 are obtained. Fig. 3-15 is the C-V curves and

4.8 Å and 9.6 Å EOT (without QM correction). Small hysterisis of 11 and 22 mV are measured for respective dielectrics that indicates good quality because of applied high annealing temperature without transition to crystal structure [3.5]. Fig. 3-16 shows the measured Dit of 3x10¹⁰ eV^-1/cm² from both capacitors. This low Dit close to thermal SiO2 is extremely important for circuit to lower 1/f noise [3.7].

3.3.2.2 Transistor performance with 4.8 Å EOT

We have further fabricated wide gate MOSFETs with 4.8 Å EOT. Figs. 3-17 shows the device Id-Vd, and important Id-Vg and gm are plotted in Fig. 3-18. The very high current drive and gm are due to high-k that gives a k of ~27 consistent with C-V measurement. Good device pinch-off Ioff < 10^-10A/µm and small sub-threshold swing of 75 mV/decade are observed, and the small swing also suggests the low Dit. The effective mobility is further plotted in Fig. 3-19. The electron mobility is comparable with published universal mobility data for thermal SiO2 because of low Dit.

3.3.2.3 Reliability

Fig. 3-20 shows the gate dielectrics under a -2.5 V constant stress for 1 hour with total Qinj of 1.3x10³ and 1.2x10⁵C/cm² for La2O3 and Al2O3, respectively. No

significant charge trapping is occurred during stress, and small SILC for both dielectrics is observed in Fig. 3-21. Good reliability for 4.8 Å EOT La2O3 is evidenced from the high QBD in Fig. 3-22 and comparable with current SiO2 [3.12].

The good SILC and QBD may be due to the high lattice energy in Table 1-2. From the 50% failure time, an extrapolated max voltage of 2.3 V is obtained for 10 years lifetime that suggests good reliability for VLSI application with 4.8 Å EOT and small leakage of 0.06 A/cm² at 1 V.

3.4 Conclusion

We report a very simple process to fabricate Al2O3 gate dielectric with k (9.0 to 9.8) greater than Si3N4. Al2O3 is formed by direct oxidation from thermally evaporated Al. The 48 Å Al2O3 has ~6 orders lower leakage current than equivalent 13 Å SiO2. Good Al2O3/Si interface was evidenced by the low interface density of 1x10¹¹ eVcm^-2 and compatible electron mobility with thermal SiO2. Good reliability is measured from the small SILC after 2.5 V stress for 10,000 sec.

High quality La2O3 and Al2O3 are fabricated with EOT of 4.8 and 9.6 Å, leakage current of 0.06 and 0.4 A/cm² and Dit of both 3x10¹⁰ eV^-1/cm², respectively. The high-k is further evidenced from high MOSFET’s Id and gm with low Ioff. Good SILC

在文檔中 高介電常數閘極介電質熱氧化氧化鋁在金氧半電晶體的電性及應用 (頁 27-0)