Compare NSILC-VTFT with MILC-VTFT - Characteristics of Vertical Channel Low

Chapter 3 Characteristics of Vertical Channel Low

3.3 Compare NSILC-VTFT with MILC-VTFT

According to the previous report [21], the excess Ni accumulation in the middle of the n+ ﬂoating region is found in the MILC-VTFTs, but it is not found in the NSILC-VTFTs. The Ni and NiSi₂ precipitates trapped in the grain boundary would act as trap sites which increase the leakage current and degrade the field-effect mobility.

In this section, we focus on discussing the different electrical characteristics between NSILC-VTFTs and MILC-VTFTs. Fig. 3-12 –Fig. 3-15 show the on-state current distribution, off-state current distribution, subthreshold swing distribution, and transconductance distribution of the NSILC-VTFTs and MILC-VTFTs with 1 μm of length of n⁺floating region and channel width from 0.35 μm to 1 μm, respectively. We can observe that the electrical performance of NSILC-VTFTs and MILC-VTFTs seems to be no significantly difference. No matter what size of device we choose, we still have the same conclusion: There are no difference between NSILC-VTFTs and MILC-VTFTs.

This observation can be possibly ascribed to the following explanations. In this work, we used the unilateral crystallization method to complete the channel crystallized. Therefore, there is no excess Ni accumulation found in MILC-VTFTs and NSILC-VTFTs. And the MILC/MILC grain boundary in the middle of the channel can be eliminated. If the Ni content is provided by an appropriate amount to complete the channel crystallization, even MILC-VTFTs will be no excess Ni remaining in the channel. Therefore, the NSILC-VTFTs with Ni-silicided seeding window to limit the Ni source is not able to further improve the device characteristics. Nevertheless, the leakage current still can be suppressed by the dual-gate structure and offset region due to reducing the lateral electrical field in the drain depletion region.

Moreover, as channel widths decrease, the I_off suppresses and the G_m, S.S. and I_on enhances. These results reflect the crystal filtering once more. The average values of some important parameters are summarized in the Table 3-4. The narrower the widths of the crystal filters are, the more uniform the crystallographic orientation the MILC poly-Si is. Thus, the high performance device can be achieved by reducing the channel widths.

Although the narrower the channel width is the better the electrical performance, the on-state current would be degrade due to the W/L factor reducing. In order to overcome this problem, we proposed a layout which given high performance VTFTs.

The design of wide devices usually involves the breakdown of a wide transistor into a number of smaller transistors in parallel. In this experiment, we fabricated the multiple channels structure, which unit channel width of 0.35 μm. Fig. 3-16 shows the transfer characteristics of a MILC-VTFT with unit crystal width of 0.35 μm under various channel number. These results indicate that the multiple channel and crystal filtering effect can significant improve the on-state current, while maintaining the high performance of VTFTs. When the channel numbers are increased, the S.S. still remains

better performance about 300 mV/dec.. Moreover, the off-state current can significantly be reduced with both the equivalent dual-gate structure and offset region, and the on-state current and G_mcan evidently be improved by multiple channels. In order to further verify the result is correct, more than 20 devices are measured to obtain the statistics. The average values of some important parameters such as I_on, I_off, S.S., Gm and their standard deviations with unit crystal width of 0.35 μm for various channel number are shown in Fig. 3-17- Fig. 3-20. As a result, the combination of narrower crystal width and multiple channels can successfully further optimize electrical characteristics of poly-Si TFTs, owning to the elimination of grain boundaries and defects.

Fig. 3-1 The typical transfer characteristic and the field-effect mobility of

(a) NSILC-VTFTs and (b) MILC-VTFTs with and without NH

₃

plasma.

Condition S.S.

(mV/dec.)

𝝁_𝑭𝑬 (cm²/V∙s)

Nit (10¹² cm^-2)

Ion

(μA)

Ioff

(pA)

Ion/Ioff

(×10⁷)

NSILC-VTFTs

No-plasma 1206. 9 100.42 20.8 3.30 0.162 2.03

NH3 10 min 224.1 131.87 2.98 5.27 0.041 12.8

MILC-VTFTs

No-plasma 1341.4 75.67 21.0 2.47 0.760 0.295

NH₃ 10 min 256.8 147.39 3.57 6.49 0.076 8.51

Table 3-1 Characteristics of poly-Si TFTs with and without plasma

treatment. All parameters are extracted at V

= 0.1 V. W/L = 0.35 μm/ 1 μm

Group Device

Unit channel Total

channel width

width number

EW 2

W2C1 2 1

2 μm

W1C2 1 2

W0.5C4 0.5 4

W0.4C5 0.4 5

EW 1

W1C1 1 1

1 μm

W0.5C2 0.5 2

Table 3-2 The width and number of unit channel in the devices.

W2C1 W 1C2

W0.5C4 W0.4C5

W1C1 W0.5C2

(b)

Fig. 3-2 The top view optical microscope microphotograph of MILC-VTFTs with various widths of crystal filter. (a) Total width = 2 μm (b) Total width =1μm

(a)

(b) Effective widths = 1 μm

Fig. 3-3 The transfer characteristics of MILC-VTFTs with various widths

of crystal filter. (a) Effective widths = 2 μm (b) Effective widths = 1 μm

Fig. 3-4 The statistical average values of on-state current of group EW2.

0 Fig. 3-5 The statistical average values of off-state current of group EW2.

Fig. 3-6 The statistical average values of subthreshold swing of group EW2.

0 Fig. 3-7 The statistical average values of transconductance of group EW2.

Fig. 3-8 The statistical average values of on-state current of group EW1.

0 Fig. 3-9 The statistical average values of off-state current of group EW1.

Fig. 3-10 The statistical average values of subthreshold swing of group EW1.

0 Fig. 3-11 The statistical average values of transconductance of group

EW1.

MILC-VTFT W2C1 W1C2 W0.5C4 W0.4C5 W1C1 W0.5C2

S.S. (mV/dec.) 428.67 360.97 331.88 303.66 379.85 310.03 μ

_FE

(cm

/V-s) 61.1 77.2 80.3 87.5 83.0 96.3

I

(μA) 10.56 13.46 14.98 19.17 9.88 10.57 I

^off

(pA) 2.03 1.25 1.07 0.92 0.66 0.48

I

^on

/ I

^off(×

10

⁷)

0.52 1.08 1.4 2.08 1.5 2.2

Table 3-3 The statistical average value of some parameters of EW2 and EW1.

Fig. 3-13 Comparison the off-state current distribution of NSILC-VTFTs and MILC-VTFTs with various channel width.

Fig. 3-12 Comparison the on-state current distribution of NSILC-VTFTs and MILC-VTFTs with various channel width.

-5

Fig. 3-15 Comparison the transconductance distribution of NSILC-VTFTs and MILC-VTFTs with various channel width.

Fig. 3-14 Comparison the subthreshold swing distribution of NSILC-VTFTs

and MILC-VTFTs with various channel width.

46 Condition

Parameter

W = 0.35 μm W =0.5 μm W = 1 μm

NSILC-TFTs

MILC-V TFTs

NSILC-T FTs

MILC-V TFTs

NSILC-T FTs

MILC-V TFTs S.S.

(mV/dec.)

295.94 298.81 324.80 317.10 366.92 360.66

μFE (cm²/V-s) 108.68 106.16 103.52 104.41 90.11 88.05

I_on(μA) 4.83 4.66 7.14 6.18 10.64 10.03 I_off (pA) 0.12 0.17 0.82 1.05 1.15 1.41

I_on/ I_off (×

10

⁷)

4.03 2.74 0.87 0.59 0.93 0.71

Table 3-4 Comparison the statistical average value of NSILC-VTFTs and

MILC-VTFTs with various channel width.

Fig. 3-16 The transfer characteristics of a MILC-VTFT with unit crystal width of 0.35 μm under various channel number.

1 channel 2 channels 5 channels 10 channels

-4 -3 -2 -1 0 1 2 3 4 5 6 10

^-14

10

^-13

10

^-12

10

^-11

10

^-10

10

^-9

10

^-8

10

^-7

10

^-6

10

^-5

10

^-4

Drain curre nt I

(A)

Gate voltage V

(V)

MILC-VTFTs Lf = 1 ^m VDS = 0.1 V

NH₃ plasma 10 min

Unit channel width = 0.35m

Fig. 3-20 The transconductance distribution of NSILC-VTFTs and

MILC-VTFT with unit crystal width of 0.35 μm under various channel

Chapter 4 Conclusions and Future Works 4.1 Conclusions

In this thesis, for the first time, we have investigated the characteristic of vertical channel poly-Si thin-film transistors fabricated by MILC with crystal filtering technique. For crystal filtering technique, the narrower crystal filter width has better grain crystallization and less intra-grain, less grain boundaries defects and NiSi₂ contaminations in the poly-Si channel. This is attributed to the lower probability of the channel region to cover the grain boundary in narrower width devices and the channel region would have more uniform crystal growth direction than the unfiltered active layer of MILC-VTFT area. The device performance including higher on-state current, steeper subthreshold swing, lower off-state current will be improved by reducing the crystal filter width.

In this thesis, we also observe that the electrical performance of NSILC-VTFTs and MILC-VTFTs seems to be no significantly difference. In this work, we used the unilateral crystallization method to complete the channel crystallized. Therefore, the MILC/MILC grain boundary in the middle of the channel can be eliminated. Once the Ni content is provided by an appropriate amount to complete the channel crystallized, even MILC-VTFTs will be no excess Ni remaining in the channel. Therefore, the NSILC-VTFTs with Ni-silicided seeding window to limited the Ni source is not able to further improve the device characteristics. Besides, the leakage current still can be suppressed by the dual-gate structure and offset region due to reducing the lateral electrical field in the drain depletion region. Thus, the OFF-state current of these device can be reduced below 1 pA/ μm.

4.2 Future works

There are some interesting and important topics that are suggested for the future work. First of all, MILC process is used to crystallize the a-Si layer in this thesis. The on-state current limitation results from the large S/D parasitic series resistance and contact resistance, which remain problems for device scaling and reduce device performance. To decrease the parasitic resistance of the poly-Si TFTs, the fully Ni-salicided S/D and n⁺ floating region is a technology to solve this problem.

Second, lower the gate height to achieve the short-channel device, which can overcome the limit of photolithography. Different gate height including 150nm, 100nm can be executed. Thus, the channel length of device can be scaled down below the limitation of I-line stepper. Besides, the lower the gate height, the easier it is to form the spacer and Ni-silicide.

Third, the reliability mechanisms of VTFTs by MILC crystallization method, such as hot carrier stress, NBTI and PBTI can be studied. And we can not only change the material of channel layer to a-Ge or III-V compound material but also change the gate dielectric layer to high-k insulators, such as Al2O3, Ta2O5 or HfO2.

Moreover, the vertical channel structure can be applied by as a memory device.

This idea is shown in Fig. 4-1. This double-gate SONOS-type TFT memory is suitable for NAND flash memory, due to simple fabrication process, multi-bit per cell and smaller bit size.

Poly-Si

Buried Oxide

Source Drain

ONO layer

Sub-gate

Vertical channel

Fig. 4-1 The schematic cross-section of VTFT with O/N/O layer and

double-gate.

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簡歷 (Vita)

姓名：郭柔含性別：女

出生日：1988 年 6 月 2 日籍貫：台灣屏東縣出生地：台灣高雄市學歷：

屏東縣潮州鎮光華國民小學 1994 年 9 月~2000 年 6 月屏東縣潮州鎮潮州國民中學 2000 年 9 月~2003 年 6 月國立屏東女中

2003 年 9 月~2006 年 6 月

國立彰化師範大學物理學系學士班 2006 年 9 月~2010 年 6 月

國立交通大學電子物理所碩士班 2010 年 9 月~2012 年 6 月

碩士論文題目：

鎳金屬誘發側向結晶垂直通道低溫複晶矽薄膜電晶體之研究

The Study of Vertical Channel LTPS TFTs with Metal-Induced Lateral

Crystallization Method

在文檔中鎳金屬誘發側向結晶垂直通道低溫複晶矽薄膜電晶體之研究 (頁 45-0)