3.2 New Proposed Voltage Converter
3.2.2 Comparisons of Conventional and Proposed Voltage Converters
Comparing to TABLE III, Eq. 52, the ROUT of the dual side dual output voltage converter for VCL is much smaller than the output impedance specification of VCL ROUT_VCL_MAX=125Ω. That means the driving ability of the designed dual side dual output voltage converter for VCL can meet the need of the TFT-LCD driver.
For the output voltage ripple of the dual side dual output voltage converter for VCL, mV output voltage converter is much smaller than the output voltage ripple specification 1V.
3.2.2 Comparisons of Conventional and Proposed Voltage Converters
Table IV shows the performance comparisons of the conventional and the proposed voltage converters.
TABLE IV. PERFORMANCE COMPARISONS OF VOLTAGE CONVERTERS
BY HAND CALCULATIONS
Hand Calculations Output Impedance Output Voltage Ripple Doubler (DDVDH) 87.9ΩΩΩΩ 25mV
As we can see, although the DDVDH and VCL output impedances of the proposed dual side dual output voltage converter are larger than the conventional voltage doubler and the conventional voltage inverter, but the area, external components, pin outs of it gain more merits for the costs. And comparing to TABLE III, the output impedance and output voltage ripple of the conventional or the proposed voltage converters can meet the specifications of the TFT-LCD driver.
Table V shows the difference comparisons of the conventional and the proposed voltage converters. The new proposed dual side dual output voltage converter reduces 4 power switches, 4 pin outs and 2 flying capacitors. The proposed voltage converter is very suitable for lowering the costs of the TFT-LCD driver.
TABLE V. COMPARISONS OF VOLTAGE CONVERTERS
Voltage Converters Power Switches Pin Outs Flying Capacitors Doubler (DDVDH)
Conventional
Inverter (VCL)
16 12 4
Doubler (DDVDH) Proposed
Inverter (VCL)
12 8 2
Chapter 4
Measurements of Switching Capacitor Voltage Converters in TFT-LCD Driver
In this chapter, measurements of the switching capacitor voltage converters that we mentioned in the last chapter will be presented. Section 4.1 shows the measurements of the conventional dual side voltage doubler that generates DDVDH for the TFT-LCD driver. Also in section 4.1 shows the measurements of the conventional dual side voltage inverter that generates VCL for the TFT-LCD driver. Section 4.2 shows the measurements of the new proposed dual side dual output voltage converter that generates DDVDH and VCL for the TFT-LCD driver. All the measurements include IC layout areas, waveforms, load regulations and voltage ripples.
The conventional dual side voltage doubler and dual side voltage inverter are fabricated with SilTerra 0.18um 1.8V/5V/32V CMOS 1P5M process. Fig. 46 shows the IC layout of the prior TFT-LCD driver with the total chip area equal to 19800*880um2.
880um
19800um
Photo of TFT-LCD Driver (Prior Work)
130um
1345um
Layout of Dual Site Voltage Doubler
130um
1355um
Layout of Dual Site Voltage Inverter
Fig. 46. Layout of the Conventional Voltage Doubler and Voltage Inverter.
The layout area of the dual side voltage doubler is 1345*130um2. The layout area of the dual side voltage inverter is 1355*130um2. As mentioned in section 3.1, the conventional dual side voltage doubler and the dual side voltage inverter use 16 power switches, 12 pin outs and 4 flying capacitors.
4.1 Conventional Voltage Converters
4.1.1 Dual Side Voltage Doubler
Fig. 47 shows the waveform of the conventional voltage doubler.
phase1 phase2 DDVDH(zoom in) DDVDH(5.46V)
C11P
C11N
58mV
2.8V
5.6V
Freq=20kHz
Fig. 47. Waveform Measurements of the Conventional Dual Side Voltage Doubler.
During the phase1, charging phase of C11, C11P is charged to VCI and C11N is pulled to ground. During the phase2, pumping phase of C11, C11P is pumped to DDVDH and C11N is
connected to VCI. The DDVDH zoom in waveform shows that DDVDH voltage is pumped whether in phase1 or phase2.
Dual Side Voltage Doubler (DDVDH) load regulation
5.84 5.86 5.88 5.9 5.92 5.94 5.96 5.98 6 6.02
0 0.5 1 1.5 2
Iload (mA)
DDVDH (V)
dual DDVDH
Fig. 48. DDVDH Load Regulation of the Conventional Dual Side Voltage Doubler.
Dual Side Voltage Doubler (DDVDH) ripple
0.000 10.000 20.000 30.000 40.000 50.000 60.000 70.000
0 0.5 1 1.5 2
Iload (mA)
ripple (mV)
dual DDVDH
Fig. 49. DDVDH Voltage Ripple of the Conventional Dual Side Voltage Doubler.
Fig. 48 and 49 illustrates the load regulation and the voltage ripple of the conventional voltage doubler. We can figure out that
Ω
=
−
−
=(5.9599 5.8797) /(1.8 0.6) 66.8
_ _
_ V mA
ROUT dual side doubler (54)
Comparing to TABLE III, Eq. 54, the ROUT of the dual side voltage doubler is much smaller than the output impedance specification of DDVDH ROUT_DDVDH_MAX=150Ω. That means the driving ability of the designed dual side voltage doubler can meet the need of the TFT-LCD driver.
For the output voltage ripple of the dual side voltage doubler in Fig. 49, comparing to TABLE III, the output voltage ripple of the dual side voltage doubler is much smaller than the output voltage ripple specification 1V.
4.1.2 Dual Side Voltage Inverter
Fig. 50 shows the waveform of the conventional voltage inverter.
Fig. 50. Waveform Measurements of the Conventional Dual Side Voltage Inverter.
During the phase1, charging phase of C31, C31P is charged to VCI and C31N is pulled to ground. During the phase2, pumping phase of C31, C31P is pulled to ground and C13N is pumped to VCL. The VCL zoom in waveform shows that VCL voltage is pumped whether in phase1 or phase2.
Fig. 51 and 52 illustrates the load regulation and the voltage ripple of the conventional voltage inverter.
Dual Side Voltage Inverter (VCL) load regulation
-3.02 -3 -2.98 -2.96 -2.94 -2.92 -2.9 -2.88 -2.86
0 0.5 1 1.5 2
Iload (mA)
VCL (V)
dual VCL
Fig. 51. VCL Load Regulation of the Conventional Dual Side Voltage Inverter.
Dual Side Voltage Inverter (VCL) ripple
0.000 5.000 10.000 15.000 20.000 25.000 30.000 35.000 40.000 45.000 50.000
0 0.5 1 1.5 2
Iload (mA)
ripple (mV)
dual VCL
Fig. 52. VCL Voltage Ripple of the Conventional Dual Side Voltage Inverter.
In Fig. 51 and 52, we can figure out that
Ω
=
− +
−
=( 2.8868 2.9623) /(1.8 0.6) 62.9
_ _
_ V mA
ROUT dual side inverter (55)
Comparing to TABLE III, Eq. 55, the ROUT of the dual side voltage inverter is much smaller than the output impedance specification of VCL ROUT_VCL_MAX=125Ω. That means the driving ability of the designed dual side voltage inverter can meet the need of the TFT-LCD driver.
For the output voltage ripple of the dual side voltage inverter in Fig. 52, comparing to TABLE III, the output voltage ripple of the dual side voltage inverter is much smaller than the output voltage ripple specification 1V.
4.2 New Proposed Voltage Converter
The new proposed dual side dual output voltage converter is fabricated with SilTerra 0.13um 1.8V/5V/32V CMOS 1P5M process. Fig. 53 shows the IC layout of the TFT-LCD driver with the total chip area equal to 16500*700um2. The layout area of the dual side dual output voltage converter is 1955*130um2. As mentioned in section 3.2, the new proposed dual side dual output voltage converter uses 12 power switches, 8 pin outs and 2 flying capacitors.
700um130um
Fig. 53. Layout of the Proposed Dual Side Dual Output Voltage Converter.
Fig. 54 shows the waveform of the proposed dual side dual output voltage converter.
During the phase1 and the phase3, the charging phase of C11, C11P is charged to VCI and C11N
is connected to ground. During the phase2, the pumping phase of C11, C11P is pumped to DDVDH and C11N is connected to VCI. During the phase4, the pumping phase of C11, C11P is connected to ground and C11N is pumped to VCL. The DDVDH and VCL zoom in waveforms shows that VCL voltage is pumped whether in phase2 or phase4 because of the dual side operation.
phase1 phase3 phase2
phase4 VCL(-2.58V)
DDVDH(5.39V)
C11P
C11N
2.8V
85mV 95mV
2.8V 5.4V
-2.6V Freq=10kHz
Fig. 54. Waveform Measurements of the Proposed Dual Side Dual Output Voltage Converter.
Table VI shows the IC layout area comparisons of conventional and proposed voltage converters. The total layout area of the dual side voltage doubler and the dual side voltage inverter is 351,000um2 while the layout area of the proposed dual side dual output voltage converter is 254,150um2. More than 27% layout area is reduced.
TABLE VI. ICLAYOUT AREA COMPARISONS OF VOLTAGE CONVERTERS. Area(um2) Percentage (%) Dual Side Voltage Doubler 130*1345
Convential
Dual Side Voltage Inverter 130*1355
100
New Proposed Dual Side Dual Output Voltage Converter 130*1955 72.41
Dual Side Dual Output Voltage Converter (DDVDH) load regulation
5.8 5.85 5.9 5.95 6 6.05
0 0.5 1 1.5 2
Iload (mA)
DDVDH (V)
dual DDVDH
Fig. 55. DDVDH Load Regulation of the Proposed Voltage Converter.
Dual Side Dual Output Voltage Converter (DDVDH) ripple
0.000 20.000 40.000 60.000 80.000 100.000 120.000
0 0.5 1 1.5 2
Iload (mA)
ripple (mV)
dual DDVDH
Fig. 56. DDVDH Voltage Ripple of the Proposed Voltage Converter.
Fig. 55 and 56 illustrates the load regulation and the voltage ripple of the proposed dual side dual output voltage converter for DDVDH. We can figure out that
Ω
=
−
−
=(5.9411 5.8324) /(1.8 0.6) 93.08
_ _
_ V mA
ROUT DDVDH dual output (56)
Comparing to TABLE III, Eq. 56, the ROUT of the dual side dual output voltage converter for DDVDH is much smaller than the output impedance specification of DDVDH ROUT_DDVDH_MAX=150Ω. That means the driving ability of the designed dual side dual output voltage converter for DDVDH can meet the need of the TFT-LCD driver.
For the output voltage ripple of the dual side dual output voltage converter for DDVDH in Fig. 56, comparing to TABLE III, the DDVDH output voltage ripple of the dual side dual output voltage converter equals to 110mV, and is much smaller than the output voltage ripple specification 1V.
Dual Side Dual Output Voltage Converter (VCL) load regulation
-3.1 -3.05 -3 -2.95 -2.9 -2.85 -2.8 -2.75 -2.7
0 0.5 1 1.5 2
Iload (mA)
VCL (V)
dual VCL
Fig. 57. VCL Load Regulation of the Proposed Voltage Converter.
Dual Side Dual Output Voltage Converter (VCL) ripple
0.000 20.000 40.000 60.000 80.000 100.000 120.000
0 0.5 1 1.5 2
Iload (mA)
ripple (mV)
dual VCL
Fig. 58. VCL Voltage Ripple of the Proposed Voltage Converter.
Fig. 57 and 58 illustrates the load regulation and the voltage ripple of the proposed dual side dual output voltage converter for VCL. We can figure out that
Ω
=
− +
−
=( 2.8201 2.94) /(1.8 0.6) 99.92
_ _
_ V mA
ROUT VCL dual output (57)
Comparing to TABLE III, Eq. 57, the ROUT of the dual side dual output voltage doubler for VCL is much smaller than the output impedance specification of VCL ROUT_VCL_MAX=125Ω. That means the driving ability of the designed dual side dual output voltage converter for VCL can meet the need of the TFT-LCD driver.
For the output voltage ripple of the dual side dual output voltage converter for VCL in Fig. 58, comparing to TABLE III, the VCL output voltage ripple of the dual side dual output voltage converter equals to 53mV, and is much smaller than the output voltage ripple specification 1V.
Table VII shows the performance comparisons of conventional and proposed voltage
converters by measurements. The performance of the new proposed dual side dual output voltage converter can meet the specifications of output impedance and output voltage ripple for DDVDH and VCL, and the IC layout area is minimized and more compact without sacrificing the display quality of the TFT-LCD panel. The proposed charge pump’s DDVDH and VCL output impedances are larger than the conventional charge pumps. This means the efficiency of the proposed charge pump is lower than the conventional charge pumps.
The main reason of the new proposed charge pump is to find a good trade-off between the specification over-designed and the costs. From table V, VI and VII, the new proposed charge pump reduces over 27% IC layout area than the conventional charge pumps by reducing 4 power switches and 4 IC pin outs. And in the mean time, the proposed charge pump also reduces 2 external flying capacitors to lower the costs and making a smaller footprint area on the FPC.
Fig. 59 shows relationship between the DDVDH output impedance of the conventional and proposed charge pumps and the operation frequency. The DDVDH output impedance of
TABLE VII. PERFORMANCE COMPARISONS OF VOLTAGE CONVERTERS
BY MEASUREMENTS
Measurements Output Impedance Output Voltage Ripple
Doubler (DDVDH) 150ΩΩΩΩ 1V
Specification
Inverter (VCL) 125ΩΩΩΩ 1V Doubler (DDVDH) 66.8ΩΩΩΩ 58mV Conventional
Inverter (VCL) 62.9ΩΩΩΩ 21mV Doubler (DDVDH) 93.08ΩΩΩΩ 110mV Proposed
Inverter (VCL) 99.92ΩΩΩΩ 53mV
the proposed charge pump is higher than the conventional charge pump, but still lower than the maximum specification of 150Ω in the operation frequency range of 10kHz to 200kHz.
The best operational frequency of the proposed charge pump is around 40kHz, because the minimum output impedance value occurs around this frequency. The highest efficiency of this charge pump is also occurs around the best operational frequency.
Fig. 59. DDVDH Output Impedance versus Operation Frequency
Fig. 60 shows relationship between the VCL output impedance of the conventional and proposed charge pumps and the operation frequency. The VCL output impedance of the proposed charge pump is higher than the conventional charge pump, but still lower than the maximum specification of 125Ω in the operation frequency range of 20kHz to 180kHz. The best operational frequency of the proposed charge pump is around 60kHz, because the minimum output impedance value occurs around this frequency. The highest efficiency of this
charge pump is also occurs around the best operational frequency.
Fig. 60. VCL Output Impedance versus Operation Frequency
Fig. 61 illustrates the test board of the TFT-LCD module of this work. The driver IC is attached on the glass with the COG (chip on glass) method. The signals for the TFT-LCD panel come out from the driver IC through the ITO metal lines on the glass and go into the panel. And the signals from the baseband must go through the FPC. The external components needed for the driver IC are all placed on the FPC. The FPC is a flexible printed circuit that can be easy fabricated. The IC die size of the TFT-LCD driver is 16500x700um2 and be fabricated with SilTerra 0.13um 1.8V/5V/32V CMOS 1P5M process The new proposed dual side dual output voltage converter occupies 130x1955um2 layout area and works well within this driver IC in Fig. 61.
Test Board
FPC
Panel Panel
Driver IC
FPC
Fig. 61. TFT-LCD Test Board and TFT-LCD Panel Module