D it extraction by simulation and conductance methods

Figure 5.4a shows the QSCV responses of samples and the ideal C-V curves of Al₂O₃/InGaAs MOSCAP. Low leakage currents of samples were measured to ensure they did not affect the accuracy of measurement. The simulation was the same with the approach in [17] and was represented in chapter 4 for the Al₂O₃/InAs MOSCAP structure.

From the figure, the simulation results of oxide/n-In_0.53Ga_0.47As MOSCAPs shows that the C-V curve of ideal device without any interface state density has an asymmetrical sharp with higher slope at negative voltage side and low minimum capacitance value, Cmin. According to this result, the C-V characteristic of sample S3 indicates that this curve approach closest to the ideal curve as compared to either S1 or S2 (Fig. 5.4a). By comparison, the evidence of high interface state density in sample S1 exhibited by the observation of highest value of Cmin as well as accumulation capacitance, Cacc.[17]

Fig. 5.4. a-The comparison of QSCV responses of sample S1, sample S2 and sample S3 and ideal C-V curve (without Dit) obtained by simulation. The inset shows the leakage of samples for ensuring the accuracy of measurement; b- and c- The Gp/ - f curves of sample S1 and sample S2, where Gp is the parallel conductance and  is the measured angular frequency.

The conductance method with the application limited to the depletion region is used to estimate the interface trap density near midgap of sample S1 and sample S2.[18] From the Gp/ versus frequency curves shown in Fig. 4(b) - 4(c), the values obtained are about

81

2.5x10¹² eV^-1cm^-2 and 5x10¹¹ eV^-1cm^-2, respectively for sample S1 and S2. For sample S3, the inversion layer occurred at frequency as high as 1 MHz and the use of conductance method will overestimate. The D_it value of this sample, however, can evaluate by simulation as follows.

Figure 5.5. a- Quasi-static C-V data of sample S2 and S3 (symbols) are fitted well with corresponding simulated data (solids). The ideal C-V curve is also showed as well (dash line); b-

“U-shape” D_it profiles of samples S2 and S3 extracted from simulation.

Based on QSCV data of samples, the simulations with Dit were performed for sample S2 and S3 as shown in Figure 5.5. As shown in Fig. 5.5a, simulated curves are fitted well with experimental data. The extracted Dit profiles of these two samples show a “U-shape”

with low Dit values at energy positions of 0.4 eV to near InGaAs conduction band (Fig.

5.5b). The smallest value of Dit of sample S2 is about 2.5x10¹¹ eV^-1cm^-2, in agreement with conductance method. Obviously, the Dit profile of sample S3 is lower than that of the sample S2 with the significant reduction of Dit at lower half InGaAs bandgap. Minimum value of 6x10¹⁰ eV^-1cm^-2 is obtained for this sample.

5.4. Conclusions

In conclusion, the effects of various surface treatments and different gas annealing conditions on the electrical characteristics of ALD Al2O3/n-In0.53Ga0.47As MOS capacitors were studied. We report the true inversion channel in Al2O3/n-In0.53Ga0.47As MOS capacitor structure by using the combination of ex-situ sulfide treatment and in-situ TMA pretreatment passivated surface and post deposition annealing in pure H2 gas. Both C-V and XPS data show a strong effect of H2 annealing on the reduction of interface trapping states. Dit extraction from simulation and conductance method is consistent with each

82

other and low interface D_it profiles with minimum value smaller than 10¹¹ eV^-1cm^-2 were obtained. A true inversion behavior supports an evidence of the free movement of Fermi level at lower half-part band gap. However, further work is needed verify if it is a truly unpinned Fermi level.

83 References

[1] R. Chau, S. Datta, and A. majumdar, "Opportunities and Challenges of III-V Nanoelectronic for High-speed, Low-power Logic Applications," IEEE CSIC Syposium Technical Digest, 17 (2005).

[2] S. Koveshnikov, N. Goel, P. Majhi, H. Wen, M. B. Santos, S. Oktyabrsky, V. Tokranov, R.

Kambhampati, R. Moore, F. Zhu, J. Lee, and W. Tsai "In0.53Ga0.47As based metal oxide semiconductor capacitors with atomic layer deposition ZrO2 gate oxide demonstrating low gate leakage current and equivalent oxide thickness less than 1 nm," Appl. Phys. Lett. 92, 222904 (2008).

[3] Y. Q. Wu, Student, W. K. Wang, O. Koybasi, D. N. Zakharov, E. A. Stach, S. Nakahara, J.

C. M. Hwang, and P. D. Ye, "0.8-V Supply Voltage Deep-Submicrometer Inversion-Mode In0.75Ga0.25As MOSFET," IEEE Electron Device Lett. 30, 700-702 (2009).

[4] G. Dewey, R. Kotlyar, R. Pillarisetty, M. Radosavljevic, T. Rakshit, H. Then, and R. Chau,

"Logic Performance Evaluation and Transport Physics of Schottky-Gate III-V Compound Semiconductor Quantum Well Field Effect Transistors for Power Supply Voltages (VCC) Ranging from 0.5V to 1.0V," in IEDM' 09 Tech. Dig., 1-4 (2009).

[5] C. L. Hinkle, M. Milojevic, E. M. Voge, and R. M. Wallace, "The significance of core-level electron binding energies on the proper analysis of InGaAs interfacial bonding," Appl. Phys.

Lett. 95, 151905 (2009).

[6] Han-Chung Lin, Wei-E. Wang, Guy Brammertz, Marc Meuris, and Marc Heyns, "Electrical study of sulfur passivated In0.53Ga0.47As MOS capacitor and transistor with ALD Al2O3 as gate insulator," Microelectron. Eng. 86, 1554-1557, (2009).

[7] Roman Engel-Herbert, Yoontae Hwang, Joël Cagnon, and Susanne Stemmer, "Metal-oxide-semiconductor capacitors with ZrO2 dielectrics grown on In0.53Ga0.47As by chemical beam deposition," Appl. Phys. Lett. 95, 062908 (2009).

[8] Byungha Shin, Joël Cagnon, Rathnait D. Long, Paul K. Hurley, Susanne Stemmer, and Paul C. McIntyre, "Unpinned Interface Between Al2O3 Gate Dielectric Layer Grown by Atomic Layer Deposition and Chemically Treated n-In0.53Ga0.47As(001)," Electrochem. Solid-State Lett. 12, G40-G43 (2009).

[9] É. O’Connor, S. Monaghan, R. D. Long, A. O’Mahony, I. M. Povey, K. Cherkaoui, M. E.

Pemble, G. Brammertz, M. Heyns, S. B. Newcomb, V. V. Afanas’ev, and P. K. Hurley,

"Temperature and frequency dependent electrical characterization of HfO2/InxGa1-xAs interfaces using capacitance-voltage and conductance methods," Appl. Phys. Lett. 94, 102902 (2009).

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[10] E. O’Connor, R. D. Long, K. Cherkaoui, K. K. Thomas, F. Chalvet, I. M. Povey, M. E.

Pemble, P. K. Hurley, B. Brennan, G. Hughes, and S. B. Newcomb,"In situ H2S passivation of In0.53Ga0.47As/InP metal-oxide-semiconductor capacitors with atomic-layer deposited HfO2 gate dielectric," Appl. Phys. Lett. 92, 022902 (2008).

[11] Y. C. Chang, M. L. Huang, K. Y. Lee, Y. J. Lee, T. D. Lin, M. Hong, J. Kwo, T. S. Lay, C.

C. Liao, and K. Y. Cheng, "Atomic-layer-deposited HfO2 on In0.53Ga0.47As: Passivation and energy-band parameters," Appl. Phys. Lett. 92, 072901 (2008).

[12] R. D. Long, É. O’Connor, S. B. Newcomb, S. Monaghan, K. Cherkaoui, P. Casey, G.

Hughes, K. K. Thomas, F. Chalvet, I. M. Povey, M. E. Pemble, and P. K. Hurley,

"Structural analysis, elemental profiling, and electrical characterization of HfO2 thin films deposited on In0.53Ga0.47As surfaces by atomic layer deposition," J. Appl. Phys. 106, 084508 (2009).

[13] N. Goel, P. Majhi, W. Tsai, M. Warusawithana, D. G. Schlom, M. B. Santos, J. S. Harris and Y. Nishi, "High-indium-content InGaAs metal-oxide-semiconductor capacitor with amorphous LaAlO3 gate dielectric," Appl. Phys. Lett. 91, 093509 (2007).

[14] Yoontae Hwang, Mark A. Wistey, Joël Cagnon, Roman Engel-Herbert, and Susanne Stemmer, "Metal-oxide-semiconductor capacitors with erbium oxide dielectrics on In0.53Ga0.47As channels," Appl. Phys. Lett. 94, 122907 (2009).

[15] M. Passlack, M. Hong, and J. P. Mannaerts, "C-V and G-V characterization of in-situ fabricated Ga2O3-GaAs interfaces for inversion/accumulation device and surface passivation applications," Solid-State Electron. 39, 133-1136 (1996).

[16] M. Milojevic, C. L. Hinkle, F. S. Aguirre-Tostado, H. C. Kim, E. M. Vogel, J. Kim,nand R.

M. Wallace, "Half-cycle atomic layer deposition reaction studies of Al2O3 on (NH4)2S passivated GaAs(100) surfaces," Appl. Phys. Lett. 93, 252905 (2008).

[17] G. Brammertz, H.-C. Lin, M. Caymax, M. Meuris, M. Heyns, and M. Passlack, "On the interface state density at In0.53Ga0.47As/oxide interfaces," Appl. Phys. Lett. 95, 202109 (2009).

[18] D. K. Schroder, "Semiconductor Material and Device Characterization," John Wiley and Sons, Inc., ISBN-13: 978-0-471-73906-7, 321-323 (2006).

85

Chapter 6

I

A

O

/

-I

G

A

(

= 0.53, 0.7)

I

A

C

In this chapter, the electrical properties of Al2O3/n-InGaAs MOS capacitors with In content of 0.53, 0.7 and 1 (InAs) are investigated. Higher In content materials usually have lower band gap, higher electron mobility and higher intrinsic carrier density. These properties lead to the different electrical properties for the Al2O3/InxGa1-xAs structures.

Result shows small C-V frequency dispersion in accumulation (< 1% per decade) which mostly due to border traps in Al2O3. Shorter minority carrier response time and smaller C-V hysteresis are observed for the InxGa1-xAs materials with the increase of In content.

Conductance contours show the trace of Fermi level movement for Al2O3/In0.53Ga0.47As structure but not for Al2O3/In0.7Ga0.3As and Al2O3/InAs structures. The Dit profile shows low interface density located in range 0.4 - 0.74 eV above In0.53Ga0.47As valence band maximum. The influence of holes and electrons tunneling on the increase of leakage current with the increase of In content is discussed.

6.1. Introduction ... 86

6.2. Experiment ... 86

6.3. Results and discussion ... 87

6.3.1. X-ray photoelectron spectroscopy analysis ... 87

6.3.2. High-resolution transmission electron microscopy micrographs ... 87

6.3.3. Electrical characteristics ... 89

6.4. Conclusions ... 93

References ... 95

86 6.1. Introduction

High-k/III-V structure has been extensively studied recently in order to realize the 22 - 16 nm node and beyond complement metal-oxide-semiconductor (MOS) technology [1].

Regardless of long term effort by community, the high trap density at high-k/III-V interface (D_it) due to III-V native oxides is still a challenge. The passivation of high-k/III-V interface is away needed in order to reduce the D_it. Recent reports indicated that the D_it not only depends on the passivation method but also influence by III-V compounds themselves [2]. The study of high-k/n-InGaAs structure with In content from 0 to 0.53 showed a significant reduction of capacitance-voltage (C-V) frequency dispersion at accumulation region as In content reaches 0.53 [3]. In this work, we extend to study the electrical properties of high-k/n-InGaAs structures with the In content varies from 0.53 to 1. The change of electrical properties of atomic layer deposition (ALD) Al2O3/n-InGaAs structures with increase of In content such as frequency dispersion, hysteresis, Dit

distribution, leakage current, and minority carrier response time are discussed.

The study results in chapter 3 and chapter 4 demonstrated clearly the effect of HCl plus TMA treatment on the improvement of Al2O3/n-InAs interface. In this work, this kind of surface treatment is also used for the investigation.

6.2. Experiment

Figure 6.1a illustrates the parameters of InGaAs [4] and structures of Al2O3/InGaAs MOS capacitors with different In content. The epi-layers with doping concentration of 2x10¹⁷ cm^-3 were grown by molecular beam epitaxy (MBE) method on n⁺ InP substrates. The process for MOSCAP fabrication is described in Fig. 6.1.b. Wafers were degreased by acetone and isopropanol before using HCl solution to remove native oxides. In ALD chamber, in situ trimethyl aluminum (TMA) clean was used by employing several TMA/N₂ pulses before the deposition of 13 nm Al₂O₃ at 300 ^oC using TMA and H₂O as precursors. The in-situ TMA cleaning is effective in further remove of native oxides [5-8].

After that, samples were post oxide deposition annealed at 400 ^oC in forming gas (5% H2

95% N₂) for 10 min. Finally, Ti/Pt/Au gate metal and Au/Ge/Ni/Au back side contact were deposited followed by post metal deposition annealing at 400 ^oC in N2 gas for 30s.

The MOSCAPs were characterized by multi-frequency C-V measurement using an Agilent HP 4284A precision LCR meter and I-V measurement using a Keithley 4200 semiconductor analyzer. Al2O3/InGaAs, InAs interfaces were analyzed by X-ray

87

photoelectron spectroscopy (XPS) measurement and high-resolution transmission electron microscopy.

Figure 6.1. a- Parameters of InGaAs compound [4] and Schematic of Al2O3/n-InGaAs MOSCAPs structures with the In content is 0.53, 0.7, and 1; b- Summary of process flow for MOSCAP fabrication.

6.3. Results and discussion