The block diagram of DC-DC buck converter with current programmable controller is shown in Fig. 9. The power stage connected to high-side and low-side transistors called as power MOSFET. The gate signal of power MOSFET is drove by driver stage that the drive signal is generated by non-overlap and pulse generator circuit with pulse-width modulation (PWM) or pulse-frequency modulation (PFM) method. The control circuit also contained voltage-reference generator, sawtooth generator, voltage adder and current sensor that used to current programmable circuit only. The control sequence with pulse-width modulation (PWM) is described as follows.
In the first interval of switching period TS, the clock signal forced the high-side transistor to turn on and the low-side transistor to turn off. At this interval, the inductor current ramped up and sensed by the current sensing circuit. The sensed signal Vsense is added with ramp signal Vramp to avoid the sub-harmonic oscillation phenomenon in current mode controller.
When the sum of signal Vsense and Vramp exceed the error amplifier’s signal VC, the comparator (COMP) turns from low to high and changes into the second interval of switching period. In the second interval, the power PMOS turns off and power NMOS turns on. The feedback voltage is forced the same as reference voltage that caused the output voltage is regulated in specified level. Moreover, there are two control loops feeding current signal and voltage signal by current feedback loop and voltage feedback loop, respectively. The current feedback loop constructed by current sense circuit and the voltage feedback loop constructed by error amplifier. In dynamic control, the output voltage variation affects the VC signal generated by error amplifier to increase or decrease the duty cycle in modulation.
∑
Fig. 9. The block diagram of current mode buck converter
The current programmed controller is unstable when converter operates above 50% duty cycle without compensation that shows in Fig. 10. The unstable problem called as sub-harmonic oscillation phenomena. In other words, the perturbed quantity of inductor current was large more and more during a few periods. The phenomena also occurred in other topologies such as boost and buck-boost converters. To avoid this stability problem, the control scheme is usually modified by adding an artificial ramp to the sensed current in the following descriptions.
The steady-state and perturbed waveform of inductor current are illustrated in Fig. 11.
We can explain the phenomena of steady-state waveform and perturbed waveform with derived formula. The steady-state waveform of inductor current with m1 slope ramps up in
Fig. 10. Inductor current at stable and unstable oscillation in current-mode converter
first interval and ramps down with m2 slope in second interval. When the perturbed waveform of inductor current occurred with ˆ
dT
s, the current difference was introduced in 1 ˆm dT
⋅ s[17][18].
The slope of inductor current equals:
According to Fig. 11, we can derive:
In steady-state, the above equation iL(0)
=
i TL( )s and shows as:From Fig. 11, we can use the steady-state waveform to express the current difference
i ˆ (0)
Lˆ ( )
L si T
as the slope multiplied by the interval length, Hence:i
cFig. 11. The perturbation waveform of inductor current
1
V
inV
out,
2V
outElimination of the intermediate variable ˆ
d
from equation (17) leads to:A similar analysis can be performed during the next switching period, show that:
After n switching periods, the perturbation becomes:
Note that, as n tends to infinity, the perturbation
i nT ˆ (
L s)
tends to zero provided that the characteristic value –D/D’ has magnitude less than one. Conversely, the perturbationi nT ˆ (
L s)
becomes large in magnitude when the characteristic value
α
= −D D' has magnitude greater than one:Hence, for the stable operation of the current mode controller, we need D/D’<1 or D<0.5.
The stable situation with compensation ramp is presented in Fig.12. When the converter operates with D<0.5, the perturbation inductor current will lead to be stable. Conversely, the perturbation inductor current will lead to be unstable to cause the sub-harmonic oscillation if converter operates with D>0.5 and no compensation.
2
The sub-harmonic oscillation is a well-known problem of current-mode controller.
However, the converter can be stable at all duty cycles by adding the compensated ramp to the sensed inductor current as shown in Fig. 12. This compensated ramp has the qualitative effect of reducing the gain of the current sensing feedback loop to solve the unwanted oscillation problem in current-mode controller of dc-dc converters.
Fig. 12. Current-mode control signal with the compensation ramp and inductor current
The compensation theorem is represented in Fig. 13, the perturbation i
ˆ (0)
L and i Tˆ ( )
L sFig. 13. Steady-state and perturbed inductor current waveforms with compensation
Elimination of ˆ
dT
s− yields:
A similar analysis can be used to the nth period, leading to:
For larger n periods, the perturbation magnitude i nT
ˆ (
L s)
tends to equations (26).Therefore, for stability of current mode controller in CCM, it needs to choose the slope of the artificial ramp
m
a such that the characteristic valueα
has magnitude less than one.Conversely, the perturbation i nT
ˆ (
L s)
becomes larger when the characteristic valueα
has magnitude greater than one:One common choice of the compensation ramp slop is
(
1)
This compensation ramp results in the characteristic value
α
to become zero for all duty cycle of the converter. Therefore, i Tˆ ( )
L s is leading to zero for anyiˆ (0)
L .Another common choice of
m
a is:The above characteristic causes the value
α
to become zero for all duty. As a result,ˆ ( )
L si T is zero for any i
ˆ (0)
L that the controller doesn’t saturate. This behavior is known asdeadbeat control when the system corrects all errors after one switching period. And the
compensated inductor current shows in Fig. 14.2
m
a =m
(28)Fig. 14. Inductor current with compensation ramp for few periods