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Electroluminescence Spectrum

Chapter 2: Device Fabrication Techniques

4.2. Principle of Device Operation

4.4.1. Electroluminescence Spectrum

Electroluminescence of the devices was measured in micro-photoluminescence system (micro-PL), as shown in figure 3.8 of the previous chapter. The electroluminescence (EL) emission of the p-i-n diode measured at 4 K is shown in figure. 4.8. The device was measured under the surface gate voltages of Vnsg = +0.9 V and Vpsg = -0.6 V, and the top gate voltages of Vntg = 6 V and Vptg = -3 V, and the junction voltage from Vpn = 1.6 V to 2.0 V with step of 0.05 V. The inset of figure 4.8 shows the measure photoluminescence (PL) of the sample. We clearly observe two peaks in the PL spectra at 1.5205 eV (815.5 nm) and 1.5239 eV (813.7 nm). The intensity ratio of the two PL peaks remains constant when the excitation power changes. Thus, the two peaks observed here are most likely due to the roughness of the quantum well interfaces [54]. There are also two peaks at

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1.5174 eV (817.5 nm) and 1.5207 eV (815.4 nm) in the EL spectra. The peaks have a 0.4 meV redshift when the junction bias Vpn increases from 1.6 V to 2.0 V. Full width at half maximum of the 1.5205 eV peak changes from 1.2 to 2.2 meV, and that of the other peak from 1.2 to 3 meV when Vpn increases from 1.6 V to 2.0 V. The narrow linewidths of the peaks demonstrate that the 2-D channel is of high-quality, which is essential for further applications such as electrically-driven single photon sources.

Figure 4.9 Electroluminescence spectra of the lateral 2D p-i-n diode at temperature of 4 K with with p-TG and n-TG biasing at Vptg = -3 V and Vntg = +6 V, respectively and p-SG and n-SG biasing at Vpsg = -0.6 V and Vnsg = +0.9 V, respectively and Vpn

from 1.6 V to 2.0 V with step 0.05 V. Inset shows photoluminescence spectrum at 4 K.

58 4.4.2 External quantum efficiency

Figure 4.9 shows the integrated intensity of the EL spectra (black curve with square symbol) against the junction bias Vpn. Light intensity increases linearly with diode voltage Vpn.

Figure 4.10 Light integrated intensity versus forward bias voltage of the lateral 2D p-i-n diode measured at the same condition. Inset shows the light integrated intensity (black curve with triangle symbol) and external efficiency (blue curve with round symbol) versus the diode current.

We can estimate the external quantum efficiency of the diode by assuming that internal quantum efficiency is 100%. The Transmission and reflection parameters for micro-PL system are as follows:

- CCD quantum efficiency at wavelength 817 nm: η1 = 93%

- Reflectivity of mirror: 95%, we use three mirrors, so η2 = 0.95*0.95*0.95 - Reflectivity of grating at wavelength 817 nm: η3 = 85%

- Transmissivity of the windows: η4 = 90%

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- Transmissivity of the objective and the lens at wavelength 817 nm: η5 = 75%

- NA of the objective: 0.5 so the collection efficiency of the objective is η6 = 33%

Therefore, external efficiency of the device is:

, (4.1)

Where Nph is the photon count measured by the CCD.

Inset of figure 4.9 shows the integrated intensity of the EL spectra (black curve with triangle symbol) and external efficiency (blue curve with round symbol) versus the diode current Ipn. At low currents, Ipn < 5.0 µA, after an initial set back, the light intensity rises sharply with current. At higher currents, Ipn > 5.0 µA (after the diode turns on, Vpn >

1.73 V), the light intensity increases with current at a constant rate. However, the slope of L-I curve is much smaller in comparison to low injection currents. The result can be explained as follows. At low currents, radiative recombination mostly happens in the i-region. But at high currents, electrons are injected into the p-region under p-SG and holes are injected into the n-region under n-SG. So, as a result, part of the radiation is blocked by the gate metal. Consequently, light collection efficiency decreases. This can be seen in the external efficiency curve in inset of figure 4.10. With the increasing forward current Ipn from 0.0 µA to 5.0 µA, the external quantum efficiency increases to a maximum of 0.003 %, then it drops dramatically for Ipn > 5.0 µA (after the diode turn on, Vpn > 1.73 V).

This problem could be avoided by using semi-transparent metal gate.

4.5 The Yield of n-channel and p-channel

The yield of the induced 2DEG and the induced 2DHG are approximately 50% and 70%, respectively. So the yield of the lateral p-i-n junction is about 35%. The yield of the twin-gate devices is lower than that of the single-twin-gate devices, because there is extra leakage path (between the surface gate and top gate, ohmic contacts) in the twin-gate devices. In addition, the more processes twin-gate devices needed, higher probability of process related failure occurs.

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Chapter 5

Summary and Future Work

5.1 Summary

The main results of this thesis are summarized as follows:

- We have developed a relatively simple method to fabricate high-quality lateral 2D p-i-n jup-i-nctiop-i-n. Our devices show better optical characteristics ip-i-n comparisop-i-n with the previous reports. We used standard processing technology to fabricate the devices, so it could be employ to fabricate the devices on other material.

- By using MIS-structure, 2DEG and 2DHG can be induced side by side to form a p-i-n junction. Singlechannel 2DEG or 2DHG were induced at threshold bias of 3.5 V and -1.25 V, respectively. This illustrates the reliability and simplicity of the ohmic contact fabrication method that only utilized conventional dry etch and E-gun vapor deposition.

The current – voltage of the diode shows clear rectifying behavior with turn-on voltages of 1.53 V. Main peak of EL spectrum is in good agreement with the theoretical estimate of ground state energy of 20-nm GaAs/AlGaAs quantum well.

- By using twin-gate structure (surface gate and top gate), the lateral p-i-n junction has also successfully fabrication. The surface gates provide a very good control for the carriers in the channel and at the same time can be put very close to each other. The top gates, which overlap the source and the drain through the insulator spacer, control the carriers in the channel regions next to the source and the drain without having a leakage path between the gates and the ohmic contacts. Therefore, the devices show better characteristics. Full width at haft maximum of EL peak is about 1.2 meV to 3 meV. The narrow linewidths of the peaks demonstrate that the 2-D channel is of high-quality, which is essential for further applications such as electrically-driven single photon sources.

-

5.2 Future Work

We have demonstrated that 2DEG and 2DHG can be induced simultaneously in a same structure and can place closed together to limitation of lithography process (nanometer scale with ebeam lithography). In addition, the devices were fabricated in undoped

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structure; so the 2D channel is of high-quality. Therefore, the devices can integrate with other devices to create new devices for different applications such as realization of electrical driven single-photon source device, intrinsic Spin Hall Effect study… Some ideas are given here for future work to look into further possibilities available with the lateral p-i-n junction architecture.

5.2.1 Single-Electron Pump Driven Single-Photon Source

Recently, Kaestner et al. [55] and Fletcher et al. [56] have successfully fabricated a stable single-electron pump on a 2DEG GaAs/AlGaAs heterostructure. Figure 5.1 (a) shows the principle operation of a single electron pump proposed by Fletcher et al. [56]

Figure 5.1 (a) Schematic electrical connections. Electrons are pumped from left to right. (c) Potential profile during the pumping cycle (offset vertically): (i) loading, (ii) back-tunneling, (iii) trapping, and (iv) ejection.

Their pumps use a dynamically formed quantum dot defined in a two-dimensional electron gas (2DEG) AlGaAs/GaAs heterostructure by two surface gates (yellow color in the figure 5.1 (a) above). Electron will be pumped from left to right. The gates cross an etch-defined wire terminated with Ohmic electrical contacts. The bias applied to the entrance gate (left) is a ac voltage added to constant voltage VG1 while the exit gate (right) is held at constant voltage VG2. Pump operation is illustrated in figure 5.1 (b): (i) When the entrance barrier is in the lowest position, Electrons from the source reservoir (left) are loaded into a quantum dot formed in the space between the gates. (ii) As the entrance barrier rising, some initially trapped electrons tunnel back to the source. (iii) The number of electrons being trapped in every cycle is the same and depends on VG1 and VG2. (iv) When the entrance barrier is high enough, trapped Electrons are forced over the exit

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barrier into the drain lead, producing a quantized current in an external circuit. By adjusting the values of VG1 and VG2, single-electron pump per cycle can be achieved.

We propose a single-electron pump driven single-photon source device, as shown in figure 5.2. The single-electron pump is fabricated on the i-region of the lateral p-i-n junction. Thus, single hot electron can be pumped into 2DHG region and then single photon emitted as electron-hole recombination occurs. In this aspect, high repetition-rate and electrically-driven single photon source could be realized in coming years.

Figure 5.2 Schematic of a single-photon source driven by single-electron pump device.

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Appendix -1

No Process Details Conditions

Mesa Insolation

1 Clean the substrate Acetone, IPA and DI water

3 minutes each in ultrasonic tub

2 Spin resist Az6112 positive PR 6000 RPM for 45 seconds

3 Hard bake Hot plate 90 seconds at 900C

6 Development Az300 developer 40 seconds in the developer and 90 seconds in DI water

12 Spin resist Az6112 positive PR 6000 RPM for 45 seconds

13 Hard bake Hot plate 90 seconds at 900C

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No Process Details Conditions

16 Development Az300 developer 40 seconds in the developer and 90 seconds in DI water

17 Blow dry with nitrogen gun

18 Surface oxide remove 1:10 HCl:H2O solution 30 seconds

19 Blow dry with nitrogen gun

20 Remove residual PR Oxygen plasma

5 seconds at 20 mTorr

28 Spin resist Az6112 positive PR 6000 RPM for 45 seconds

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32 Development Az300 developer 40 seconds in the developer and 90 seconds in DI water

33 Blow dry with nitrogen gun

34 Surface oxide remove 1:10 HCl:H2O solution 30 seconds

35 Blow dry with nitrogen gun

36 Remove residual PR Oxygen plasma

5 seconds at 20 mTorr

72

44 Spin resist Az5214E negative PR 6000 RPM for 45 seconds

45 Hard bake Hot plate 90 seconds at 90 0C

49 Development Az300 developer 40 seconds in the developer and 90 seconds in DI water

metallization Ti (20 nm) & Au (80 nm) E-gun evaporator at pressure of 2*10-6 mTorr

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No Process Details Conditions

Insulator layer process

57 Dehydration bake Nitrogen gas oven 2 minutes at 120 0C if humidity is above 50%

58 Spin resist Polyimide Su8-2000.5 3000 RPM for 40 seconds

59 Hard bake Hot plate 60 seconds at 90 0C

62 Development Az300 developer 45 seconds in the developer and 10 seconds in IPA

65 Spin resist Az5214E negative PR 6000 RPM for 45 seconds

66 Hard bake Hot plate 90 seconds at 90 0C

72 Top-gate metallization Ti (20 nm) & Au (100 nm) E-gun evaporator at pressure of 2*10-6 mTorr

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Vita

Name: Dai Van Truong (戴文長) Date of birth: 19-11-1981

Place of birth: Vinh Phuc – Viet Nam Education:

- Vinh Phuc high school, Vinh Phuc – Viet Nam, 1996-1999.

- Department of Physics, Ha Noi National University of Education, Ha Noi - Viet Nam, 1999-2003.

- Institute of Physics, Vietnam Academy of Science and Technology, Ha Noi - Viet Nam, 2004-2006.

- Department of Electronics Engineering, National Chiao Tung University, Hsinchu – Taiwan, 2007 - 2014.

Ph. D dissertation topic:

“Lateral p-i-n diode in an Undoped GaAs/AlGaAs Quantum Well”

“無摻雜 GaAs/AlGaAs 量子井之橫向 p-i-n 二極體”

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Publication List

[1] Van-Truong Dai, Sheng-Di Lin, Shih-Wei Lin, Jau-Yang Wu, Liang-Chen Li and Chien-Ping Lee, "Lateral Two-Dimensional p–i–n Diode in a Completely Undoped GaAs/AlGaAs Quantum Well”, Japanese Journal of Applied Physics, pp. 014001-014004, Vol. 52 (2013).

[2] Van-Truong Dai, Sheng-Di Lin, Shih-Wei Lin, Yi-Shan Lee, Yin-Jie Zhang, Liang-Chen Li, and Chien-Ping Lee, “High-quality planar light emitting diode formed by induced two-dimensional electron and hole gases”, Optics Express, pp. 3811-3817, Vol.

22 (2014).

[3] Van-Truong Dai, Sheng-Di Lin, Shih-Wei Lin, Jau-Yang Wu, Liang-Chen Li and Chien-Ping Lee, "Lateral Two-Dimensional p–i–n Diode in a Completely Undoped GaAs/AlGaAs Quantum Well", in The 3rd International Workshop on Nanotechnology and Application, Nov, 2011.

[4] Hien Do, Yue-Han Wu, Van-Truong Dai, Chun-Yen Peng, Tzu-Chun Yen, Li Chang,

"Structure and property of epitaxial titanium oxynitride grown on MgO(001) substrate by pulsed laser deposition", Surface and Coatings Technology, pp. 91-96, Vol. 214, 2013.

[5] Hien Do, Van-Truong Dai, Jr-Sheng Tian, Tzu-Chun Yen, Li Chang, “Structural and nanoindentation studies of epitaxial titanium oxynitride (001) films grown on MgO(001) substrate”, Surface and Coatings Technology, pp. 1-6, Vol. 251, 2014.

[6] Gray Lin, Van-Truong Dai, and Chien-Ping Lee, "Modeling the simultaneous two ground-state lasing emissions in chirped quantum dot lasers", LEOS Annual Meeting Conference Proceedings, 2009. LEOS '09. IEEE , vol., no., pp.672,674, Oct. 2009

[7] Gray Lin, Van-Truong Dai, and Chien-Ping Lee, "Simulation Analysis of Simultaneous Two Ground-State Lasing Emissions in Chirped Quantum Dot Lasers", International Electron Devices and Materials Symposia (IEDMS 2009), Nov. 2009.

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