ESD Robustness and TLP I-V Characteristics

The HBM ESD robustness of each circuit is evaluated by the HBM tester. The failure criterion is defined as the I-V characteristics shifting over 30 % from its original curve after ESD stressed at every ESD test level. According to the measurement results, the VOUT-to-3xVDD ESD robustness of both circuits are more than 1.25kV. The GND-to-VOUT ESD robustness of general stacked-device output driver (Output Driver_10 and Output Driver_30) are 0.75kV, while that of proposed stacked-device output driver with embedded SCR (Driver + SCR_10_10 and Driver + SCR_30_10) are improved to 1.75kV and 2.25kV, respectively, the GND-to-VOUT ESD robustness of general device output driver (Output Driver_50) is 1.25kV, while that of proposed stacked-device output driver with embedded SCR is improved to 2.50kV. All these HBM measurement results are listed in Table 3.2.

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Table 3.2

HBM ESD robustness of test circuits

Test Circuits

HBM Level

GND-to-VOUT VOUT–to-3xVDD

Pure Output Driver

Output Driver_10 750V 1250V

Output Driver_30 750V 1250V

Output Driver_50 1250V 1500V

Driver with Embedded

SCR

Driver + SCR_10_10 1750V 1250V

Driver + SCR_30_10 2250V 1250V

Driver + SCR_50_10 2500V 1750V

Driver + SCR_30_30 4000V 3500V

Driver + SCR_50_50 4500V 4000V

To investigate the turn-on behavior and the I-V characteristics of the circuits in the domain of HBM ESD event, the transmission-line-pulsing (TLP) system with a 10ns rise time and a 100ns pulse width is used. The current-handling ability, i.e. the secondary breakdown current (It2), of test circuit can be obtained from the

TLP-measured I-V curves. The TLP-TLP-measured I-V curves of test circuits are shown in Fig. 3.19 ~ 3.28. As measuring from VOUT to 3xVDD, the test circuits of Output

Driver_10 and Driver + SCR_10_10 have almost the same TLP I-V characteristics, and the TLP-measured It2 are ~0.85A, the test circuits of Output Driver_30 and Driver + SCR_30_10 have almost the same TLP I-V characteristics, and the TLP-measured It2

are ~1.03A, the test circuits of Output Driver_50 and Driver + SCR_50_10 have almost the same TLP I-V characteristics, and the TLP-measured It2 are ~1.20A, the test circuits

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of Driver + SCR_30_30 and Driver + SCR_50_50 can achieve the TLP-measured (It2) of 2.16A and 3.29A, respectively. As measuring from GND to VOUT, the embedded SCR in the proposed design can be triggered lower than ~2.5V, and then be latched to

~1.5V. The GND-to-VOUT It2 of general stacked-device output driver (Output Driver_10, Output Driver_30, and Output Driver_50) are 0.47A, 0.77A, and 1.02A, respectively, while that of proposed stacked-device output driver with embedded SCR (Driver + SCR_10_10, Driver + SCR_30_10, and Driver + SCR_50_10) are improved to 0.81A, 0.97A, and 1.26A, respectively, the test circuits of Driver + SCR_30_30, and Driver + SCR_50_50 can achieve the TLP-measured (It2) of 2.29A and 3.51A, respectively.

Fig. 3.19. Measured TLP I-V curves of Output Driver_10 and Driver + SCR_10_10, as zapping from VOUT to 3xVDD.

V

-to-3xV

TLP Voltage (V)

0 2 4 6 8 10 12 14

TLP Current (A)

0.0 0.2 0.4 0.6 0.8 1.0 1.2

Output Driver_10 Driver + SCR_10_10

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Fig. 3.20. Measured TLP I-V curves of Output Driver_10 and Driver + SCR_10_10, as zapping from GND to VOUT.

Fig. 3.21. Measured TLP I-V curves of Output Driver_30 and Driver + SCR_30_10, as zapping from VOUT to 3xVDD.

GND-to-V

TLP Voltage (V)

0 2 4 6 8 10

TLP Current (A)

0.0 0.2 0.4 0.6 0.8 1.0

Output Driver_10 Driver + SCR_10_10

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Fig. 3.22. Measured TLP I-V curves of Output Driver_30 and Driver + SCR_30_10, as zapping from GND to VOUT.

Fig. 3.23. Measured TLP I-V curves of Output Driver_50 and Driver + SCR_50_10, as zapping from VOUT to 3xVDD.

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Fig. 3.24. Measured TLP I-V curves of Output Driver_50 and Driver + SCR_50_10, as zapping from GND to VOUT.

Fig. 3.25. Measured TLP I-V curves of Output Driver_30 and Driver + SCR_30_30, as zapping from VOUT to 3xVDD.

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Fig. 3.26. Measured TLP I-V curves of Output Driver_30 and Driver + SCR_30_30, as zapping from GND to VOUT.

Fig. 3.27. Measured TLP I-V curves of Output Driver_50 and Driver + SCR_50_50, as zapping from VOUT to 3xVDD.

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Fig. 3.28. Measured TLP I-V curves of Output Driver_50 and Driver + SCR_50_50, as zapping from GND to VOUT.

In order to investigate the reliability of driver and ESD protection device, using 3 different dimensions in the output stage to collocation the different size with embedded SCR. TLP measurement results as shown in Fig. 3.29.

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Fig. 3.29. Measured TLP I-V curves, as zapping from GND to VOUT of driver with embedded SCR.

As measuring from VOUT to GND, the test circuits of Output Driver_10, Output Driver_30, and Output Driver_50 can achieve the TLP-measured It2 of 0.32A, 0.28A, and 0.33A, respectively as shown in Fig.3.30.

Fig. 3.30. Measured TLP I-V curves, as zapping from VOUT to GND.

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As measuring from 3xVDD to VOUT, the test circuits of Output Driver_10, Output Driver_30, and Output Driver_50 can achieve the TLP-measured It2 of 0.34A, 0.39A, and 0.39A, respectively as shown in Fig.3.31.

Fig. 3.31. Measured TLP I-V curves, as zapping from 3xVDD to VOUT.

From GND to VOUT, embedded SCR varies with the size of the driver, this design consideration can be more effectively utilized in the layout area. All these TLP measurement results are also listed in Table 3.3 and Table 3.4.

3xVDD-to-VOUT

TLP Voltage (V)

0 5 10 15 20 25

TLP Current (A)

0.0 0.1 0.2 0.3 0.4 0.5 0.6

Output Driver_10 Output Driver_30 Output Driver_50

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Table 3.3

TLP measurement results, as zapping from GND-to-V^OUT and VOUT-to-3xVDD

Test Circuits

TLP

GND-to-VOUT VOUT–to-3xVDD

Vt1

TLP measurement results, as zapping from VOUT-to-GND and 3xVDD-to-VOUT

Test

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