CHAPTER 3. THE FLYBACK CONVERTER USING THE PROPOSED INPUT
3.5 Extension Circuit
The voltage stress across main switch in primary side will be over 500V when the proposed flyback converter is applied in wide range input voltage up to 265V. The high voltage stress will cause two drawbacks, expensive cost in MOSFET and high switching loss in the same MOSFET. Therefore, this section will introduce an extension circuit to prevent the switch from the high voltage stress.
The voltage stress on main switch can be expressed as
3 Based on the prototype’s data, the maximum voltage stress Vds is 536V where VC2=440V, Vo=48V, and n2/n3=2.
Figure 3.19 is the extension circuit, twin-transistors type flyback converter, based on the proposed flyback circuit. The circuit adds a switch S2 and the switching operation is synchronous to S1. Except the additional switch, there is no difference in comparing to the proposed flyback converter. The additional transistor can share a half voltage-stress in the single transistor flyback converter. Therefore, the high voltage stress issue can be solved via the proposed twin-transistors flyback converter.
RL
Fig. 3.19 The proposed twin-transistors flyback converter
CHAPTER 4
THE FORWARD CONVERTER USING THE PROPOSED INPUT CURRENT SHAPER
Figure 4.1 illustrates the proposed forward AC/DC converter with input current shaper and fast output regulation. The proposed circuit is a single-switch single-stage AC/DC converter, which comprises a single switch S1, an input filter C1, bulk capacitor C2, soft-switching inductor L1, and a transformer with two primary windings N1&N2. The winding N1, inductor L1 and diode D1&D2 form an input current shaper. The winding N1, inductor L1, diode D1&D2, switch S1, and bulk capacitor C2 form a boost circuit. Moreover, the windings N2&N3, a bulk capacitor C2, switch S1, diode D3, D4, inductor L2, and output capacitor C3 form a forward converter. The circuit connection of the reset winding N1 differs from that in the classical forward converter. In the proposed design, the reset winding N1 has two functions, to recycle the magnetic current generated by the winding N2, and also to form a magnetic feedback for shaping line current. Besides,
N1N2 N3
Fig. 4.1 Proposed forward AC/DC converter with ICS
A turn ratio of n1/n2 can determine not only the corner angle of the line current, but also the voltage across a bulk capacitor C2. More detailed effects of turn ratio of n1/n2 are discussed in the following section. The inductor L1 provides a soft-switching function for diodes D1 and D2. When the current iN1 of L1 linearly reduces to zero illustrated in Fig. 6, D1
(in mode M1) or D2 (in mode M2) turn off switching loss. Additionally, the inductance and volume of L1 are significant, and are smaller than the primary windings N1 or N2 of the transformer.
The control circuit can be designed using either a simple fixed-frequency voltage mode control or a conventional peak-current mode control. The experimental results have demonstrated that even if a simple control method is used, the line current of the proposed AC/DC converter can comply with the standard IEC 61000-3-2 and the converter also can exhibit a fast dynamic response to the load.
4.1 Basic Operation Theories
The operating principle of the proposed converter resembles the boost-based AC/DC single-switch single-stage isolated power-factor-correction power supply (S4IP2). The energy, stored in winding N2 while switch S1 turns on, is delivered to bulk capacitor C2 via N1 when switch S1 turns off. The energy stored in winding N2 comes from the magnetizing current when switch S1 turns on. Furthermore, winding N2 and N3 are based on the same operating principle as the conventional forward converter. The current iN1 gives more magnetizing current to charge C2 and causes VC2 to increase during (t1, t3), as illustrated in Fig. 4.2.
Furthermore, a lower magnetizing current of iN1 causes VC2 to decrease during both periods (t3, Tl/2) and (t0, t1) in Fig. 4.2. In this converter the capacitance of C2 is designed to have the same value used in conventional AC/DC forward converter to maintain VC2 almost constant in a line cycle. Since the capacitance of C2 is large, VC2 remains almost constant during the whole line period. Furthermore, the inductance of the regulation inductor L2 insecondary side is set sufficiently large to keep L2 working in the continuous conduction mode, and also to
Figure 4.2 shows that the proposed circuit has two operation modes, M1-M4 and M2-M3, where M4 and M3 are mirror-symmetric to M1 and M2. Figure 4.3 illustrates the relative voltage and current waveforms in a single switching cycle in two operation modes.
4.1.1 Operation Modes M1 or M4 (during t0~t1 or t3~Tl/2):
Within this mode, the converter operates as the conventional forward converter does.
However, the magnetizing current iLm generated by winding N2 is transferred to winding N1
and the capacitor C2 is charged when S1 is switched off. The current iN1 linearly reduces to zero when S1 is turned off. VC2 denotes the voltage across the bulk capacitor C2. If C2 is
M1
M2 M3
M4
t0 t1 t2 t3 T/2
VC2,av
|Vac|
|iac|
VBD VC2
M1
M2 M3
M4
t0 t1 t2 t3 T/2
VC2,av
|Vac|
|iac|
VBD VC2
Corner Angle: ω(t1-t0)
M1 t
M2 M3
M4
t0 t1 t2 t3 T/2
VC2,av
|Vac|
|iac|
VBD VC2
M1
M2 M3
M4
t0 t1 t2 t3 T/2
VC2,av
|Vac|
|iac|
VBD VC2
Corner Angle: ω(t1-t0)
t
Fig. 4.2 Operation modes in half of line cycle
t0,M1 t1,M1 t2,M1 iN1
iLm
iN2
iN3
iC2
VN1
VN3
VL1
VD1 VN2
M1
t2,M1 t0,M2 t2,M2
t1,M2 t3,M2 iN1
iLm
iN2 iN3
iC2
VN1
VN2
VN3
VL1
VD1 M2
t0,M1 t1,M1 t2,M1 iN1
iLm
iN2
iN3
iC2
VN1
VN3
VL1
VD1 VN2
M1
t2,M1 t0,M2 t2,M2
t1,M2 t3,M2 iN1
iLm
iN2 iN3
iC2
VN1
VN2
VN3
VL1
VD1 M2
Fig. 4.3 Voltage and current waveforms in two modes
sufficiently large, then VC2 can approximate a constant during a line cycle in the steady state, and can be calculated as follows:
o When the boundary time t1 is met as shown in Fig. 4.2, the magnetic flux will just decreased to zero at the end of duty off time. It implies that after the boundary time of M1&M2,
iN1 will not decreases to zero at the end of duty off time. Therefore, the average of iN1 becomes large and causes VC2 starting to increase. In other words, t2,M1 = t3,M1 at t = t1. Using the boundary conditions t1 can be obtained by the following calculations.
While time is in the duration of t1,M1 −tt2,M1, the current iN1 is given by
above gives
0
Figure 4.4 illustrates the current loop in three intervals in mode M1 or M4.
Vac
The winding currents and voltages are calculated as follows:
where t
L
4.1.2 Operation Modes M2 or M3 (during t1~t2 or t2~t3):
In this mode, iN1 doesn’t decrease to zero while S1 turning off in last switching cycle so iN1 will continue to decrease when S1 is turned on again. Current iN1 flows through the winding N1, L1, D2, and S1. Moreover, the induced voltage across winding N1 forces iN1 to speed up decreasing to zero. The capacitor C2 supplies current iN2 which flows through winding N2 and S1. Simultaneously, D3 turns on and the transformer delivers the power to the output circuit. When S1 turns off, the magnetizing current iLm induces iN1 and charges capacitor C2 via winding N1, L1,and D1. The induced current iN1 linearly decreases to iN1(t3,M2) at the end of the duty off period of switch S1, where iN1(t3,M2) or iN1(t3,M3) is nonzero in this mode. Figure 4.5 shows the current loops for three operating stages in M2/M3.
Vac
The corresponding currents and voltages are obtained as follows:
Since proper L2 is used, the current iN3 is almost constant. Consider the magnetic flux generated and applied between winding N1 and N2 we can yield
)
⎪⎪
Substituting equations (4.12) and (4.14) into (4.11) yields iN1(t3,M2), or iN1(t0,M2). For the other winding currents, the following equations are obtained.
]
⎪⎩
4.2. Analysis of Converter Operation 4.2.1 Line Current and Duty Ratio
The line current iac is a low frequency component of iN1 flowing through the low pass filter Lr-Cr. Mathematically the line current iac is the average current of iN1 within a switching cycle. Equation (4.4) demonstrates that the average current iN1, namely, iac, varies slightly with Vin in both modes M1 and M4. Moreover, equation (4.11) demonstrates that the line current iac
varies markedly with the line voltage Vin in both modes M2 and M3. Accordingly, the none-zero current iN1(t3,M2), that equals to iN1(t0,M2), also varies with Vin. Therefore, the resultant line current is produced, as illustrated in Fig. 4.2. Moreover, the current iN1 is discontinuous in mode M1 and M2 according to Fig. 4.3. Therefore, the proposed converter operates the current iN1 in DCM.
Since the capacitance C2 is assigned large, VC2 is assumed constant. Thus, for fixed load the duty ratio D can be assumed approximate to a constant. Under the assumptions the relation of VC2 and duty ratio D can be found through employing equation (4.1). Additionally, iL2 is intentionally designed to operate in CCM since this kind of design is useful to stabilize the duty ratio D and improve the output regulation.
4.2.2 Corner Angle of Line Current
Line current corner angle (CA) is defined as ω(t1-to), it can refer to fig. 4.2. Equation (4.3) demonstrates the relation between CA and parameters, duty ratio D, n1/n2, n2/n3, and Vo/Vm. Moreover, equations (4.1)-(4.3) demonstrate the relation of CA and Vo/Vm in different n1/n3 and duty ratio D. CA is larger in the high line voltage than the low line voltage with same given constant output power Po. Furthermore, greater CA degrades the power factor more and lower CA has higher power factor. Figure 4.7 shows the relationship in curve between corner angle and Vo/Vm, D, and n1/n3.
0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5
0 50 100 150 200 250 300 350 400 450
Vc2 & Duty Cycle,n2/n3,Vo=48v
Duty Cycle
Vc2
n2/n3=0.5 n2/n3=1.0
n2/n3=1.5 n2/n3=2.0
n2/n3=2.5 n2/n3=3.0
Fig. 4.6 VC2 & Duty cycle, n2/n3 at Vo=48v
4.2.3 Voltage Across Bulk Capacitor
VC2 denotes the voltage across bulk capacitor C2. The voltage VC2 are determined by n1/n2, duty ratio D, corner angle CA, input voltage Vin and output voltage Vo. Equation (4.21) is the formula to obtain CA. It shows that the greater line voltage or smaller VC2 produces smaller
0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6
0 50 100 150 200 250 300 350 400
450 Vc2 & Conduction angle,n1/n2@D=0.35
Corner angle(rad)
Vc2(v)
n1/n2=1.0 n1/n2=1.1 n1/n2=1.2 n1/n2=1.3 n1/n2=1.4
n1/n2=1.5 n1/n2=
1.5
n1/n2
=1.0
Vac=265v Vac=85v
0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6
0 50 100 150 200 250 300 350 400
450 Vc2 & Conduction angle,n1/n2@D=0.35
Corner angle(rad)
Vc2(v)
n1/n2=1.0 n1/n2=1.1 n1/n2=1.2 n1/n2=1.3 n1/n2=1.4
n1/n2=1.5 n1/n2=
1.5
n1/n2
=1.0
Vac=265v Vac=85v
Fig. 4.8 VC2, Corner angle and n1/n2
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
0 0.2 0.4 0.6 0.8 1 1.2 1.4
1.6 Corner Angle & Vo/Vm,(N2/N3=2)
Vo/Vm
Corner Angle(rad)
D=0.1
D=0.27
D=0.35
D=0.44 n1/n3=2.3 n1/n3=2.5 D=0.185
Fig. 4.7 Corner angle and Vo/Vm
CA. Smaller CA produces higher power factor and lower THD. Furthermore, in practical applications VC2 should be below 450V/dc with wide range input, 90V~265V/ac, and parameters, n1/n2/n3 and D, also must meet the requirement (VC2 below 450V/dc) to produce a given output Vo.
)]
1 ( [
2 3
2 1 1 2
1 V n V n
n V V
Sin V t
o C
o m
C
⋅
−
⋅
− ⋅
= −
ω (4.21)
Now using equations (4.1) and (4.2) the values of VC2, t1, n1/n2, and n3/n2 can be determined under some compromise considerations.
Furthermore, equations (4.4) and (4.11) show that the current iN1 is inversely proportion to (L1+LN1).
⎪⎩
⎪⎨
⎧
<
<
<
<
=
else , 0
,
,
2 , 3 2
, 2
1 , 2 1
, 1
1 1
1
M M
N
M M
N
D i t t t
t t t
i
i . (4.22)
Since iD1 is the charge current of C2, VC2 will be affected by iN1 slightly. Therefore, VC2 will be slightly inversely affected by (L1+LN1).
4.2.4 Inductor L1
Two reasons exist for using inductor L1. The first reason is to reduce the high frequency harmonics of iN1, while the second is to reduce the voltage across capacitor C2. Figure 4.2 demonstrates that the slope of VC2 is zero at time t1. The total charge charged by iN1 during the duty on period thus equals the total charge discharged by iN2. Thus equating the integration of equations (4.4) and (4.5) gives
∫
∫
= 01,, 11 1, 3 1 , 1
) ( )
( 2
1
M M M
M
t
t N
t
t iN τ dτ i τ dτ (4.23) The equation above can give the ratio of L1/LN1,
1 ) 2
(
) )(
(
3 2 2
3 3 1
2 2 3
2 1
1 −
⋅ ⋅ +
⋅
⋅
⋅
−
= ⋅
m o s
o m
s o
c
N
L n
V T n
n I n n n L
T n n V n V L
L (4.24)
or
1
2 3
2 2 2
1 2
2
3 2 2 2
1
2
) (
) 1
(
N
m s o
o o
m c c
o s
c
L L
n T V n
V I
t Sin V n V
V n T V
V
L −
⋅
⋅ ⋅ +
−
⋅
−
=
ω
(4.25)
4.3 Design Procedures
The method for designing the circuit of control loop and determining the voltage stresses of components voltage for the proposed converter is similar to that for designing the conventional forward converter. However, the transformer design needs more calculations and considerations since three windings are designed in this converter. The design method for transformer is shown as following.
1) Windings turns ratio n1/n2/n3: The turn ratio n2/n3 can be obtained from equations (4.1)-(4.2) by using the substitutions of the given Vm,min, Vm,max, Vo, Dmax, and ωt1,min, where Vm,min and Vm,max is the amplitude of minimum line voltage and maximum line voltage respectively, Vo is typical output voltage, Dmax is the maximum duty ratio, and 0.4≦Dmax≦0.45. The corner angle ωt1,min,
0< tω 1,min ≤π4, can be obtained as long as Vm,min is chosen. The detailed steps for obtaining the turn ratio n2/n3 is depicted as follows:
(i) Let VC2 be chosen lower than 420V at Vin=265V.
(ii) Assume that VC2 is proportional to Vin. Then VC2≒85×(420/265)=134.7V at Vin=85V.
(iii) Let Vo=48V, Dmax=0.4 then 48=134.7×(n3/n2)×0.4, n3/n2≒0.8.
(iv) Let ωt1,min=0.24, Vm,min≒120V, Vo=48V, Dmax=0.4, and n2/n3=1.2. Then the substitutions of all the data to equation (4.3) gives n1/n2≒1.0.
2) Magnetic inductance Lm and LN1: Magnetizing current iLm stores energy to charge bulk
capacitor, so it is recommended to 20 percent of the primary load current.
Lm s C
m i
T D L V
∆
= 2⋅ max , (4.26)
where %∆iLm ≈iN2(t1,M1)⋅20 .
The inductance LN1 can be yielded in equation (4.27)
2 2 1/ ( 1)
n L n
LN m = , (4.27) where n2 can be obtained by solving Faraday’s law,
) /(
) ( 2 max
2 V D T AdB
n = C ⋅ s e . (4.28) Ae is effective area of core and dB is flux density change in transformer core.
3) Series inductance L1: The inductance L1 can be yielded by putting above parameters in equation (4.25).
4) To confirm dB<Bmax : The maximum change value of magnetic flux density has to limit under maximum magnetic flux density for the selected magnetic material.
Given Lm⋅diLm = N2 ⋅dB⋅Ae or
Ae N
di dB Lm Lm
⋅
= ⋅
2
, where diLm can be calculated by substituting DTs for (t-t0,M2) in equation (4.14), Ae is the effective area of the selected magnetic core.
] )
(
[ 1 0, 2 2 DTs L t V
i di
m C M
N
Lm = + ; max
2
Ae B N
di Lm m
⋅ <
⋅ .
4.4 Experimental Results
The proposed structure has been tested under the specifications of 85V~265V/ac input voltage range, 50V/dc output voltage, and 100w output power. The turn ratio of n1/n2/n3 is 27/23/12 and the inductance L1<<LN1, where L1=30uH and transformer core PQ32/20 is used.
The transformer core employed in previous similar converter should be EER35 in [4] and [7].
Although numerous previous similar converters have the transformer core size similar to that of the proposed converter in similar given output power and switching frequency, the boost
inductors sizes, 58uH-240uH in [4], 1.4mH in [7] or 1.7 times the magnetic inductance [28], are several times the L1 in the proposed converter. The sizes of the boost inductors employed in [4] and [7] are still several times of L1 when flowing a similar line current in the proposed converter. Figure 4.9 illustrates the line current in a full line cycle. Experiments have verified that the harmonic distribution complies with a standard of IEC 61000-3-2. Table 4.1 demonstrates that the detailed harmonic distribution of the prototype design meets the requirements of class D.
Figure 4.10 illustrates dynamic response switching between a half and a full load under 110V/ac input voltage. The output voltage of the prototype displays a fast response and stable regulation. Moreover, Fig. 4.11 illustrates the voltages across the bulk capacitor for different input voltages under a full load. The voltage of the bulk capacitor depends on Vac and turn-ratio n1/n3 but it is almost independent of load current. The maximum voltage can be held below 450V/dc, a popular commercial voltage in the market for electrolytic capacitors, by adjusting turn-ratio n1/n3.
Vac, 100V/div
Iac, 1A/div
Vac, 100V/div
Iac, 1A/div
Fig. 4.9 iac & Vac waveform at Vac=110v ,Io=1.5A
Vo, 20V/div Vac, 100V/div
iac, .5A/div
Io, 1A/div Vo, 20V/div Vac, 100V/div
iac, .5A/div
Io, 1A/div Vo, 20V/div Vac, 100V/div
iac, .5A/div
Io, 1A/div Vo, 20V/div Vac, 100V/div
iac, .5A/div
Io, 1A/div
Fig. 4.10 Dynamic response waveforms for Vac, iac, Vo and Io when Vac=110V, Vo=50V and Io=0.5A/1A
Vc2, voltages across bulk capacitor
150 200 250 300 350 400 450
85V 110V 150V 220V 260V
Vac
Vc2
2A/Io 1A/Io 0.6A/Io
Fig. 4.11 Voltage stress of bulk capacitor VC2 and line voltage Vac
Table 4.1 The major harmonic components of the line current iac(A)
Harmonic number
Table 4.2 illustrates the voltage stress in S1, voltage across bulk capacitor C2 and efficiency η. The voltage stress in S1 is over 450V when input voltage Vin is over 260V.
Therefore, an extended type with two switches forward converter can be adopted if user wants to reduce the voltage stress in S1. The efficiency is penalized due to part of the power being processed twice. Moreover, that the converter operates in DCM at the current iN1 also causes the efficiency being slightly decreased.
4.5 Extension Circuit
The voltage stress across main switch in primary side will be over 500V when the proposed Forward converter is applied in wide range input voltage up to 265V. The high voltage stress will cause two drawbacks, expensive cost in MOSFET and high switching loss in the MOSFET. Therefore, an extension circuit is introduced to prevent the switch from the high voltage stress.
The extreme voltage stress on main switch can be obtained from equation (4.17).
2 1
1 1
1 2 2
2 2
) ) (
( C
N N in
C C
ds V
L L n
L V n
V V
V <
⋅ +
− +
= , (4.29) Based on the data of prototype, the maximum voltage stress Vds is no more than 860V where V is 430V at input voltage 265V.
Table 4.2 Voltage stress of S1, Voltage across bulk capacitor C2 and efficiency η.
Vin [V] VS1 [V] VB [V] η[%]
90 315 221 72 110 326 241 74 130 332 258 75.4 220 431 371 76 230 452 389 76.5 260 482 425 76.1
Figure 4.12 is the extension circuit, a twin-transistors type Forward converter, based on the proposed Forward circuit. The circuit adds a switch S2 and the switch’s operation is synchronous in S1. Except the additional switch, there is no difference in comparing to the proposed Forward converter. The additional transistor can share a half voltage-stress in the single transistor Forward converter. Therefore, the high voltage stress issue can be released via the proposed twin-transistors Forward converter.
N1N2 N3
Fig. 4.12 The proposed twin transistors forward converter.
CHAPTER 5
THE FULL-BRIDGE CONVERTER USING THE PROPOSED INPUT CURRENT SHAPER
A Full-bridge AC/DC converter, with the functions of harmonic current elimination and fast output transient response, is proposed as shown in Figure 5.1. The circuit is a single-stage AC/DC converter consisting of 4 switches S1-S4, an input filter C1, a bulk capacitor C2, an inductor L1 and a transformer with two primary windings N1&N2, where N1 plays a role of magnetic feedback winding. The winding N1, inductor L1and diode D5&D6 form an input current shaper. The winding N1, inductor L1, diode D6&D3 (or D5&D1), switch S2 (or S4) and bulk capacitor C2 forms a boost circuit. The winding N2&N3, a bulk capacitor C2, switches S1-S4, diodes D7, D8, inductor L2 and output capacitor C3 forms a full-bridge converter. The switches S1~S4 are always MOSFETs so D1~D4 are the body diode in switches S1~S4.
The control method adopts a conventional fixed-frequency voltage mode control. The experimental results have shown that even using a popular fixed-frequency controller TL494, the line current of the proposed ac/dc converter can comply with the standard IEC 61000-3-2 and the converter also can have fast load dynamic response.
RL Vac Lf
Cf
Dr
C1
C2
L1
D1
D2 D3
D4
D5
D6 S1
S2 S3
S4
n1 : n2: n3
iac
iN1
iD5
iD6 iN2
iS4
iS2 iS1 iS3
V+C1
-VC2 +
-VL1 +
-C3 L2
D7
D8 iD7
iD8
iL2 VO +
-VN2
+
-VN3 +
-VN1
+
-im VD6+
-RL Vac Lf
Cf
Dr
C1
C2
L1
D1
D2 D3
D4
D5
D6 S1
S2 S3
S4
n1 : n2: n3
iac
iN1
iD5
iD6 iN2
iS4
iS2 iS1 iS3
V+C1
-VC2 +
-VL1 +
-C3 L2
D7
D8 iD7
iD8
iL2 VO +
-VN2
+
-VN3 +
-VN1
+
-im VD6+
-Fig. 5.1 Proposed Full-bridge AC/DC converter
5.1 Basic Operation Theories
The operation principle of the proposed converter is somewhat similar to the boost-based forward AC/DC single-stage isolated power-factor-corrected power supply in the Chapter 4.
Magnetic energy is stored in inductor L1, used as an energy-flow switch, when switch S1&S2
are on. Electric energy will be delivered to bulk capacitor C2 through L1 when switch S1&S2
turn off. Windings N2 and N3 provide the energy storing and transferring components of the full-bridge stage. Winding N1 provides a path to charge L1 and also transfers the line energy to output loads in the duty on duration. In the duty off duration while L1 still conducts, winding N1 also induce current iN1×(n1/n3) to secondary side. However, when the line voltage is greater then the winding voltage VN1/2 in the duty on duration, the power line can more strongly charges C2 through L1 and winding N1. In the charging duration of C2, the line current |iac| is greater than zero and grows fast as the waveform shown in time duration t1-t3 of Fig. 5.2.
Thus, the slope of VC2 is positive during t1-t3 and negative in other duration in each half line cycle. The resulting waveform of VC2 is sketched in Fig. 5.2. In this circuit the capacitor C2 is arranged with a capacitance similar to that used in conventional AC/DC full-bridge converters.
Since C2 is large so that VC2 can approximate to its average voltage, VC2,av. The proposed circuit has two operation modes. Figure 5.2 shows these two operation modes that appear mirror-symmetrically in each quarter of a line cycle. Figure 5.3 shows the relative voltage and current waveforms in one switching cycle in two operation modes.
In this circuit, L2 is designed in the operation of continuous conduction mode. Since VC2 is almost invariant, the duty ratio D can be approximate to constant one in the whole line cycle for fixed load. The circuit analysis will be presented in the following sections. Therefore, a duty cycle D will be assumed constant in these two operation modes and the analysis of L2 will be taken according to the theorem of voltage-second balance in steady state design consideration.
M1
Fig. 5.2 Operation modes in one half of line cycle
t0,M1
Fig. 5.3 Voltage and current waveforms in a switching cycle in the two modes
5.1.1 Operation Modes M1 or M4 (during t0-t1 or t3-Tl /2)
Within this mode, the line current |iac| and iN1 are zeros. The operation principle of the converter is the same as that working in the conventional full-bridge converter. Since C2 is large enough, VC2 can approximate to a constant value during a line cycle. The output conductance L2 and capacitance C3 provide a good low pass. Thus the output voltage can be regarded to a constant value and can be obtained as
n D V n
Vo = C ⋅ ⋅
2 2 3
2 , (5.1)
where D is defined as
1 , 0 1 , 2
1 , 0 1 , 1
M M
M M
t t
t t
−
− in mode M1 or
2 , 0 2 , 3
2 , 0 2 , 1
M M
M M
t t
t t
−
− in mode M2. Since the
capacitance C2 is assigned large, VC2 is assumed constant. Thus, for fixed load the duty ratio
capacitance C2 is assigned large, VC2 is assumed constant. Thus, for fixed load the duty ratio