Extracted Results of Saturation Devices

In addition to cold device and linear operation conditions, the three devices are also biased in saturation mode to extract the modeling parameters. Three biased conditions were selected as VG=VD=0.8V, VG=VD=1V, and VG=VD=1.2V.

Figure 4.32a, 4.32b, 4.32c show the extracted C_GS and C_GD of the saturation devices. It shows the CGS increases slightly as VG and VD increase from 0.8V to 1V, but will not increase anymore as V_G and V_D increase from 1V to 1.2V. The C_GD is almost independent of bias condition when device is in saturation region, and is approximately the value of CGDO. It’s due to that there exists a pinch-off region near the drain end of the channel, in which carriers are expelled out and hence the CGDi is vanished.

Figure 4.33a, 4.33b, and 4.33c are the extracted results of g_m and g_mb corresponds to different bias voltages and device dimensions. They are dependent on device dimensions as expect.

The extracted g_m increases as V_G increases from 0.8V to 1V, however, decreases slightly as VG increases to 1.2V. This is due to that as VG increases to a certain value, the resulted vertical electrical field will reduce the mobility of the carrier and hence g_m. Figure 4.34a, 4.34b, and 4.34c demonstrate the extracted results of transcapacitnce Cm and Cms. It shows dependence on frequencies, but probably due to the extraction method. However, the trends can still observed, that the transcapacitances have slightly dependence on bias conditions, and

shown in Fig.4.35a, 4.35b, and 4.35c. It shows that the RG are almost invariant as the bias voltage changes from 0.8V to 1.2V. The R_G of devices with different dimensions are obviously different, the trend were discussed in previous section.

Figure 4.36a, 4.36b, and 4.36c show the extracted values of C_SB and C_DB for the three devices in different bias conditions. It can be seen that the CSB is almost unchanged as VG and VD

change. However, the values C_DB are decreased as V_D increased due to that the large V_D will widen the deletion region width of the reversed drain/bulk junction. Comparing the extracted values of C_DB with that of C_DBO show in Fig. 4.14, it can be found that the C_DB of reversed-biased drain/substrate junction are smaller than that of a cold device.

The R_SB and R_DB for the three saturation devices are shown in Fig.4.37a, 4.37b, and 4.37c. No sign of RSB changes with bias voltage is observed since source and substrate are grounded.

However, it shows the R_DB will increase slightly as the V_D increases, it seems the widen depletion region of the reversed-biased drain/substrate junction will increase the RDB.

4.5 Summary

In this chapter, the small-signal equivalent circuits for three modes of device bias condition are introduced. The extraction methods for components correspond to each equivalent circuit were deduced in detail. And the extraction results were also shown. In the case of cold devices, C_GSO, C_GDO, C_SBO, C_SBE, C_DBO, C_DBE, C_GBO, C_GBE, R_SB, R_DB, and R_DSB were extracted. All of them are scaled with device dimensions. In the situation of linear operation mode, the RS, RD

and R_G not dealt with in the cold device were extracted. The dependence of the components in the equivalent circuits on the applied gate voltage was also discussed. In the case of saturation device, in addition to the components have been discussed in linear operation mode, g_m, g_mb, Cm, and Cmb were also extracted.

R_S R_D R_G

R_DS

D_DB D_SB

C_GSO C_GDO

R_BB

R_SB R_DB

Fig.4.1 The cross-sectional structure and top view of a four-terminal MOSFET.

S

G

D

B

I_m I_ms

R_DB R_SB

R_DSB

C_GBE C_DB

C_SB

C_GS C_GD

R_D R_S

R_G G_i

S_i D_i

I_mx

I_md

C_SBE B_i C_DBE

Fig.4.2 The small signal equivalent circuit of a four-terminal RF MOSFET including the intrinsic and extrinsic parts.

S D G

B

R_DB R_SB

R_DSB C_GBO

C_DBO C_SBO

C_GSO C_GDO

R_D R_S

R_G G_i

S_i D_i

C_SBE C_DBE

C_GBE R_GB

B_i

Fig.4.3 The small signal equivalent circuit of a cold MOSFET, in which the intrinsic part of the MOSFET is neglected.

S D G

B

R_DB R_SB

R_DSB C_GBO

C_DBO C_SBO

C_GSO R_G C_GDO

G_i

C_DBE C_DBE

R_DSB C_GBE

B_i

Fig.4.4 The small signal equivalent circuit of a cold MOSFET with RS and RD neglected.

S

D G

B

R_DB R_SB

C_GBE

C_DB C_SB

C_GS C_GD

R_D R_S

R_G G_i

S_i D_i

R_CH

R_DSB

C_SBE C_DBE

B_i

Fig.4.5 The small signal equivalent circuit of a MOSFET biased in linear region.

S

G

D

B I_m I_ms

R_DB R_SB

R_DSB

C_GBE C_DB

C_SB

C_GS R_G C_GD

G_i

S_i D_i

I_mx

I_md

C_SBE C_DBE

B_i

Fig.4.6 The small signal equivalent circuit of a saturated MOSFET with the RS and RD neglected.

0 5 10 15 20 FREQUENCY (GHz)

0 0.001 0.002 0.003 0.004 0.005

Im[YGG]

0 0.0003 0.0006 0.0009

Re[YGG]

Im[Y_GG] of M1 (L) Im[Y_GG] of M2 (L) Im[Y_GG] of M3 (L) Re[Y_GG] of M1 (R) Re[Y_GG] of M2 (R) Re[Y_GG] of M3 (R)

M1:3.6mmX4 M2:7.2mmX4 M3:12 mmX4

Fig.4.7 The measured Re[YGG] and Im[YGG] of M1(3.6µm× ), M2( 7.24 µm× ), 4 and M3(12µm× ) devices, which are biased at VG=VD=VS=VB=0. 4

0 5 10 15 20 FREQUENCY (GHz)

-0.0025 -0.002 -0.0015 -0.001 -0.0005 0

Im[YDG], Im[YSG]

Im[Y_SG] of M1 Im[Y_SG] of M2 Im[Y_SG] of M3 Im[Y_DG] of M1 Im[Y_DG] of M2 Im[Y_DG] of M3

M1:3.6mmX4 M2:7.2mmX4 M3:12 mmX4

Fig.4.8 The measured Im[YDG] and Im[YSG] of M1( 3.6µm× ), M2( 7.24 µm× ), 4 and M3(12µm× ) devices, which are biased at VG=VD=VS=VB=0. 4

0 5 10 15 20

0 5 10 15 20 FREQUENCY (GHz)

-0.0004 -0.0003 -0.0002 -0.0001 0

Im[YGB]

Im[Y_GB] of M1 Im[Y_GB] of M2 Im[Y_GB] of M3

(a)

0 5 10 15 20

FREQUENCY (GHz) -0.0004

-0.0003 -0.0002 -0.0001 0

Re[YGB]

Re[Y_GB] of M1 Re[Y_GB] of M2 Re[Y_GB] of M3

(b)

Fig.4.10 (a) The measured Im[YGB] of M1( 3.6µm× ), M2( 7.24 µm× ), and 4 M3(12µm× ) devices, which are biased at VG=VD=VS=VB=0. 4 (b) The measured Re[YGB] of M1( 3.6µm× ), M2( 7.24 µm× ), and 4 M3(12µm× ) devices, which are biased at VG=VD=VS=VB=0. 4

Frequency (GHz)

0 5 10 15 20

Capatance (fF)

5 10 15 20 25

C_GSO of M1 C_GDO of M1 C_GSO of M2 C_GDO of M2 C_GSO of M3 C_GDO of M3

Fig.4.11 The extracted CGSO and CGDO of M1( 3.6µm× ), M2( 7.24 µm× ), and 4 M3(12µm× ) devices, which are biased at VG=VD=VS=VB=0. 4

M1:3.6µmX4 M2:7.2µmX4 M3:12 µmX4

Frequency (GHz)

0 5 10 15 20

Capatance (fF)

0 10 20 30 40

-Im[Y_SB]/ω of M1 -Im[Y_DB]/ω of M1 -Im[Y_GB]/ω of M1 -Im[Y_SB]/ω of M2 -Im[Y_DB]/ω of M2 -Im[Y_GB]/ω of M2 -Im[Y_SB]/ω of M3 -Im[Y_DB]/ω of M3 -Im[Y_GB]/ω of M3

Fig.4.12 -Im[Y_SB]/ω of M1(3.6µm× ), M2( 7.24 µm× ), and M3(124 µm× ) devices, 4 which are biased at VG=VD=VS=VB=0.

Frequency (GHz)

4 6 8 10 12 14 16 18 20

Capatance (fF)

0 5 20 30 40

50 C_SBO of M1

C_SBE of M1 C_SBO of M2 C_SBE of M2 C_SBO of M3 C_SBE of M3 M1:3.6µmX4

M2:7.2µmX4 M3:12 µmX4

Fig.4.13 The extracted CSBO and CSBE of M1( 3.6µm× ), M2( 7.24 µm× ), and 4 M3(12µm× ) devices, which are biased at VG=VD=VS=VB=0. 4

Frequency (GHz)

4 6 8 10 12 14 16 18 20

Capacitance (fF)

0 1 2 3 10 20 30 40

C_DBO of M1 C_DBE of M1 C_DBO of M2 C_DBE of M2 C_DBO of M3 C_DBE of M3 M1:3.6µmX4

M2:7.2µmX4 M3:12 µmX4

Fig.4.14 The extracted CDBO and CDBE of M1( 3.6µm× ), M2( 7.24 µm× ), and 4 M3(12µm× ) devices, which are biased at VG=VD=VS=VB=0. 4

Frequency (GHz)

4 6 8 10 12 14 16 18 20

Capacitance (fF)

0.0 0.5 1.0 2.0 4.0 6.0 8.0

10.0 C_GBO of M1

C_GBE of M1 C_GBO of M2 C_GBE of M2 C_GBO of M3 C_GBE of M3 M1:3.6µmX4

M2:7.2µmX4 M3:12 µmX4

Fig.4.15 The extracted CGBO and CGBE of M1( 3.6µm× ), M2( 7.24 µm× ), and 4 M3(12µm× ) devices, which are biased at VG=VD=VS=VB=0. 4

Frequency (GHz)

4 6 8 10 12 14 16 18 20

Resistance (Ω)

400 600 800 1000 2000 3000 4000

R_SB of M1 R_DB of M1 R_SB of M2 R_DB of M2 R_SB of M3 R_DB of M3 M1:3.6µmX4

M2:7.2µmX4 M3:12 µmX4

Fig.4.16 The extracted RSB and RDB of M1( 3.6µm× ), M2( 7.24 µm× ), and 4 M3(12µm× ) devices, which are biased at VG=VD=VS=VB=0. 4

Frequency (GHz)

4 6 8 10 12 14 16 18 20

Resistance (Ω)

0 2000 4000 6000 8000 10000

R_GB of M1 R_GB of M2 R_GB of M3

Fig.4.17 The extracted RGB of M1( 3.6µm× ), M2( 7.24 µm× ), and M3(124 µm× ) 4 devices, which are biased at VG=VD=VS=VB=0.

Frequency (GHz)

8 10 12 14 16 18

Resistance (Ω)

0 200 400 600 800 1000 1200 1400 1600 1800

R_DSB of M1 R_DSB of M2 R_DSB of M3

Fig.4.18 The extracted RSDB of M1( 3.6µm× ), M2( 7.24 µm× ), and M3(124 µm× ) 4 devices, which are biased at VG=VD=VS=VB=0.

Frequency (GHz)

Frequency (GHz)

0 5 10 15 20

Capacitance (fF)

10 20 30 40

VG=0.2V VG=0.4V VG=0.6V VG=0.8V VG=1.0V VG=1.2V

C_GS of M3

V_D=0,V_S=0,V_B=0V

(c)

Fig.4.19 (a) The extracted CGS of M1( 3.6µm× ) biased at different V4 G. (b) The extracted CGS of M2( 7.2µm× ) biased at different V4 G. (c) The extracted CGS of M3(12µm× ) biased at different V4 G.

Frequency (GHz)

Frequency (GHz)

0 5 10 15 20

Capacitance (fF)

5 10 15 20 25 30 35

VG=0.2V VG=0.4V VG=0.6V VG=0.8V VG=1.0V VG=1.2V

C_GD of M3

V_D=0,V_S=0,V_B=0V

(c)

Fig.4.20 (a) The extracted CGD of M1( 3.6µm× ) biased at different V4 G. (b) The extracted CGD of M2( 7.2µm× ) biased at different V4 G. (c) The extracted CGD of M3(12µm× ) biased at different V4 G.

Frequency (GHz)

Frequency (GHz)

0 5 10 15 20

Capacitance (fF)

1 2 3 4 5 6

VG=0.2V VG=0.4V VG=0.6V VG=0.8V VG=1.0V VG=1.2V

-Im[Y_GB]/ω of M3 V_D=0,V_S=0,V_B=0V

(c)

Fig.4.21 (a) The extracted –Im[Y_GB]/ω of M1(3.6µm× ) biased at different V4 G. (b) The extracted –Im[Y_GB]/ω of M2( 7.2µm× ) biased at different V4 G. (c) The extracted –Im[Y_GB]/ω of M3(12µm× ) biased at different V4 G.

Frequency (GHz)

Frequency (GHz)

0 5 10 15 20

Resistance (Ω)

10 15 20 25 30 35 40

VG=0.4V VG=0.6V VG=0.8V VG=1.0V VG=1.2V

RG of M3 V_D=V_S=V_B=0V

(c)

Fig.4.22 (a) The extracted RG of M1( 3.6µm× ) biased at different V4 G. (b) The extracted RG of M2( 7.2µm× ) biased at different V4 G. (c) The extracted RG of M3(12µm× ) biased at different V4 G.

Frequency (GHz)

0 5 10 15 20

Resistance (Ω)

20 40 60 80 100 120

VG=0.6V VG=0.8V VG=1.0V VG=1.2V

R_G+R_S+R_D of M1 V_D=0,V_S=0,V_B=0V

(a)

Frequency (GHz)

0 5 10 15 20

Resistance (Ω)

10 20 30 40 50 60

VG=0.6V VG=0.8V VG=1.0V VG=1.2V

R_G+R_S+R_D of M2 V_D=0,V_S=0,V_B=0V

Frequency (GHz)

Inverse of Effective Gate Drive (V_G-V_TH)^-1

0 1 2 3 4 5 6 7

Fig.4.23 (a) The extracted RCH+RS+RD of M1( 3.6µm× ) biased at different V4 G. (b) The extracted RCH+RS+RD of M2( 7.2µm× ) biased at different V4 G. (c) The extracted RCH+RS+RD of M3(12µm× ) biased at different V4 G. (d) RCH+RS+RD versus

(

VG⁻VTH

)

⁻¹ of M1( 3.6µm× ), M2( 7.24 µm× ), 4 and M3(12µm× ). 4

Frequency (GHz)

Frequency (GHz)

4 6 8 10 12 14 16 18

Capacitance (fF)

0 10 20 30 40

VG=0.2V VG=0.4V VG=0.6V VG=0.8V VG=1.0V VG=1.2V

C_SB of M3

V_D=0,V_S=0,V_B=0V

(c)

Fig.4.24 (a) The extracted CSB of M1( 3.6µm× ) biased at different V4 G. (b) The extracted CSB of M2( 7.2µm× ) biased at different V4 G. (c) The extracted CSB of M3(12µm× ) biased at different V4 G.

Frequency (GHz)

Frequency (GHz)

4 6 8 10 12 14 16 18

Capacitance (fF)

0 2 4 6 8 10 12 14 16 18

VG=0.2V VG=0.4V VG=0.6V VG=0.8V VG=1.0V VG=1.2V

C_SBE of M3

V_D=0,V_S=0,V_B=0V

(c)

Fig.4.25 (a) The extracted CSBE of M1( 3.6µm× ) biased at different V4 G. (b) The extracted CSBE of M2( 7.2µm× ) biased at different V4 G. (c) The extracted CSBE of M3(12µm× ) biased at different V4 G.

Frequency (GHz)

Frequency (GHz)

4 6 8 10 12 14 16 18

Capacitance (fF)

0 10 20 30 40

VG=0.2V VG=0.4V VG=0.6V VG=0.8V VG=1.0V VG=1.2V

C_DB of M3

V_D=0,V_S=0,V_B=0V

(c)

Fig.4.26 (a) The extracted CDB of M1( 3.6µm× ) biased at different V4 G. (b) The extracted CDB of M2( 7.2µm× ) biased at different V4 G. (c) The extracted CDB of M3(12µm× ) biased at different V4 G.

Frequency (GHz)

Frequency (GHz)

4 6 8 10 12 14 16 18

Capacitance (fF)

0 2 4 6 8 10 12

14 VG=0.2V

VG=0.4V VG=0.6V VG=0.8V VG=1.0V VG=1.2V

C_DBE of M3

V_D=0,V_S=0,V_B=0V

(c)

Fig.4.27 (a) The extracted CSBE of M1( 3.6µm× ) biased at different V4 G. (b) The extracted CSBE of M2( 7.2µm× ) biased at different V4 G. (c) The extracted CSBE of M3(12µm× ) biased at different V4 G.

Frequency (GHz)

Frequency (GHz)

4 6 8 10 12 14 16 18

Capacitance (fF)

0 2 4 6 8

VG=0.2V VG=0.4V VG=0.6V VG=0.8V VG=1.0V VG=1.2V

C_GB of M3

V_D=0,V_S=0,V_B=0V

(c)

Fig.4.28 (a) The extracted CGB of M1( 3.6µm× ) biased at different V4 G. (b) The extracted CGB of M2( 7.2µm× ) biased at different V4 G. (c) The extracted CGB of M3(12µm× ) biased at different V4 G.

Frequency (GHz)

4 6 8 10 12 14 16 18

Capacitance (fF)

0 1 2

VG=0.2V VG=0.4V VG=0.6V VG=0.8V VG=1.0V VG=1.2V

C_GBE of M1

V_D=0,V_S=0,V_B=0V

(a)

Frequency (GHz)

4 6 8 10 12 14 16 18

Capacitance (fF)

0 1 2

VG=0.2V VG=0.4V VG=0.6V VG=0.8V VG=1.0V VG=1.2V

C_GBE of M2

V_D=0,V_S=0,V_B=0V

(b)

Frequency (GHz)

4 6 8 10 12 14 16 18

Capacitance (fF)

0 1 2

VG=0.2V VG=0.4V VG=0.6V VG=0.8V VG=1.0V VG=1.2V

C_GBE of M3

V_D=0,V_S=0,V_B=0V

(c)

Fig.4.29 (a) The extracted CGBE of M1( 3.6µm× ) biased at different V4 G. (b) The extracted CGBE of M2( 7.2µm× ) biased at different V4 G. (c) The extracted CGBE of M3(12µm× ) biased at different V4 G.

Frequency (GHz)

Frequency (GHz)

4 6 8 10 12 14 16 18

Resistance (Ω)

0 200 400 600 800 1000

VG=0.2V VG=0.4V VG=0.6V VG=0.8V VG=1.0V VG=1.2V

R_SB of M3

V_D=0,V_S=0,V_B=0V

(c)

Fig.4.30 (a) The extracted RSB of M1( 3.6µm× ) biased at different V4 G. (b) The extracted RSB of M2( 7.2µm× ) biased at different V4 G. (c) The extracted RSB of M3(12µm× ) biased at different V4 G.

Frequency (GHz)

Frequency (GHz)

4 6 8 10 12 14 16 18

Resistance (Ω)

0 200 400 600 800 1000 1200 1400 1600 1800

VG=0.2V VG=0.4V VG=0.6V VG=0.8V VG=1.0V VG=1.2V

R_DB of M3

V_D=0,V_S=0,V_B=0V

(c)

Fig.4.31 (a) The extracted RDB of M1( 3.6µm× ) biased at different V4 G. (b) The extracted RDB of M2( 7.2µm× ) biased at different V4 G. (c) The extracted RDB of M3(12µm× ) biased at different V4 G.

Frequency (GHz)

Frequency (GHz)

0 5 10 15 20

Capacitance (fF)

10 15 20 25 30 35 40 45

C_GS of M3@V_G=V_D=0.8V C_GD of M3@V_G=V_D=0.8V C_GS of M3@V_G=V_D=1.0V C_GD of M3@V_G=V_D=1.0V C_GS of M3@V_G=V_D=1.2V C_GD of M3@V_G=V_D=1.2V

(c)

Fig.4.32 (a) The extracted CGS and CGD of saturation M1( 3.6µm× ). 4 (b) The extracted CGS and CGD of saturation M2( 7.2µm× ).. 4 (c) The extracted CGS and CGD of saturation M3(12µm× ). 4

Frequency (GHz)

Frequency (GHz)

0 5 10 15 20

Transconductance (S)

0.0030 0.0040 0.0050 0.0060 0.0280 0.0320 0.0360 0.0400

g_m of M3@V_G=V_D=0.8V g_mb of M3@V_G=V_D=0.8V g_m of M3@V_G=V_D=1.0V g_mb of M3@V_G=V_D=1.0V g_m of M3@V_G=V_D=1.2V g_mb of M3@V_G=V_D=1.2V

(c)

Fig.4.33 (a) The extracted gm and gmb of saturation M1( 3.6µm× ). 4 (b) The extracted gm and gmb of saturation M2( 7.2µm× ). 4 (c) The extracted gm and gmb of saturation M3(12µm× ). 4

Frequency (GHz)

Frequency (GHz)

0 5 10 15 20

Transcapacitance (fF)

0 10 20 30 40

C_m of M3@V_G=V_D=0.8V C_mb of M3@V_G=V_D=0.8V C_m of M3@V_G=V_D=1.0V C_mb of M3@V_G=V_D=1.0V C_m of M3@V_G=V_D=1.2V C_mb of M3@V_G=V_D=1.2V

(C)

Fig.4.34 (a) The extracted Cm and Cmb of saturation M1( 3.6µm× ). 4 (b) The extracted Cm and Cmb of saturation M2( 7.2µm× ). 4 (c) The extracted Cm and Cmb of saturation M3(12µm× ). 4

Frequency (GHz)

0 5 10 15 20

Resistance (Ω)

10 20 30 40 50 60

VG=VD=0.8V VG=VD=1.0V VG=VD=1.2V

RG of M1 V_S=V_B=0V

(a)

Frequency (GHz)

0 5 10 15 20

Resistance (Ω)

10 20 30 40 50

VG=VD=0.8V VG=VD=1.0V VG=VD=1.2V

RG of M2 V_S=V_B=0V

(b)

Frequency (GHz)

0 5 10 15 20

Resistance (Ω)

10 20 30 40 50 60

VG=VD=0.8V VG=VD=1.0V VG=VD=1.2V

RG of M3 V_S=V_B=0V

(c)

Fig.4.35 (a) The extracted RG of saturation M1( 3.6µm× ). 4 (b) The extracted RG of saturation M2( 7.2µm× ). 4 (c) The extracted RG of saturation M3(12µm× ). 4

Frequency (GHz)

Frequency (GHz)

4 6 8 10 12 14 16 18

Capacitance (fF)

10 15 20 25 30 35 40

C_SB of M3@V_G=V_D=0.8V C_DB of M3@V_G=V_D=0.8V C_SB of M3@V_G=V_D=1.0V C_DB of M3@V_G=V_D=1.0V C_SB of M3@V_G=V_D=1.2V C_DB of M3@V_G=V_D=1.2V

(c)

Fig.4.36 (a) The extracted CSB and CDB of saturation M1( 3.6µm× ). 4 (b) The extracted CSB and CDB of saturation M2( 7.2µm× ). 4 (c) The extracted CSB and CDB of saturation M3(12µm× ). 4

Frequency (fF)

Frequency (fF)

4 6 8 10 12 14 16 18

Resistance (Ω)

0 500 1000 1500 2000

R_SB of M3@V_G=V_D=0.8V R_DB of M3@V_G=V_D=0.8V R_SB of M3@V_G=V_D=1.0V R_DB of M3@V_G=V_D=1.0V R_SB of M3@V_G=V_D=1.2V R_DB of M3@V_G=V_D=1.2V

(c)

Fig.4.37 (a) The extracted RSB and RDB of saturation M1( 3.6µm× ). 4 (b) The extracted RSB and RDB of saturation M2( 7.2µm× ). 4 (c) The extracted RSB and RDB of saturation M3(12µm× ). 4

Chapter 5

Verification of Small-Signal Equivalent Circuit Model

5.1 Motivation

Modeling a RF MOSFET by a small-signal equivalent circuit is an exceptional way not only to design analog circuits but also help to well understand the high-frequency characteristics of the device. After the establishing of the equivalent circuit and the extraction of the model parameters, the small-signal equivalent circuit model has to be proven it’s accurate and robust.

One convenient way to verify the model is to compare the output characteristics of the model with the measurement data. In last chapter, the components in the proposed equivalent circuits for saturation RF MOSFET,s shown in Fig.4-2 have been extracted, it will be verified in this chapter.

5.2 Simulation of the Equivalent Circuits

To obtain the output characteristics of a circuit, one needs a simulator, which can input the circuit in text or graphic form includes the information such as nodes, resistors, inductors, capacitors, and dependent or independent current/voltage sources. The simulator will compute the electrical behavior of the circuit according to basic electrical laws. The most well-known circuit simulator is the SPICE program developed by university of California, Berkeley. In this study, commercial software named Advanced Design System (ADS) presented by Agilent Technologies is used for the simulation of the equivalent circuit. The equivalent circuit can be input to the simulator in the form of electrical circuit diagram by a graphical input interface, than the simulator can output the simulated results in form of network parameters such as Y-,

Z-, or S-parameters. The y-parameters were chosen for the output form since the components in the equivalent circuits are all extracted from the y-parameters of the devices.

Three set of the components for the equivalent circuits extracted from three devices with different dimensions are used. The bias condition is set at V_G=V_D=1.0V. The values of the components are shown in table 5.1a, 5.1b, and 5.1c. In these tables, the value of each component was selected approximately from the figures shown in previous chapter. Some extracted values have large deviation in figure, however, its found that these values are not sensitive to the simulation results. That is also the reason why their extracted values have certain deviation. Choosing an approximate value usually gives fair well simulation results.

Some values were fine tuned in the range during the deviation of the extracted values to obtain better results. The simulation frequency range is from 100MHz to 20GHz.

5.3 Results and Discussions

The simulated and measured four-port y-parameters of each device are shown in real parts and imaginary parts individually from 100MHz to 20GHz. Figure 5.1a and 5.1b show the simulated and measured results of Y_GG. It can be observed the simulated imaginary parts of YGG agreed with the measured counterparts very well during the entire frequency range. The imaginary part of Y_GG is mainly determined by C_GS, C_GD and C_GBE. The results of real parts show slight difference between simulated and measured data in Fig. 5.1b. Since the amplitude of Re[Y_GG] are rather small, this deviations are still acceptable. The real part of Y_GG is a complex result determined by RG, RS, RD, CGS, CGD, and CGBE.

Figure 5.2a and 5.2b show the modeling results for Y_DD of the three devices. Y_DD is an important output admittance for a RF MOSFET, since MOSFET’s are usually arranged in

RS, and RD. As frequencies increases, the amplitude of YDD will rise due to the output signal at drain terminal couples to the substrate via the reverse-biased drain/bulk junction. Therefore, at higher frequencies, the CDB, CGS, RD, RCH, RS, RDB, RSB, and RDSB all have contribution to Y_DD.

The measured and simulated input admittances of the source terminals of the three devices are shown in Fig.5.3a and 5.3b. The imaginary part of Y_SS will be influenced by R_G, C_GS, C_SB, g_m, gmb and transcapcitance Cm, Cmb, Cmx. However, the Cmx has not been extracted from the measurement data, since the difference between C_GB and C_BG are very small and irregular. It’s hardly to tell the Cmx from the measurement error. It’s also found that the input admittance at source become more inductive as the device dimension increases, which is believed due to the larger RG, Cm, and Cmb of the larger device. The real part of the YSS is dominated by gm and g_mb of the device.

Figure 5.4a shows distinguish difference between the simulated and measured Im[YBB], this probably caused by the over de-embedding of the parasitics of the substrate pad. The shunt capacitance between substrate pad and ground is over de-embedded. However, the input admittance at the body terminal is the last thing one would care, since the body terminal of a MOSFET is always ac grounded.

Figure 5.5a shows the measured and simulated Im[Y_GD]’s, which are mainly caused by the CGDO of these devices. The Im[YGD] is primarily determined by CGDO. Figure 5.5b shows the modeling results of Re[Y_GD], which are mainly determined by C_GDO, R_G, and R_D.

The YGS of the three devices, which mainly caused by CGS and series RG, RS are shown in Fig.5.6a and 5.6b. They are obviously modeled well.

Figure 5.7a and 5.7b show the YGB of the three devices. The amplitudes of YGB including imaginary and real part are very close to the Y_BG‘s show in Fig. 5.8a and 5.8b, except for the case of M3. The YBG of M3 under VG=VD=1V bias condition exhibit irregular behavior, however, its amplitude is very small and has no effect on the entire device behavior.

Figure 5.9a and 5.9b show the measured and simulated YBD’s of the devices. The modeling results are also fair well. Y_BD is mainly caused by C_DB and R_DB. It is also the main contributor to the output admittance of drain terminal at high frequency range.

Figure 5.10a and 5.10b demonstrate the simulation results of the Y_BS’s, which are mainly caused by CSB and RSB. YBS can be used as an evaluation for the accuracy of extracted CSB

and R_SB. Poor extracted values of C_SB and R_SB will worse the modeling of entire substrate network, since the intrinsic body terminal is located between the CSB and RSB.

The simulated and measured Y_DG’s are shown in Fig. 5.11a and 5.11b. The imaginary part of YDG is caused by RG, CGS, CGD, gm, and Cm, and represents the signal delay from gate to drain terminal. The real part of Y_DG is very close to, however, slight smaller than the transconductance, gm.

Figure 5.12a and 5.12b illustrate the modeling results of Y_DB’s, which are the main parameter to evaluate the substrate transconductance gmb. The imaginary part of YDB is similar the imaginary part of Y_DG that it also influence by transcapacitance. During the simulation process, it is found that the Im[YDG] will be influenced by CSB, RSB, gm, gmb and Cmb, the simulation results will be exact only if these components are extracted correctly. The Re[Y_DB] is close related to gmb. In fact, the Re[YDB] at very low frequency range is equal to gmb, since at lower frequency, v_BS will approach to v_Bsi. As frequency increases, the v_BSi will decrease due to the decreasing of the impedance of CSB. Therefore the Re[YDB] decreases as frequency increases. Similarly, the Re[Y_DB] will be modeled well only if the values of g_mb, C_SB, and R_SB are extracted exactly.

Figure 5.13a and 5.13b show the modeling results of Y_DS’s. Y_DS corresponds to the trans-admittance of a two-port common gate device. It is observed that the Im[YDS] shows inductive property, as had mentioned, it is contributed by the transcapacitance C_m and C_mb. The Re[YDS] is dominated by gm and gmb.

in spite of CGS exists between gate and source. This inductive component is induced by RG, C_GS, and g_m, it is also a contributor to the inductive input impedance at source terminal. The Re[YSG] is also dominated by gm of the device and approximately equals to the amplitude of Re[Y_DG].

Figure 5.15a shows the imaginary part of YSB, in which a “bending” is observed. Similar with the effect of R_G, C_GS, g_m act on Y_SG, the R_SB, C_SB, g_mb make Y_SB “inductive”. However, the value of gmb is much smaller than gm, and the vBSi decreases as frequency decreases. The

“inductive” components produced by g_mb will decrease to a level, which will less than the original capacitance value of CSB. Therefore, the YSB “bends” beneath the x-axis.

Figure 5.16a and 5.16b show the measured and simulated Y_SD’s of the devices. The Y_SD is another contributor to the output admittance at drain, which is mainly cause by the channel resistance 1/g_DS.

5.4 Summary

The simulated y-parameters of the equivalent circuit for saturation devices are demonstrated and compared with the measurement data of the devices. Most of the measured and simulated y-parameters are agreed with each other. Phenomena arisen from each component in the equivalent circuit of an active RF MOSFET are observed and analyzed. The RF small-signal behaviors of the four-terminal RF MOSFET are modeled pretty well.

M1: VG=1V, VD=1V

g_m(mS) C_m(fF) g_mb(mS) C_mb(fF) g_ds(S) RS(Ω) RD(Ω) RG(Ω) CGS(fF) 11.8 4.4 1.33 2 1/840 6.9 6.9 35 13.5 CGD(fF) CSB(fF) CSBE(fF) RSB(Ω) CDB(fF) CDBE(fF) RDB(Ω) CGBE(fF) RDSB(Ω)

5.8 7.2 3 1500 3.5 1.5 3000 0.6 1300 (a)

M2: VG=1V, VD=1V

gm(mS) Cm(fF) gmb(mS) Cmb(fF) gds(S) R_S(Ω) R_D(Ω) R_G(Ω) CGS(fF) 23.3 14 2.64 4 1/423 3.6 3.6 23 25.6 C_GD(fF) C_SB(fF) C_SBE(fF) RSB(Ω) CDB(fF) C_DBE(fF) RDB(Ω) CGBE(fF) RDSB(Ω)

10.2 14.5 4.5 800 7.2 2 1500 0.9 700 (b)

M3: VG=1V, VD=1V

g_m(mS) C_m(fF) g_mb(mS) C_mb(fF) g_ds(S) RS(Ω) RD(Ω) RG(Ω) CGS(fF) 38.3 27 4.15 5 1/242 2.5 2.5 40 42.5 CGD(fF) CSB(fF) CSBE(fF) RSB(Ω) CDB(fF) CDBE(fF) RDB(Ω) CGBE(fF) RDSB(Ω)

16 30 6 400 13 2.5 800 1 400 (c)

Table 5.1 (a) The extracted values of the components for the small-signal equivalent circuit model of M1 devices (3.6µm× ). 4

(b) The extracted values of the components for the small-signal equivalent circuit model of M2 devices ( 7.2µm× ). 4

(c) The extracted values of the components for the small-signal equivalent circuit model of M3 devices (12µm× ). 4

0 5 10 15 20 FREQUENCY (GHz)

0 0.002 0.004 0.006 0.008

Im[YGG] (S)

Measured Im[Y_GG] of M1, M2, and M3 Simulated Im[Y_GG] of M1 Simulated Im[Y_GG] of M2 Simulated Im[Y_GG] of M3

(a)

0 5 10 15 20

FREQUENCY (GHz) 0

0.0005 0.001 0.0015 0.002 0.0025

Re[YGG] (S)

Measured ReY_GG] of M1, M2, and M3 Simulated Re[Y_GG] of M1

Simulated Re[Y_GG] of M2 Simulated Re[Y_GG] of M3

(b)

Fig.5.1 (a) Measured and simulated Im[YGG] of M1, M2, and M3 biased VG=VD=1V.

(b) Measured and simulated Re[YGG] of M1, M2, and M3 biased VG=VD=1V.

0 5 10 15 20 FREQUENCY (GHz)

0 0.002 0.004 0.006 0.008

Im[YDD] (S)

Measured Im[Y_DD] of M1, M2, and M3 Simulated Im[Y_DD] of M1

Simulated Im[Y_DD] of M2 Simulated Im[Y_DD] of M3

(a)

0 5 10 15 20

FREQUENCY (GHz) 0

0.002 0.004 0.006 0.008

Re[YDD] (S)

Measured Re[Y_DD] of M1, M2, and M3 Simulated Re[Y_DD] of M1

Simulated Re[Y_DD] of M2 Simulated Re[Y_DD] of M3

(b)

Fig.5.2 (a) Measured and simulated Im[YDD] of M1, M2, and M3 biased VG=VD=1V.

0 5 10 15 20 FREQUENCY (GHz)

-0.006 -0.004 -0.002 0 0.002

Im[YSS] (S)

Simulated Im[Y_SS] of M1 Simulated Im[Y_SS] of M2 Simulated Im[Y_SS] of M3

Measured Im[Y_SS] of M1, M2, and M3

(a)

0 5 10 15 20

FREQUENCY (GHz) 0

0.02 0.04 0.06 0.08

Re[YSS] (S)

Simulated Re[Y_SS] of M1 Simulated Re[Y_SS] of M2

Simulated Re[Y_SS] of M1 Simulated Re[Y_SS] of M2

在文檔中 以四埠散射參數量測射頻金氧半電晶體特性並製作其高頻等效電路模型 (頁 93-0)