Fundamental Electrical Characteristics

First of all, our goal is to investigate the effect of thermal budget associated with

the SiN deposition. So, for the placebo split, we deliberately added an additional

thermal treatment step in N2 with an identical temperature and treatment time as those

used in the SiN deposition (i.e., at 780℃ ambient for 3 hours) before the TEOS

passivation layer deposition. Samples which were skipped both the SiN deposition and

the thermal N2 annealing steps were also fabricated for comparison, denoted as the REF

(reference) split. Fig.3.1 shows the effect of such placebo thermal treatment on the

capacitance-voltage(C-V) characteristics of devices without SiN capping. In this figure,

the device with the additional thermal budget (placebo split) shows apparent

poly-depletion effect. We believe this is caused by the temperature-dependent solid

solubility of dopants in poly gates [37], as shown in Fig. 3.2. In other words, the

original solid solubility (approaching the equilibrium value at 900℃, which is caused

by the rapid thermal anneal (RTA) step) is lowered by the furnace SiN deposition step

due to the additional thermal budget. The placebo split shows larger threshold voltage

due to the reduction of fixed charge in gate oxide. The C-V characteristics of

MOSFETS are also important in verifying the oxide quality and the equivalent oxide

thickness (EOT). Fig. 3.3 exhibits C-V characteristics of NMOSFETs for all splits (i.e.

placebo (thermal budget), SiN, TEOS/SiN, POLY/SiN). The curves of four splits are

basically identical. It gives an equal ground to compare the performance of all splits. So

the split with placebo thermal budget (i.e., the placebo split) serves the role of the

control split, and will also be called the control split interchangeably. Fig. 3.4 shows

cumulative probability distributions of the sheet resistance of the poly gate for all splits.

The REF (i.e., W/O thermal budget) split has lower sheet resistance values, while the

other four splits exhibit almost same distribution of sheet resistance. This demonstrates

that the additional thermal treatment step used in the SiN deposition indeed results in

worse poly-depletion effect.

The Id-Vg characteristic of the split conditions are shown in Fig. 3.5. From the

figure, there is no obvious difference in the transconductance (Gm) among all samples

except the placebo split, clearly revealing the enhancement of transconductance by the

strained technology. The off-state leakage current and the subthreshold slope show no

distinguishable difference in Fig. 3.5, indicating that the devices with strained channel

do not show major influence on the fundamental properties. Fig. 3.6 depicts the

subthreshold swing for all splits, and the results indicate that the values are confined in

a narrow range between 74~75 mV/decade. The output characteristics of all splits are

shown in Fig. 3.7. It is seen that the insertion of the buffer layer prior to SiN deposition

(i.e., TEOS/SiN, POLY/SiN) does not degrade the current enhancement. Consistent with

previous literature report [38], the NMOS drive current can be enhanced by a thicker

SiN etch-stop layer which is tensile in nature.

Fig. 3.8 shows the percentage increase of the transconductance among different

splits relative to the placebo devices (i.e., w/o SiN capping). The transconductance

enhancement reaches about 29% and 33% at a channel length of 0.5µm and 0.4µm,

respectively. We can see that when the channel length decreases, the strain effect

enhances. In other words, the strain is distributed locally inside the channel and

concentrated near the source and drain. As a result, the transconductance enhancement

becomes more prominent with decreasing channel length. This is explained by the

splitting of the degeneracy at the conduction band edges under uniaxial strain [24] as

mentioned above. Fig. 3.9 exhibits the percentage increase of the saturation current for

the split samples relative to the placebo devices (i.e., w/o SiN capping). From Fig. 3.9,

it can be seen that similar trend to that shown in Fig. 3.8 is observed.

Fig. 3.10 shows the results of charge pumping measurement for some splits (i.e.,

placebo (thermal budget), REF, and SiN). First, we focus on the impact of thermal

budget associated with the SiN deposition. From the figure, we find that a large amount

of interface states is generated during SiN capping process as compared with the

samples without the capping layer, implying that the channel strain indeed causes the

increase of interface states at the Si/SiO2 interface. Nevertheless, it is well known that

hydrogen species can effectively passivate the dangling bonds at the Si/SiO2 interface.

For the LPCVD system used for SiN deposition in this study, SiH2Cl2 and NH3 were

employed as the reaction precursors, so the reaction chamber would be filled with

hydrogen species during the deposition process. The hydrogen species would in turn

passivate the interface trap states at the Si/SiO2 interface. Although this factor should

not be ignored, in this figure such effect obviously is masked by the channel strain. In

other words, the number of interface states passivated by the hydrogen species is much

less than that generated by the channel strain.

On the other hand, the figure also proves that the annealing performed in N2 tends

to reduce the interface states density, indicating this factor (thermal budget of the

deposition) alone is beneficial for improving the interface properties. From Fig. 3.10,

impacts of the three factors, namely, channel, incorporated hydrogen species, and the

thermal budget, on interface state density are identified.

Comparisons of charge pumping current between the strain and placebo samples

are shown in Fig. 3.11. The placebo sample exhibits the lowest charge pumping current

among all splits, while the device with TEOS buffer layer exhibits the highest. The

curve of the device with POLY/SiN is slightly higher than that with SiN, but less than

that with TEOS buffer layer. The results indicate that the TEOS buffer layer can

effectively block the diffusion of hydrogen into the channel region, while such barrier

effect seems to be reduced for the POLY buffer layer. It has been pointed out previously

that the poly-silicon is a diffusion barrier of the hydrogen [39]. But it should be noted

that, the precursor gas (SiH4) for deposition is also H-containing. Before the SiN

deposition, the abundant hydrogen species may have spread to the Si/SiO2 interface to

passivate the interface states. In summary, TEOS buffer layer has been shown to be

more effective in blocking the hydrogen diffusion into the Si/SiO2 interface.