Chapter 2 The Principal Concepts of Designing Low Noise
2.3 The Principal Concepts of Mixer
2.3.2 Sub-harmonic Mixer
There are three approaches to design sub-harmonic mixer. The first approach is based on a basic trigonometric equation
sin(2ω)=2sin(ω)cos(ω) (2.39) Above equation basically shows that, if the LO signal is phase-shifted by 90° and then multiplied by the original LO, twice the frequency of the LO is produced. This is exactly the property needed in a SHM. It is easily implemented by stacking another switching stage in the mixer. The non-balanced and single-balanced implementations of such a SHM are shown in Fig. 2.14 and Fig. 2.15. For the non-balanced SHM, an RC network is used to create the 90° phase shift. It is then used to drive the two switching stages of the mixer. For the single-balanced SHM, a polyphase network is used to generate the 0° and 180°, 90° and 270°
signal pairs. The double-balanced version is obtained by simply cross coupling two single-balanced SHMs.
Fig. 2.14 Single-ended stacked sub-harmonic mixer.
Fig. 2.15 Single-balanced stacked sub-harmonic mixer.
The second generalized approach is based on yet another simple equation
f ( x ) = x
(2.40)Fig. 2.16 Single-balanced sub-harmonic mixer.
Chapter 3 The Implementation of 4GHz to 20GHz Designing Low Noise Amplifier and Mixer
A 4HGz to 20GHz wide-band low noise amplifier is designed in Simultaneous Noise and Input Matching Technique, and fabricated in TSMC 0.18μm CMOS technology.
3.1 Induction
With much more demands on the transmission of data, voice, and video, it is urgent that the intended frequency range for the LNA needs to become wider. However, most published papers only specify the mechanism of one-pole matching for LNA. One-pole matching is difficult to achieve wide-band matching.
In this project, we would like to design an ultra-wide band low noise amplifier, which is implemented based on UMC 0.18 um CMOS technology. The frequency range of operation is from 4 to 20 GHz, and under this range the input reflection coefficient must be under -10 dB and power gain must be large than 20 dB. This design utilizes common SNIM technique, which can simultaneously achieve noise and input matching.
Besides, capacitor feedback technique is also applied in the design for realizing ultra-wide band requirement.
3.2 Principle of Circuit Design
This project is achieved on Angilent ADS. Fig. 3.1 is the input stage of wide-band low noise amplifier. Transmission lines, TL22 and TL23, are utilized to emulate the effects of inductors. Each μm transmission line has around the effect of around 1pH inductance. Basically, the structure is utilized the SNIM technique plus capacitor parallel-feedback technique.
While the circuit operates at high-frequency, C20 can be considered as short circuit. The input impedance of the circuit consists of C20、T23、
T24、R1 and the input impedance of next stage, and the 50Ω input impedance can be achieved.
Fig. 3.1 The input stage of wide-band low noise amplifier.
While the circuit operates at high-frequency, owing to millier effect on C20, there is an equivalent capacitor at the gate of transistor M1. It parallel with the input capacitor of M1 Cgs, and make input match at lower frequency. Though resistors will increase noise figure, R1 doesn’t contribute noise much. That is because it is located at the output of first stage, and the gain of first stage is not very lower. Besides, R1 is essential for increasing the stability of circuit.
Fig. 3.2 The second stage of wide-band low noise amplifier.
Fig. 3.2 is the second stage of this project. Again, it is also a common-mode source amplifier. Its gain is around 10dB.
Fig. 3.3 The third stage of wide-band low noise amplifier.
Fig. 3.3 is the third stage of this project. Again, it is also a common-mode source amplifier, too. Its gain is also around 10dB.
Fig. 3.4 The last stage of wide-band low noise amplifier.
Fig. 3.4 is the last stage of this project. Similarly, it is also a common-mode source amplifier. Its gain is also around 5dB. The output impedance matching is achieved by LC networks.
3.3 The Simulated Results
Fig. 3.5 The simulated DC characters of single transistor
Fig. 3.5 are the simulated DC characters of single transistor, while Vg is 0.8V voltages, Vdd is 1.5V voltage, and Id1 is around 10.5mA
5 10 15 20 25 30 35
Fig. 3.6 The simulated S-parameters of wide-band low noise amplifier
m1freq=
Fig. 3.7 The simulated input reflection coefficient (S11) on Smith chart of wide-band low noise amplifier
Fig. 3.6 and Fig. 3.7 are the simulated results on Angilent ADS. The power gain on intended frequency range is up to 22dB, reflection coefficient at input terminal is lower than -10dB, and the noise
temperature is lower than 600 degrees centigrade.
Fig. 3.8 The simulated stability factor of wide-band low noise amplifier
Fig. 3.8 is the simulated stability factor. Obviously, the circuit is stable on intended frequency range.
3.4 Expected Specifications
Parameters Values
Bandwidth 4-20GHz S
21[dB] 21-22
Noise Temperature[K] Under 300
S
11[dB] under -10
Power dissipation[mw] 50.4
Technology[um] 0.18
Table. 3-1 The expected specifications of wide-band low noise amplifier
Power consumption is estimated while LNA operates at DC. Each transistor consumes 7mA current. Four transistors consume 50.4mW power when power supply is 1.8V.
3.5 The Layout of Wide-Band LNA
Fig. 3.9 The metal 6 of wide-band low noise amplifier layout
Fig. 3.10 The metal 5 of wide-band low noise amplifier layout
Fig. 3.11 The metal 4 of wide-band low noise amplifier layout
Fig. 3.12 The metal 3 of wide-band low noise amplifier layout
Fig. 3.13 The metal 2 of wide-band low noise amplifier layout
Fig. 3.14 The metal 1 of wide-band low noise amplifier layout
Fig. 3.9 to Fig. 3.14 are the layout of wide-band low noise amplifier, have the dimension 1400 x 800 x 1200 μm and are fabricated by TSMC 0.18μm technology.
3.6 Measurement
Fig. 3.15 The testing environment at VIA RF lab.
Fig. 3.16 The testing probes and dice of wide-band LNA.
We measured the dice by IC-cap at VIA technology LTD. Fig. 3.15 indicates the testing environments. The effective testing frequency range of RF probes and testing instruments can be up to 50GHz. While measuring, two sets of RF probes are essential. One is for input terminal, and the other is for output terminal. Besides, four DC probes are necessary for DC feeding. They are fed into Vgg1、Vgg2、Vdd1 and Vdd2 respectively. Vgg1 and Vgg2 are fed by 0.8V voltages. Vdd1 and Vdd2 are fed by 1.5V voltages. The testing probes and dice of wide-band LNA is shown in Fig. 3.16. In order to measure the device accurately, we need to calibrate RF probe and testing instruments before measuring
3.7 Measurement Results
We first measured DC characters of the transistor on first stage. The measured is shown in Fig. 3.17. While Vgg1 is 0.8V voltage, we could measure that Id1 is around 9mA. Compared with simulated results, the measured result is not out of our expectations.
Fig. 3.17 The measured DC characters of the transistor on first stage
Fig. 3.18 The measured input reflection coefficient (S11) and output reflection coefficient (S12)
The measured input reflection coefficient (S11) and output reflection coefficient (S12) are shown in Fig. 3.18. Due to the restriction of instruments, we fed the port 1 of instrument into the output of device and port 2 into the input of device. Therefore, the S11 on Fig. 3.18 actually is output reflection coefficient (S22), and S22 is the input reflection coefficient (S11). From Fig. 3.18, we found that the measured results are far from like the simulated results. S11 is not lower than -10dB in intended frequency range, and S22 is lower than -10dB from 19.5GHz to 21.5GHz.
Fig. 3.19 The measured forward transmission coefficient (S21) and
reverse transmission coefficient (S12)
The measured forward transmission coefficient (S21) and reverse transmission coefficient (S12) are shown in Fig. 3.19. Similarly, due to the restriction of instruments, we fed the port 1 of instrument into the output of device and port 2 into the input of device. Therefore, the S21 on Fig.
3.19 actually is reverse transmission coefficient (S12), and S12 is the forward transmission coefficient (S21). The measured forward transmission coefficient (S21) is around -22dB to -16dB. Compared with simulated result, there are a lot of differences.
3.8 Conclusion For Wide-Band LNA
The chip malfunctions, and we have some ideas which might be the root causes.
A. The issues on layout
In this project most components are placed on metal 6, and metal 2 to metal 5 are placed on ground plane. Owing to there are 0.8μm gap
between metal 5 and metal 6, it will result in much effects of parasitic capacitor under many transmission lines which are utilized to imitate inductors. It makes the character of whole circuit greatly change.
Therefore most places on metal 2 to metal 5 should be reserved.
B. The issues on the settings of ADS
While simulating on ADS, some parameters about substrate are not correctly set, such as the height of substrate. Owing to metal 5 is placed on ground plane, the correct height of substrate is 0.8μm. Besides, the dielectric constant is set wrong, too. Though, it won’t greatly change input reflection coefficient, it will make power gain not to be so flat any more under intended frequency range. After changing wrong parameters to correct ones and simulating again, we found the simulated results are very like to measured results. The simulated results are shown Fig. 3.20.
C. The issues on components placement
In our design, we utilize many components provided by wafer company. The places under inductor, between metal 2 to metal 5, shouldn’t be placed ground plane. It doesn’t make the characters of components consist with the ones provided by wafer company. Besides, after completing simulation on ADS, it is essential to run Momentum to verify the characters of inductors and transmission lines. The works on running Momentum are omitted.
5 10 15 20 25 30 35
Fig. 3.20 The simulated input reflection coefficient (S11) and output reflection coefficient (S12) after changing wrong parameters to correct
ones
D. The issues on transmission lines
The places under inductor, between metal 2 to metal 5, shouldn’t be placed ground plane, and we should place ground place on right metal refer to the height of substrate. Besides, we should run Momentum to verify the characters of transmission lines.
E. We should consider testing environments before designing circuit
While designing circuit, we place two 300μm bond wires at input and output terminals. However, while measuring, there is no bond wire in the circuit. Though it won’t change the character a lot, we should consider testing environments before designing circuit.
Chapter 4 The Design of Novel Mixer
4.1 Induction
The intermodulation performance of a receiver front end is often limited by that of the mixer. This is because the mixer performance is usually worse than that of the other stages, and the mixer must handle the largest signal levels. Consequently, in most low-noise capability can do much to improve dynamic range.
The most commonly used mixers in microwave systems employ Schottky-barrier diodes as the mixing elements. These are usually used in balanced structures to separate the RF and local oscillator (LO) signals, to improve large-signal capability, and to reject certain even-order spurious responses and intermodulation products. Because the Schottky diode is very strongly nonlinear, diode mixers have at best mediocre intermodulation susceptibility.
Nowadays the most popular used topology of mixer is Gilbert Cell.
Many papers discussing Gilbert Cell are published on international journals. In the chapter, we propose a novel mixer which is never published in worldwide international papers.
4.2 Operating Principle
Mixers are conventionally realized by applying a large LO signal and a small RF signal to a nonlinear device, usually a Schottky-barrier diode. The LO modulates the junction conductance at the LO frequency, allowing frequency conversion. In principle, this conductance could be
realized via a time-varying linear conductance, rather than a nonlinear one, resulting in a mixer without intermodulation. A simple examples of such a time-varying linear element, which is capable of intermodulation-free mixing, is an ideal switch, operated at the LO frequency, in series with a small resistor.
Fig. 4.1 shows a conventional very low intermodulation mixer(VLIM). To realize a mixer, the MOS is operated in common-source configuration, the LO is applied to the gate, with proper DC bias, and the RF is applied to the drain. The IF is filtered from the drain. The relatively large value of Cgd would couple the RF and LO circuits to an unacceptable degree, so for a single-device mixer, RF and LO filters must be used. It is important that the LO voltage not be coupled to the drain terminal; if it is, the drain voltage will traverse the more strongly nonlinear portion of the V/I curve, increasing the IM level.
The RF filter should therefore be designed to short-circuit the drain at the LO frequency. The design goal for the LO filter is not so clear. If RF voltage is coupled to the gate, it is conceivable that intermodulation could be increased because of the nonlinearities in Gm. If the gate is shorted at the RF frequency, no RF voltage appears on the gate, so there is no possibility of IM generation in this way. However, open-circuiting the gate effectively halves the capacitance in parallel with the channel resistance, so conversion loss should be lower. In the mixer described here, the LO filter was designed to short-circuit the RF at the gate.
Fig. 4.1 Conventional very low intermodulation mixer
m1freq=
dBm(Vif)=-58.7631.500GHz
5 10 15 20 25 30 35 40 45
0 50
-130 -110 -90 -70 -50 -30
-150 -10
freq, GHz
dBm(Vif)
m1
Fig. 4.2 The simulated spectrum of conventional VLIM when FLO is 8.8GHz and FRF is 10.3GHz without LO and RF filters
Conventional VLIM has many advantages. The most one is simple, and the others are no DC power consumption, no 1-dB compression point since it is a passive circuit. However, the LO and RF filters are essential for reducing intermodulation, such as shown in Fig. 4.2.
Fig. 4.3 shows a novel mixer, double balance very low
intermodulation mixer. Compared with conventional VLIM, its advantage is that LO and RF filters are not needed. The LO and RF signals would be eliminated by the symmetrical architecture.
Fig. 4.3 Double balance very low intermodulation mixer
4.3 Simulated Results
Fig. 4.5 Conversion gain v.s. RF frequency when IF is 150MHz
-70 -60 -50 -40 -30 -20 -10 0
-80 10
-60 -40 -20 0 20
-80 40
Power_RF
ConverGain
Fig. 4.6 Conversion gain v.s. RF power when IF is 150MHz
-70 -60 -50 -40 -30 -20 -10 0
-80 10
-60 -40 -20 0
-80 20
Power_RF
PowerIF_real
Fig. 4.7 IF power v.s. RF power when IF is 150MHz
4.4 Conclusions For Double Balance VLIM mixer
A novel architecture of mixer is proposed. Its advantages are no DC power consumption, no RF and LO filters, and no 1-dB compression point since it is a passive mixer.
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