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Chapter 2 Development of low-cost high-efficiency III-V solar cells

2.4 Motivation

The development of an advanced technique that can enhance photovoltaic conversion efficiency while maintaining the lower APD formation and depressed interdiffusion in the GaAs/Ge system is necessary for the development of low-cost and high-efficiency III-V optoelectronic devices on Si substrate.

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References

[1] Masafumi Yamaguchi and Antonio Luque, IEEE TRANSACTIONS ON ELECTRON DEVICES 46, 2139 (1999)

[2] Mathieu Baudrit and Carlos Algora, Phys. Status Solidi A 207, 474 (2011)

[3] I. Garcia, I. Rey-Stolle, B. Galiana, and C. Algora, Appl. Phys. Lett. 95, 053509 (2009) [4] Masafumi Yamaguchi, Tatsuya Takamoto and Kenji Araki, Solar Energy Materials & Solar

Cells 90, 3068 (2006)

[5] Carrie L. Andre, John A. Carlin, John J. Boeckl, David M. Wilt, M. A. Smith, A. J. Pitera, M. L. Lee, Eugene A. Fitzgerald, and and Steven A. Ringel, IEEE TRANSACTIONS ON ELECTRON DEVICES, 52, 1055 (2005)

[6] M. R. Lueck, C. L. Andre, A. J. Pitera, M. L. Lee, E. A. Fitzgerald, and S. A. Ringel, IEEE TRANSACTIONS ON ELECTRON DEVICES, 27, 142 (2006)

[7] D. J. Friedman, S. R. Kurtz, and J. F. Geisz, "Analysis of the GaInP/GaAs/1-eV/Ge cell and related structures for terrestrial concentrator applications," in Proc. 29th IEEE Photov.

Spec. Conf., 2002, pp. 856-859

[8] Yuji Yamamoto, Peter Zaumseil, Tzanimir Arguirov, Martin Kittler, Bernd Tillack, Solid-state electronics 60, 2 (2011)

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Chapter 3

Effect of Substrate Misorientation on the Material Properties of GaAs/

Al

0.3

Ga

0.7

As Tunnel Diodes

3.1 Principles of a tunnel diode

A tunnel diode (TD) forms the electrical connection between two subcells in multijunction photovoltaic cells where electrons tunnel from occupied energy states on N++ side of the barrier to unoccupied energy states on the P++ side. The current density of a tunneling diode is composed of three components as shown in equation (3.1) and the current-voltage (I-V) characteristics for a tunnel diode is shown in Fig. 3-1.

J= Jtunnel +Jexcess + Jthermal (3.1) These components are Jtunnel, the band-to-band tunneling current density, Jexcess, the excess current density, and Jthermal, the minority-carrier diffusion current density or thermal current density. The forward bias of a tunnel diode is increased from zero, the quantum mechanical tunneling leads to an increase of current at first. It reached a peak value and then decreases.

Combining the forward diode characteristic with the tunneling curve yields an idealized characteristic as shown by the solid line in Fig. 3-1.

The band-to-band current component is shown in Eq. (3.2)

(3.2) Where V is the drive voltage, Jpeak is the current density and Vpeak is voltage at the onset of the

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negative differential resistance region, respectively. The maximum value of tunneling current occurs at Vpeak = (Vn+Vp)/3. The detailed equation in the term Vpeak has been determined to be is the valance band energy. kB is Boltzmann’s constant, T is the temperature, q is the charge, Nd is the donor concentration, Na is the acceptor concentration, Nc is the effective density of states in the conduction band. Actually, the probability of band-to-band tunneling decreases with an increase in the forward bias because of the decrease of the field term. Hence the peak-current point shifts to the left and occurs at a lower voltage.

The second component is excess current shown in the valley region (in Fig. 3-1). There is a minimum current point in the region where the tunneling characteristic meets the forward-diode characteristic. In this idealized curve, the current at this minimum point can be very small. The ratio of peak tunneling current to the valley point can be very high. There is a certain amount of “excess” current which raises the minimum current to such a value that the practical peak-current-to valley-current ratio is in the order of 10 to 20. They are not accounted for by the tunneling mechanism and the thermal current. The excess current

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component is:

(3.4)

where Jvalley is the current density and Vvalley is the voltage at the end of the negative differential resistance region. The excess current component is the most difficult term to determine theoretically because a high degree of knowledge of the growth conditions and environment must be known and quantified, so effects, such as from traps and dislocations, are known prior to device growth. This current joins the exponential excess current and the direct tunneling current and forms a smooth but higher valley. Brody [1] suggested that the valley excess current was caused by tunneling between tailing states which have been separated from the band edge by the heavy doping.

The third component is thermal or minority carrier diffusion current shown in Eq. (3.5) and Fig. 3-1.

(3.5) where

(3.6) where ni is the intrinsic carrier concentration, Dn is the electron drift diffusion coefficient, Dp

is the hole drift diffusion coefficient, τn is the electron lifetime, and τp is the hole lifetime.

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Detailed descriptions of the band diagram and IV characteristics in various states of operation of a tunnel junction are shown in Fig. 3-2. Figure 3-2(a) shows the reverse-biased configuration. Electrons can tunnel easily from p-type side to n-type side when tunnel diodes was operated at larger the reverse-bias. Figure 3-2(b) shows the device in thermal equilibrium.

The Fermi-level is the same for n-type and p-type material and no net current is generated under this condition. Figure 3-2(c) shows the band-to-band tunneling. As the forward bias is increased, more occupied states on the electron side coincide with unoccupied states on the 3-2 (f) shows minority-carrier injection current or thermal current as obtained in standard p-n junction diodes.

For an actual tunnel diode, there is also the substance resistance and the contact resistance of the loads. These resistances occur in series with the diode and modify the I-V curve by shifting the high current portion of the characteristic to a higher voltage. This modification is more noticeable at the peak-current point (Ipeak), where a small increase of voltage can be a significant percentage of the total amount. Figure 3-3 shows the shift of the peak current by

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the series resistance [2].

3.2 Properties of GaAs/Al0.3Ga0.7As tunnel diode

AlGaAs epitaxy is potentially of great important for many high-speed electronics and optoelectronic devices [3,4], because the lattice parameter different between GaAs and AlGaAs is very small, which avoids the generation of undesirable interface states. AlGaAs epitaxy with excellent minority carrier mirror properties in optoelectronic devices may be also used for the P-type material due to stronger bonding strength between Alumina (Al) atoms and carbon (C) atoms, avoiding the high optical absorption of P-type GaAs. Therefore, GaAs/AlGaAs heterostructure is very suitable as tunnel diode (TD) materials for III-V solar cell application.

The use of heterojunction TD (GaAs/AlxGa1-xAs) with higher conduction band also offset[5] provides higher tunneling current (Jtunnel) as compared to the traditional GaAs/GaAs TD structure. However, AlxGa1-xAs epi-layers are known to be sensitive to oxygen and carbon impurities, which produces excess current (Jexcess) via energy states inside the band gap. It has been reported that the reduction of these impurities from an AlGaAs epi-layer can be achieved using shorter growth interruption [6], liquid metal bubblers [7] and (311) oriented GaAs substrates [8,9]. But it is difficult to use these methods for commercial applications because of surface roughness and wafer cleaving problems [6~9].

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Alternatively, oxygen incorporation in AlGaAs can also be reduced by using a higher growth temperature (> 750°) and a higher V/III ratio. However, the increase of growth temperature and V/III ratio will lead to the reduction of carbon doping level during the GaAs/AlxGa1-xAs TDgrowth [10,11]. Therefore, the development of an advanced technique which decreases oxygen-incorporation while maintaining high carbon doping in P++-AlGaAs is necessary for the GaAs/AlxGa1-xAs TD application.

3.3 Growth of GaAs/ Al0.3Ga0.7As heterostructure on misoriented GaAs substrates

Misoriented GaAs substrate is widely used to produce the optimum surface morphologies for essentially all V/III semiconductors, including GaAs. Furthermore, Kuech and Veuhoff [12]

found that a effect of substrate morientation on carbon incorporation that they contributed to the increased affinity of CH3 radicals for electron-rich As surface. J. van de van et al. [13] also reported a significant increase in mobility as well as the net carrier concentration due to a decrease in the carbon concentration as the misorientation angle was increased form 0° to 4°.

A expected mechanism is related to the reaction velocity of the steps on the surface at which atoms are incorporated during material growth [13]. For small misorientation, the number of

steps is small, resulting in a large reaction velocity on the surface. The repidly moving steps

“trap” carbon before it can interact with atomic H. The trapped “CH3” radical is suggested to

form a second to an adjacent Ga, leading to release of H atoms and incorporation of carbon

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atom into the solid. Increasing the misorientation may increase the number of steps on the surface. This leads to an increased time for interaction of CH3 adsorbed to a Ga at a step with AsH, producing CH4. Similar behavior is also observed for [110] and [-110] oriented steps, as shown in Fig. 3-4. An alternate explanation is related to the rate of production of atomic H on the surface from the pyrolysis of AsH3 [14]. The presence of surface steps and kinks is postulated to increase the AsH3 pyrolysis rate and the local production of H and AsH species on the surface that react with CH3 to produce CH4. This will, of course, reduce the rate of carbon incorporation into the solid.

An abrupt increase in carbon incorporation is observed for (311)A substrate orientation.

High carbon incorporation for this orientation has also been observed for AlGaAs [14] and InGaAs [15]. This suggests that (311)A substrate orientation possesses higher step density which leads to highest AsH3 local pyrolysis rate and a minimal amount of carbon incorporation. It proves that misorientated substrates have been used to reduce the background carbon concentration in undoped GaAs epitaxial layers [12,13]. Recently, this concept is also used in undoped GaAs/Al0.3Ga0.7As quantum well in order to obtain superior surface morphology and optical properties by using substrates with small misorientation angles, i.e.

from 0~0.6°[16]. Although there have been a number of reports on the impurity-incorporation in GaAs and AlGaAs [12~14,16], the properties and impurity incorporation mechanism of the GaAs/AlxGa1-xAs TDs grown on misorientated GaAs substrates remained unclear.

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3.4 Experiment

In this part, we report on the investigation of the growth of GaAs/Al0.3Ga0.7As TDs on misorientated substrates for multijunction III-V solar cell applications. The (100) substrates were cut 0°, 2°. 6°, 10°,15° off toward the [111] direction. The structure used in the study was N++-GaAs(1~3x1019cm-3, 30~40nm)/P++-Al0.3Ga0.7As(1~5x1019cm-3, 30~40nm) with GaAs as the buffer layer. Growth is performed with metal organic chemical vapor deposition (MOCVD, EMCORE D180) system. Trimethylgallium (TMG) and trimethylaluminum (TMAl) were used as group III source, whereas pure arsine (AsH3) with low H2O content was used as group V source. The precursors for P-type and N-type dopant were carbon-tetrabromide (CBr4) and dimethyl-telluride (DMTe), respectively. The growth temperature was varied from 600℃to 640℃ and was determined by PYRO sensors. The V/III ratios used were 45 and 12 for the growth of GaAs and Al0.3Ga0.7As, respectively. All films in this study were grown at low-pressure of 40 torr with hydrogen flow rate of 28000sccm.

Atomic Force Microscopy (AFM) was used to investigate the surface morphology and roughness of the GaAs/Al0.3Ga0.7As TDs; Secondary Ion Mass Spectrometry (SIMS) was used to identify the dopant distribution and the relative impurity contents in the GaAs/Al0.3Ga0.7As TDs. The crystalline quality and carbon-incorporation of the GaAs/Al0.3Ga0.7As TDs were inspected using high-resolution x-ray diffraction (HRXRD).

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3.5 Results and discussion

3.5.1 Effect of substrate misorientation on the surface morphologies of GaAs/AlGaAs Tunnel diodes

Figure 3-5 illustrates the AFM images of GaAs/Al0.3Ga0.7As TDs grown on GaAs substrates with different misorientation angles. The root mean square (RMS) roughness of GaAs/Al0.3Ga0.7As TDs grown on 0°, 2°, 6°, 10°,15° off oriented GaAs substrates were about 1.23 Å , 1.52 Å , 2.03 Å , 1.54 Å , and 2.74Å , respectively. The TD surface morphology is closely related to the substrate orientation, film thickness, film composition, dopant type, and doping concentration. The thickness and dopant type were constant for all samples in this study. According to the AFM results, the GaAs/Al0.3Ga0.7As TDs grown on 0°, 2° and 10° off GaAs substrates have smoother surface. The rougher surface morphology for GaAs/AlGaAs TDs grown at other misorientation angles may be caused by the following reasons. First, the dopant diffusion in heavily doped GaAs/Al0.3Ga0.7As layers may lead to the degradation of the morphology of the epitaxial layers [17]. Secondly, the surface also becomes rougher with the increase of Al composition in AlxGa1-xAs layer, especially for x=15~45% [18]. Finally, the increase of oxygen-incorporation into GaAs layer may also further reduce the surface smoothness of a GaAs/AlGaAs heterostructure [19]. S. Nayak et al. [19] reported that surface roughness of GaAs epitaxy decreases with increase of oxygen doping concentration during material growth as shown in Fig. 3-6 and Table 3-1. The surface morphology could be

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affected, consisting of 3D clusters, by a bulk oxygen doping concentration of larger than 1019cm-3. There are many factors that can affect the surface morphology of GaAs/AlGaAs TD;

therefore, we will further discuss the relationship between impurity and epitaxial quality for GaAs/AlGaAs TD grown on misorientated GaAs substrate.

3.5.2 The properties and impurity incorporation mechanism of the GaAs/AlGaAs tunnel diodes grown on misorientated GaAs substrates

Figure 3-7(a) illustrates the SIMS depth profiles of oxygen in the GaAs/Al0.3Ga0.7As TD layers grown on GaAs substrates with different misorientations. Oxygen is known as deep acceptor and non-radiative trap, which decreases the tunneling probability of electrons in GaAs/Al0.3Ga0.7As TDs. In this study, it is found that oxygen atoms in the heavily doped GaAs/Al0.3Ga0.7As TDs are mobile enough to segregate at the surface, or be trapped at the interface [20,21]. The SIMS data also indicates that less oxygen contamination was found in the P++-AlGaAs layer grown on 10° off GaAs substrates as compared to those grown on other misorientations. The amount of impurity in AlGaAs depends on Al content [22] and availability of anisotropic sites [23]. The anisotropic sites possess high affinity for contaminant incorporation. The variations of Al content in P++-AlGaAs layer are displayed in Fig. 3-7(b). It indicates a sharp increment in Al content when the GaAs/Al0.3Ga0.7As TDs were grown on the 0° and 2° off GaAs substrates. However, the oxygen concentration does

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not follow the initial Al content increment and it suggests that the existence of anisotropic sites is a more important factor than Al content for oxygen-incorporation in the P++-AlGaAs layer. The use of 10° off GaAs substrate can practically reduce the anisotropic sites; therefore, it is a practical technique besides the increase of growth temperature and V/III ratio, to suppress the oxygen-incorporation in P++-AlGaAs layer of a GaAs/Al0.3Ga0.7As TD.

According to the SIMS and AFM results, the surface morphology of a GaAs/Al0.3Ga0.7As TD was not affected by the dopant elements because carbon and tellurium as P type and N type dopant atoms are less mobile during the III-V film growth. The reason for the degradation of the GaAs/Al0.3Ga0.7As TD surface morphology is mainly due to higher oxygen content in the N++-GaAs layer [19], as shown in Figure 3-7(a). The substrates with larger offcut, such as 10°, have more Ga atoms exposed on the surface. They can effectively reduce the number of As vacancies on the surface and thus reduce the sticking coefficient for oxygen incorporation [21]. Moreover, smoother surface is also observed for material grown on small misorientations, such as 0°, which have higher oxygen contamination as compared to 10° off, due to the Gibbs-Helmholtz surface free energy [24]. The surface free energy increases with the substrate misorientation angle. Higher misorientation angles imply the existence of a quasi-liquid layer during material growth, leading to an unstable morphology with a hill-and-valley structure on the top surface [25]. These results demonstrated in Fig. 3-5 and Fig. 3-7(a) indicate that (100) substrates 10° off toward [111] not only reduce the content of

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oxygen-impurity in the N++-GaAs layers but also reduce Gibbs-Helmholtz surface free energy to produce a smooth surface on the GaAs/Al0.3Ga0.7As TDs.

Figure 3-8 illustrates the HRXRD results of the GaAs/Al0.3Ga0.7As TDs grown on different misorientation GaAs substrates. The lattice contraction model [26] describes the relationship of lattice constant variation as a function of carbon-incorporation as shown in equation (3-7):

△a=NCAs (rc-rAs)(1+ρ) (3-7) where △a is lattice constant variation; NCAs is the density of carbon atoms on the arsenic sites;

rc and rAs are the covalent radii of carbon (0.774 Å ) and arsenic (1.225Å), respectively; ρ is the compensation ratio of NCGa/NCAs; NCGa is the density of carbon atoms on Ga sites.

Equation (3-7) shows that the carbon-incorporation may induce the lattice contraction [26,27].

Substitutional carbon atoms in the lattice of the GaAs/AlGaAs heterostructure will reduce the mean lattice constant of the structure. The observed peak splitting for AlGaAs XRD peaks as shown in Fig. 3.8 increases with the increasing misorientation angle, meaning that these spectra are carbon-incorporation related [27]. It demonstrates that carbon doping efficiency, not the background carbon doping, increases with the increase of the misorientation angle during the GaAs/Al0.3Ga0.7As TDs growth. The same trend can be observed for the carbon concentration in the AlGaAs layers grown with different misorientation angles, as shown in Fig. 3-7(d). If substitutional carbon atoms were incorporated in the group III sites, they would

25 composition of a GaAs/Al0.3Ga0.7As TD when the 15° off substrates were used.

3.6 Summary

It has been demonstrated that the misorientation of GaAs substrates has a direct effect on the material properties of the N++-GaAs/P++-AlGaAs TDs for multijunction III-V solar cell application. The best surface morphology and interface sharpness for the TDs were obtained on the (100) tilted 10° off toward [111] GaAs substrate. Results show that the TD materials grown on this misoriented substrate can overcome the limitation of high surface free energy and with reduced sticking coefficient for oxygen-incorporation in the N++-GaAs layers.

Besides, this substrate has also reduced the anisotropic sites for oxygen-incorporation in the P++-AlGaAs layers. These results can be used for the growth of inverted metamorphic multijunction solar cell structures, which is built on GaAs based substrates and inverted onto other substrates [30].

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Table 3-1 Surface rms roughness (ρ in nm) and wavelength of periodic (λ in nm) surface structure in 1μm thick GaAs (001) with several concentrations of O are shown. The λ and amplitude (A in nm) are shown up to 1018 cm-3 [O] in GaAs. The breakdown of periodic

structure at higher oxygen concentrations makes analysis not meaningful there.

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Figure 3-1 Diagram of I-V characteristics of a tunnel diode including three components [1]

Figure 3-2 Diagram of a tunnel diode (a) reverse-biased tunneling, (b) thermal equilibrium, (c) forward-biased tunneling, (d) maximum forward-biased tunneling current, (e) negative

differential resistance, (f) minority-carrier injection current.

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Figure 3-3 Equivalent circuit diagram of a test structure with isolated tunnel diode. An additional resistor RS was used to simulate high internal serial resistances. Right: Influence of internal serial resistance on the I–V characteristic of a GaAs tunnel diode. The graph with RS

= 0 Ω shows the I–V characteristic of the tunnel diode used. Increasing RS (1 Ω) leads to a

= 0 Ω shows the I–V characteristic of the tunnel diode used. Increasing RS (1 Ω) leads to a

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